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1/*
2 * Software MMU support
5fafdf24 3 *
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4 * Generate inline load/store functions for one MMU mode and data
5 * size.
6 *
7 * Generate a store function as well as signed and unsigned loads. For
8 * 32 and 64 bit cases, also generate floating point functions with
9 * the same size.
10 *
11 * Not used directly but included from softmmu_exec.h and exec-all.h.
12 *
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13 * Copyright (c) 2003 Fabrice Bellard
14 *
15 * This library is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU Lesser General Public
17 * License as published by the Free Software Foundation; either
18 * version 2 of the License, or (at your option) any later version.
19 *
20 * This library is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
23 * Lesser General Public License for more details.
24 *
25 * You should have received a copy of the GNU Lesser General Public
8167ee88 26 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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27 */
28#if DATA_SIZE == 8
29#define SUFFIX q
61382a50 30#define USUFFIX q
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31#define DATA_TYPE uint64_t
32#elif DATA_SIZE == 4
33#define SUFFIX l
61382a50 34#define USUFFIX l
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35#define DATA_TYPE uint32_t
36#elif DATA_SIZE == 2
37#define SUFFIX w
61382a50 38#define USUFFIX uw
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39#define DATA_TYPE uint16_t
40#define DATA_STYPE int16_t
41#elif DATA_SIZE == 1
42#define SUFFIX b
61382a50 43#define USUFFIX ub
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44#define DATA_TYPE uint8_t
45#define DATA_STYPE int8_t
46#else
47#error unsupported data size
48#endif
49
6ebbf390 50#if ACCESS_TYPE < (NB_MMU_MODES)
61382a50 51
6ebbf390 52#define CPU_MMU_INDEX ACCESS_TYPE
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53#define MMUSUFFIX _mmu
54
6ebbf390 55#elif ACCESS_TYPE == (NB_MMU_MODES)
61382a50 56
6ebbf390 57#define CPU_MMU_INDEX (cpu_mmu_index(env))
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58#define MMUSUFFIX _mmu
59
6ebbf390 60#elif ACCESS_TYPE == (NB_MMU_MODES + 1)
61382a50 61
6ebbf390 62#define CPU_MMU_INDEX (cpu_mmu_index(env))
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63#define MMUSUFFIX _cmmu
64
b92e5a22 65#else
61382a50 66#error invalid ACCESS_TYPE
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67#endif
68
69#if DATA_SIZE == 8
70#define RES_TYPE uint64_t
71#else
c086b783 72#define RES_TYPE uint32_t
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73#endif
74
6ebbf390 75#if ACCESS_TYPE == (NB_MMU_MODES + 1)
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76#define ADDR_READ addr_code
77#else
78#define ADDR_READ addr_read
79#endif
b92e5a22 80
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81/* generic load/store macros */
82
c27004ec 83static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
b92e5a22 84{
4d7a0880 85 int page_index;
b92e5a22 86 RES_TYPE res;
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87 target_ulong addr;
88 unsigned long physaddr;
6ebbf390 89 int mmu_idx;
61382a50 90
c27004ec 91 addr = ptr;
4d7a0880 92 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
6ebbf390 93 mmu_idx = CPU_MMU_INDEX;
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94 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
95 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
6ebbf390 96 res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
b92e5a22 97 } else {
4d7a0880 98 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
61382a50 99 res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
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100 }
101 return res;
102}
103
104#if DATA_SIZE <= 2
c27004ec 105static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
b92e5a22 106{
4d7a0880 107 int res, page_index;
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108 target_ulong addr;
109 unsigned long physaddr;
6ebbf390 110 int mmu_idx;
61382a50 111
c27004ec 112 addr = ptr;
4d7a0880 113 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
6ebbf390 114 mmu_idx = CPU_MMU_INDEX;
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115 if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
116 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
6ebbf390 117 res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
b92e5a22 118 } else {
4d7a0880 119 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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120 res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
121 }
122 return res;
123}
124#endif
125
6ebbf390 126#if ACCESS_TYPE != (NB_MMU_MODES + 1)
84b7b8e7 127
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128/* generic store macro */
129
c27004ec 130static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
b92e5a22 131{
4d7a0880 132 int page_index;
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133 target_ulong addr;
134 unsigned long physaddr;
6ebbf390 135 int mmu_idx;
61382a50 136
c27004ec 137 addr = ptr;
4d7a0880 138 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
6ebbf390 139 mmu_idx = CPU_MMU_INDEX;
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140 if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
141 (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
6ebbf390 142 glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
b92e5a22 143 } else {
4d7a0880 144 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
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145 glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
146 }
147}
148
6ebbf390 149#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
84b7b8e7 150
6ebbf390 151#if ACCESS_TYPE != (NB_MMU_MODES + 1)
e16c53fa 152
2d603d22 153#if DATA_SIZE == 8
3f87bf69 154static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
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155{
156 union {
3f87bf69 157 float64 d;
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158 uint64_t i;
159 } u;
160 u.i = glue(ldq, MEMSUFFIX)(ptr);
161 return u.d;
162}
163
3f87bf69 164static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
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165{
166 union {
3f87bf69 167 float64 d;
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168 uint64_t i;
169 } u;
170 u.d = v;
171 glue(stq, MEMSUFFIX)(ptr, u.i);
172}
173#endif /* DATA_SIZE == 8 */
174
175#if DATA_SIZE == 4
3f87bf69 176static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
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177{
178 union {
3f87bf69 179 float32 f;
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180 uint32_t i;
181 } u;
182 u.i = glue(ldl, MEMSUFFIX)(ptr);
183 return u.f;
184}
185
3f87bf69 186static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
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187{
188 union {
3f87bf69 189 float32 f;
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190 uint32_t i;
191 } u;
192 u.f = v;
193 glue(stl, MEMSUFFIX)(ptr, u.i);
194}
195#endif /* DATA_SIZE == 4 */
196
6ebbf390 197#endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */
84b7b8e7 198
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199#undef RES_TYPE
200#undef DATA_TYPE
201#undef DATA_STYPE
202#undef SUFFIX
61382a50 203#undef USUFFIX
b92e5a22 204#undef DATA_SIZE
6ebbf390 205#undef CPU_MMU_INDEX
61382a50 206#undef MMUSUFFIX
84b7b8e7 207#undef ADDR_READ