[qemu.git] / softmmu_template.h

/*
 *  Software MMU support
 * 
 *  Copyright (c) 2003 Fabrice Bellard
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#define DATA_SIZE (1 << SHIFT)

#if DATA_SIZE == 8
#define SUFFIX q
#define USUFFIX q
#define DATA_TYPE uint64_t
#elif DATA_SIZE == 4
#define SUFFIX l
#define USUFFIX l
#define DATA_TYPE uint32_t
#elif DATA_SIZE == 2
#define SUFFIX w
#define USUFFIX uw
#define DATA_TYPE uint16_t
#elif DATA_SIZE == 1
#define SUFFIX b
#define USUFFIX ub
#define DATA_TYPE uint8_t
#else
#error unsupported data size
#endif

static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr, 
                                                        int is_user,
                                                        void *retaddr);
static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr, 
                                                   DATA_TYPE val, 
                                                   int is_user,
                                                   void *retaddr);

static inline DATA_TYPE glue(io_read, SUFFIX)(unsigned long physaddr, 
                                              unsigned long tlb_addr)
{
    DATA_TYPE res;
    int index;

    index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
#if SHIFT <= 2
    res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr);
#else
#ifdef TARGET_WORDS_BIGENDIAN
    res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32;
    res |= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4);
#else
    res = io_mem_read[index][2](io_mem_opaque[index], physaddr);
    res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32;
#endif
#endif /* SHIFT > 2 */
    return res;
}

static inline void glue(io_write, SUFFIX)(unsigned long physaddr, 
                                          DATA_TYPE val,
                                          unsigned long tlb_addr,
                                          void *retaddr)
{
    int index;

    index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
    env->mem_write_vaddr = tlb_addr;
    env->mem_write_pc = (unsigned long)retaddr;
#if SHIFT <= 2
    io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val);
#else
#ifdef TARGET_WORDS_BIGENDIAN
    io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32);
    io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val);
#else
    io_mem_write[index][2](io_mem_opaque[index], physaddr, val);
    io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32);
#endif
#endif /* SHIFT > 2 */
}

/* handle all cases except unaligned access which span two pages */
DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(unsigned long addr,
                                                         int is_user)
{
    DATA_TYPE res;
    int index;
    unsigned long physaddr, tlb_addr;
    void *retaddr;
    
    /* test if there is match for unaligned or IO access */
    /* XXX: could done more in memory macro in a non portable way */
    index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 redo:
    tlb_addr = env->tlb_read[is_user][index].address;
    if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
        physaddr = addr + env->tlb_read[is_user][index].addend;
        if (tlb_addr & ~TARGET_PAGE_MASK) {
            /* IO access */
            if ((addr & (DATA_SIZE - 1)) != 0)
                goto do_unaligned_access;
            res = glue(io_read, SUFFIX)(physaddr, tlb_addr);
        } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
            /* slow unaligned access (it spans two pages or IO) */
        do_unaligned_access:
            retaddr = GETPC();
            res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, 
                                                         is_user, retaddr);
        } else {
            /* unaligned access in the same page */
            res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
        }
    } else {
        /* the page is not in the TLB : fill it */
        retaddr = GETPC();
        tlb_fill(addr, 0, is_user, retaddr);
        goto redo;
    }
    return res;
}

/* handle all unaligned cases */
static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr, 
                                                        int is_user,
                                                        void *retaddr)
{
    DATA_TYPE res, res1, res2;
    int index, shift;
    unsigned long physaddr, tlb_addr, addr1, addr2;

    index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 redo:
    tlb_addr = env->tlb_read[is_user][index].address;
    if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
        physaddr = addr + env->tlb_read[is_user][index].addend;
        if (tlb_addr & ~TARGET_PAGE_MASK) {
            /* IO access */
            if ((addr & (DATA_SIZE - 1)) != 0)
                goto do_unaligned_access;
            res = glue(io_read, SUFFIX)(physaddr, tlb_addr);
        } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
        do_unaligned_access:
            /* slow unaligned access (it spans two pages) */
            addr1 = addr & ~(DATA_SIZE - 1);
            addr2 = addr1 + DATA_SIZE;
            res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1, 
                                                          is_user, retaddr);
            res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2, 
                                                          is_user, retaddr);
            shift = (addr & (DATA_SIZE - 1)) * 8;
#ifdef TARGET_WORDS_BIGENDIAN
            res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift));
#else
            res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift));
#endif
            res = (DATA_TYPE)res;
        } else {
            /* unaligned/aligned access in the same page */
            res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
        }
    } else {
        /* the page is not in the TLB : fill it */
        tlb_fill(addr, 0, is_user, retaddr);
        goto redo;
    }
    return res;
}


void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(unsigned long addr, 
                                                    DATA_TYPE val,
                                                    int is_user)
{
    unsigned long physaddr, tlb_addr;
    void *retaddr;
    int index;
    
    index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 redo:
    tlb_addr = env->tlb_write[is_user][index].address;
    if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
        physaddr = addr + env->tlb_write[is_user][index].addend;
        if (tlb_addr & ~TARGET_PAGE_MASK) {
            /* IO access */
            if ((addr & (DATA_SIZE - 1)) != 0)
                goto do_unaligned_access;
            retaddr = GETPC();
            glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr);
        } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
        do_unaligned_access:
            retaddr = GETPC();
            glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, 
                                                   is_user, retaddr);
        } else {
            /* aligned/unaligned access in the same page */
            glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, val);
        }
    } else {
        /* the page is not in the TLB : fill it */
        retaddr = GETPC();
        tlb_fill(addr, 1, is_user, retaddr);
        goto redo;
    }
}

/* handles all unaligned cases */
static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr, 
                                                   DATA_TYPE val,
                                                   int is_user,
                                                   void *retaddr)
{
    unsigned long physaddr, tlb_addr;
    int index, i;

    index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 redo:
    tlb_addr = env->tlb_write[is_user][index].address;
    if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
        physaddr = addr + env->tlb_write[is_user][index].addend;
        if (tlb_addr & ~TARGET_PAGE_MASK) {
            /* IO access */
            if ((addr & (DATA_SIZE - 1)) != 0)
                goto do_unaligned_access;
            glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr);
        } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
        do_unaligned_access:
            /* XXX: not efficient, but simple */
            for(i = 0;i < DATA_SIZE; i++) {
#ifdef TARGET_WORDS_BIGENDIAN
                glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), 
                                          is_user, retaddr);
#else
                glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8), 
                                          is_user, retaddr);
#endif
            }
        } else {
            /* aligned/unaligned access in the same page */
            glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, val);
        }
    } else {
        /* the page is not in the TLB : fill it */
        tlb_fill(addr, 1, is_user, retaddr);
        goto redo;
    }
}

#undef SHIFT
#undef DATA_TYPE
#undef SUFFIX
#undef USUFFIX
#undef DATA_SIZE
Commit	Line	Data
b92e5a22 FB	1	/*
	2	* Software MMU support
	3	*
	4	* Copyright (c) 2003 Fabrice Bellard
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20	#define DATA_SIZE (1 << SHIFT)
	21
	22	#if DATA_SIZE == 8
	23	#define SUFFIX q
61382a50	24	#define USUFFIX q
b92e5a22 FB	25	#define DATA_TYPE uint64_t
	26	#elif DATA_SIZE == 4
	27	#define SUFFIX l
61382a50	28	#define USUFFIX l
b92e5a22 FB	29	#define DATA_TYPE uint32_t
	30	#elif DATA_SIZE == 2
	31	#define SUFFIX w
61382a50	32	#define USUFFIX uw
b92e5a22 FB	33	#define DATA_TYPE uint16_t
	34	#elif DATA_SIZE == 1
	35	#define SUFFIX b
61382a50	36	#define USUFFIX ub
b92e5a22 FB	37	#define DATA_TYPE uint8_t
	38	#else
	39	#error unsupported data size
	40	#endif
	41
61382a50 FB	42	static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr,
	43	int is_user,
	44	void *retaddr);
	45	static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr,
	46	DATA_TYPE val,
	47	int is_user,
	48	void *retaddr);
b92e5a22 FB	49
	50	static inline DATA_TYPE glue(io_read, SUFFIX)(unsigned long physaddr,
	51	unsigned long tlb_addr)
	52	{
	53	DATA_TYPE res;
	54	int index;
	55
	56	index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
	57	#if SHIFT <= 2
a4193c8a	58	res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr);
b92e5a22 FB	59	#else
b92e5a22 FB	60	#ifdef TARGET_WORDS_BIGENDIAN
a4193c8a FB	61	res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32;
a4193c8a FB	62	res \|= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4);
b92e5a22	63	#else
a4193c8a FB	64	res = io_mem_read[index][2](io_mem_opaque[index], physaddr);
a4193c8a FB	65	res \|= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32;
b92e5a22 FB	66	#endif
	67	#endif /* SHIFT > 2 */
	68	return res;
	69	}
	70
	71	static inline void glue(io_write, SUFFIX)(unsigned long physaddr,
	72	DATA_TYPE val,
d720b93d FB	73	unsigned long tlb_addr,
d720b93d FB	74	void *retaddr)
b92e5a22 FB	75	{
	76	int index;
	77
	78	index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
d720b93d FB	79	env->mem_write_vaddr = tlb_addr;
d720b93d FB	80	env->mem_write_pc = (unsigned long)retaddr;
b92e5a22	81	#if SHIFT <= 2
a4193c8a	82	io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val);
b92e5a22 FB	83	#else
b92e5a22 FB	84	#ifdef TARGET_WORDS_BIGENDIAN
a4193c8a FB	85	io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32);
a4193c8a FB	86	io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val);
b92e5a22	87	#else
a4193c8a FB	88	io_mem_write[index][2](io_mem_opaque[index], physaddr, val);
a4193c8a FB	89	io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32);
b92e5a22 FB	90	#endif
	91	#endif /* SHIFT > 2 */
	92	}
	93
	94	/* handle all cases except unaligned access which span two pages */
61382a50 FB	95	DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(unsigned long addr,
61382a50 FB	96	int is_user)
b92e5a22 FB	97	{
b92e5a22 FB	98	DATA_TYPE res;
61382a50	99	int index;
b92e5a22 FB	100	unsigned long physaddr, tlb_addr;
	101	void *retaddr;
	102
	103	/* test if there is match for unaligned or IO access */
	104	/* XXX: could done more in memory macro in a non portable way */
b92e5a22 FB	105	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
	106	redo:
	107	tlb_addr = env->tlb_read[is_user][index].address;
	108	if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK \| TLB_INVALID_MASK))) {
	109	physaddr = addr + env->tlb_read[is_user][index].addend;
	110	if (tlb_addr & ~TARGET_PAGE_MASK) {
	111	/* IO access */
	112	if ((addr & (DATA_SIZE - 1)) != 0)
	113	goto do_unaligned_access;
	114	res = glue(io_read, SUFFIX)(physaddr, tlb_addr);
	115	} else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
	116	/* slow unaligned access (it spans two pages or IO) */
	117	do_unaligned_access:
61382a50 FB	118	retaddr = GETPC();
	119	res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr,
	120	is_user, retaddr);
b92e5a22 FB	121	} else {
b92e5a22 FB	122	/* unaligned access in the same page */
61382a50	123	res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
b92e5a22 FB	124	}
	125	} else {
	126	/* the page is not in the TLB : fill it */
61382a50 FB	127	retaddr = GETPC();
61382a50 FB	128	tlb_fill(addr, 0, is_user, retaddr);
b92e5a22 FB	129	goto redo;
	130	}
	131	return res;
	132	}
	133
	134	/* handle all unaligned cases */
61382a50 FB	135	static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr,
	136	int is_user,
	137	void *retaddr)
b92e5a22 FB	138	{
b92e5a22 FB	139	DATA_TYPE res, res1, res2;
61382a50	140	int index, shift;
b92e5a22 FB	141	unsigned long physaddr, tlb_addr, addr1, addr2;
b92e5a22 FB	142
b92e5a22 FB	143	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
	144	redo:
	145	tlb_addr = env->tlb_read[is_user][index].address;
	146	if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK \| TLB_INVALID_MASK))) {
	147	physaddr = addr + env->tlb_read[is_user][index].addend;
	148	if (tlb_addr & ~TARGET_PAGE_MASK) {
	149	/* IO access */
	150	if ((addr & (DATA_SIZE - 1)) != 0)
	151	goto do_unaligned_access;
	152	res = glue(io_read, SUFFIX)(physaddr, tlb_addr);
	153	} else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
	154	do_unaligned_access:
	155	/* slow unaligned access (it spans two pages) */
	156	addr1 = addr & ~(DATA_SIZE - 1);
	157	addr2 = addr1 + DATA_SIZE;
61382a50 FB	158	res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1,
	159	is_user, retaddr);
	160	res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2,
	161	is_user, retaddr);
b92e5a22 FB	162	shift = (addr & (DATA_SIZE - 1)) * 8;
	163	#ifdef TARGET_WORDS_BIGENDIAN
	164	res = (res1 << shift) \| (res2 >> ((DATA_SIZE * 8) - shift));
	165	#else
	166	res = (res1 >> shift) \| (res2 << ((DATA_SIZE * 8) - shift));
	167	#endif
6986f88c	168	res = (DATA_TYPE)res;
b92e5a22 FB	169	} else {
b92e5a22 FB	170	/* unaligned/aligned access in the same page */
61382a50	171	res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
b92e5a22 FB	172	}
	173	} else {
	174	/* the page is not in the TLB : fill it */
61382a50	175	tlb_fill(addr, 0, is_user, retaddr);
b92e5a22 FB	176	goto redo;
	177	}
	178	return res;
	179	}
	180
	181
61382a50 FB	182	void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(unsigned long addr,
	183	DATA_TYPE val,
	184	int is_user)
b92e5a22 FB	185	{
	186	unsigned long physaddr, tlb_addr;
	187	void *retaddr;
61382a50	188	int index;
b92e5a22	189
b92e5a22 FB	190	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
	191	redo:
	192	tlb_addr = env->tlb_write[is_user][index].address;
	193	if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK \| TLB_INVALID_MASK))) {
4ad06a29	194	physaddr = addr + env->tlb_write[is_user][index].addend;
b92e5a22 FB	195	if (tlb_addr & ~TARGET_PAGE_MASK) {
	196	/* IO access */
	197	if ((addr & (DATA_SIZE - 1)) != 0)
	198	goto do_unaligned_access;
d720b93d FB	199	retaddr = GETPC();
d720b93d FB	200	glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr);
b92e5a22 FB	201	} else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
b92e5a22 FB	202	do_unaligned_access:
61382a50 FB	203	retaddr = GETPC();
	204	glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val,
	205	is_user, retaddr);
b92e5a22 FB	206	} else {
	207	/* aligned/unaligned access in the same page */
	208	glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, val);
	209	}
	210	} else {
	211	/* the page is not in the TLB : fill it */
61382a50 FB	212	retaddr = GETPC();
61382a50 FB	213	tlb_fill(addr, 1, is_user, retaddr);
b92e5a22 FB	214	goto redo;
	215	}
	216	}
	217
	218	/* handles all unaligned cases */
61382a50 FB	219	static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr,
	220	DATA_TYPE val,
	221	int is_user,
	222	void *retaddr)
b92e5a22 FB	223	{
b92e5a22 FB	224	unsigned long physaddr, tlb_addr;
61382a50	225	int index, i;
b92e5a22	226
b92e5a22 FB	227	index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
	228	redo:
	229	tlb_addr = env->tlb_write[is_user][index].address;
	230	if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK \| TLB_INVALID_MASK))) {
4ad06a29	231	physaddr = addr + env->tlb_write[is_user][index].addend;
b92e5a22 FB	232	if (tlb_addr & ~TARGET_PAGE_MASK) {
	233	/* IO access */
	234	if ((addr & (DATA_SIZE - 1)) != 0)
	235	goto do_unaligned_access;
d720b93d	236	glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr);
b92e5a22 FB	237	} else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) {
	238	do_unaligned_access:
	239	/* XXX: not efficient, but simple */
	240	for(i = 0;i < DATA_SIZE; i++) {
	241	#ifdef TARGET_WORDS_BIGENDIAN
61382a50 FB	242	glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)),
61382a50 FB	243	is_user, retaddr);
b92e5a22	244	#else
61382a50 FB	245	glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8),
61382a50 FB	246	is_user, retaddr);
b92e5a22 FB	247	#endif
	248	}
	249	} else {
	250	/* aligned/unaligned access in the same page */
	251	glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, val);
	252	}
	253	} else {
	254	/* the page is not in the TLB : fill it */
61382a50	255	tlb_fill(addr, 1, is_user, retaddr);
b92e5a22 FB	256	goto redo;
	257	}
	258	}
	259
	260	#undef SHIFT
	261	#undef DATA_TYPE
	262	#undef SUFFIX
61382a50	263	#undef USUFFIX
b92e5a22	264	#undef DATA_SIZE