[qemu.git] / target-cris / op_helper.c

/*
 *  CRIS helper routines
 *
 *  Copyright (c) 2007 AXIS Communications
 *  Written by Edgar E. Iglesias
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <assert.h>
#include "exec.h"
#include "mmu.h"
#include "helper.h"

#define D(x)

#if !defined(CONFIG_USER_ONLY)

#define MMUSUFFIX _mmu

#define SHIFT 0
#include "softmmu_template.h"

#define SHIFT 1
#include "softmmu_template.h"

#define SHIFT 2
#include "softmmu_template.h"

#define SHIFT 3
#include "softmmu_template.h"

/* Try to fill the TLB and return an exception if error. If retaddr is
   NULL, it means that the function was called in C code (i.e. not
   from generated code or from helper.c) */
/* XXX: fix it to restore all registers */
void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
{
    TranslationBlock *tb;
    CPUState *saved_env;
    unsigned long pc;
    int ret;

    /* XXX: hack to restore env in all cases, even if not called from
       generated code */
    saved_env = env;
    env = cpu_single_env;

    D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__, 
	     env->pc, env->debug1, retaddr));
    ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
    if (__builtin_expect(ret, 0)) {
        if (retaddr) {
            /* now we have a real cpu fault */
            pc = (unsigned long)retaddr;
            tb = tb_find_pc(pc);
            if (tb) {
                /* the PC is inside the translated code. It means that we have
                   a virtual CPU fault */
                cpu_restore_state(tb, env, pc, NULL);

		/* Evaluate flags after retranslation.  */
                helper_top_evaluate_flags();
            }
        }
        cpu_loop_exit();
    }
    env = saved_env;
}

#endif

void helper_raise_exception(uint32_t index)
{
	env->exception_index = index;
	cpu_loop_exit();
}

void helper_tlb_flush_pid(uint32_t pid)
{
#if !defined(CONFIG_USER_ONLY)
	cris_mmu_flush_pid(env, pid);
#endif
}

void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
{
	(fprintf(logfile, "%s: a0=%x a1=%x\n", __func__, a0, a1)); 
}

void helper_dummy(void)
{

}

/* Used by the tlb decoder.  */
#define EXTRACT_FIELD(src, start, end) \
	    (((src) >> start) & ((1 << (end - start + 1)) - 1))

void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
{
	uint32_t srs;
	srs = env->pregs[PR_SRS];
	srs &= 3;
	env->sregs[srs][sreg] = env->regs[reg];

#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2) {
		if (sreg == 6) {
			/* Writes to tlb-hi write to mm_cause as a side 
			   effect.  */
			env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
			env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
		}
		else if (sreg == 5) {
			uint32_t set;
			uint32_t idx;
			uint32_t lo, hi;
			uint32_t vaddr;
			int tlb_v;

			idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
			set >>= 4;
			set &= 3;

			idx &= 15;
			/* We've just made a write to tlb_lo.  */
			lo = env->sregs[SFR_RW_MM_TLB_LO];
			/* Writes are done via r_mm_cause.  */
			hi = env->sregs[SFR_R_MM_CAUSE];

			vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
					      13, 31);
			vaddr <<= TARGET_PAGE_BITS;
			tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
					    3, 3);
			env->tlbsets[srs - 1][set][idx].lo = lo;
			env->tlbsets[srs - 1][set][idx].hi = hi;

			D(fprintf(logfile, 
				  "tlb flush vaddr=%x v=%d pc=%x\n", 
				  vaddr, tlb_v, env->pc));
			tlb_flush_page(env, vaddr);
		}
	}
#endif
}

void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg)
{
	uint32_t srs;
	env->pregs[PR_SRS] &= 3;
	srs = env->pregs[PR_SRS];
	
#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2)
	{
		uint32_t set;
		uint32_t idx;
		uint32_t lo, hi;

		idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
		set >>= 4;
		set &= 3;
		idx &= 15;

		/* Update the mirror regs.  */
		hi = env->tlbsets[srs - 1][set][idx].hi;
		lo = env->tlbsets[srs - 1][set][idx].lo;
		env->sregs[SFR_RW_MM_TLB_HI] = hi;
		env->sregs[SFR_RW_MM_TLB_LO] = lo;
	}
#endif
	env->regs[reg] = env->sregs[srs][sreg];
	RETURN();
}

static void cris_ccs_rshift(CPUState *env)
{
	uint32_t ccs;

	/* Apply the ccs shift.  */
	ccs = env->pregs[PR_CCS];
	ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
	if (ccs & U_FLAG)
	{
		/* Enter user mode.  */
		env->ksp = env->regs[R_SP];
		env->regs[R_SP] = env->pregs[PR_USP];
	}

	env->pregs[PR_CCS] = ccs;
}

void helper_rfe(void)
{
	int rflag = env->pregs[PR_CCS] & R_FLAG;

	D(fprintf(logfile, "rfe: erp=%x pid=%x ccs=%x btarget=%x\n", 
		 env->pregs[PR_ERP], env->pregs[PR_PID],
		 env->pregs[PR_CCS],
		 env->btarget));

	cris_ccs_rshift(env);

	/* RFE sets the P_FLAG only if the R_FLAG is not set.  */
	if (!rflag)
		env->pregs[PR_CCS] |= P_FLAG;
}

void helper_rfn(void)
{
	int rflag = env->pregs[PR_CCS] & R_FLAG;

	D(fprintf(logfile, "rfn: erp=%x pid=%x ccs=%x btarget=%x\n", 
		 env->pregs[PR_ERP], env->pregs[PR_PID],
		 env->pregs[PR_CCS],
		 env->btarget));

	cris_ccs_rshift(env);

	/* Set the P_FLAG only if the R_FLAG is not set.  */
	if (!rflag)
		env->pregs[PR_CCS] |= P_FLAG;

    /* Always set the M flag.  */
    env->pregs[PR_CCS] |= M_FLAG;
}

void helper_store(uint32_t a0)
{
	if (env->pregs[PR_CCS] & P_FLAG )
	{
		cpu_abort(env, "cond_store_failed! pc=%x a0=%x\n",
			  env->pc, a0);
	}
}

void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
                          int is_asi)
{
	D(printf("%s addr=%x w=%d ex=%d asi=%d\n", 
		__func__, addr, is_write, is_exec, is_asi));
}

static void evaluate_flags_writeback(uint32_t flags)
{
	int x;

	/* Extended arithmetics, leave the z flag alone.  */
	x = env->cc_x;
	if ((x || env->cc_op == CC_OP_ADDC)
	    && flags & Z_FLAG)
		env->cc_mask &= ~Z_FLAG;

	/* all insn clear the x-flag except setf or clrf.  */
	env->pregs[PR_CCS] &= ~(env->cc_mask | X_FLAG);
	flags &= env->cc_mask;
	env->pregs[PR_CCS] |= flags;
}

void helper_evaluate_flags_muls(void)
{
	uint32_t src;
	uint32_t dst;
	uint32_t res;
	uint32_t flags = 0;
	int64_t tmp;
	int32_t mof;
	int dneg;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	dneg = ((int32_t)res) < 0;

	mof = env->pregs[PR_MOF];
	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp < 0)
		flags |= N_FLAG;
	if ((dneg && mof != -1)
	    || (!dneg && mof != 0))
		flags |= V_FLAG;
	evaluate_flags_writeback(flags);
}

void  helper_evaluate_flags_mulu(void)
{
	uint32_t src;
	uint32_t dst;
	uint32_t res;
	uint32_t flags = 0;
	uint64_t tmp;
	uint32_t mof;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	mof = env->pregs[PR_MOF];
	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp >> 63)
		flags |= N_FLAG;
	if (mof)
		flags |= V_FLAG;

	evaluate_flags_writeback(flags);
}

void  helper_evaluate_flags_mcp(void)
{
	uint32_t src;
	uint32_t dst;
	uint32_t res;
	uint32_t flags = 0;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (((src & 0x80000000L) == 0L)
		    && ((dst & 0x80000000L) == 0L))
		{
			flags |= V_FLAG;
		}
		else if (((src & 0x80000000L) != 0L) &&
			 ((dst & 0x80000000L) != 0L))
		{
			flags |= R_FLAG;
		}
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (((src & 0x80000000L) != 0L)
		    && ((dst & 0x80000000L) != 0L))
			flags |= V_FLAG;
		if ((dst & 0x80000000L) != 0L
		    || (src & 0x80000000L) != 0L)
			flags |= R_FLAG;
	}

	evaluate_flags_writeback(flags);
}

void  helper_evaluate_flags_alu_4(void)
{
	uint32_t src;
	uint32_t dst;
	uint32_t res;
	uint32_t flags = 0;

	src = env->cc_src;
	dst = env->cc_dest;

	/* Reconstruct the result.  */
	switch (env->cc_op)
	{
		case CC_OP_SUB:
			res = dst - src;
			break;
		case CC_OP_ADD:
			res = dst + src;
			break;
		default:
			res = env->cc_result;
			break;
	}

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		src = ~src;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (((src & 0x80000000L) == 0L)
		    && ((dst & 0x80000000L) == 0L))
		{
			flags |= V_FLAG;
		}
		else if (((src & 0x80000000L) != 0L) &&
			 ((dst & 0x80000000L) != 0L))
		{
			flags |= C_FLAG;
		}
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (((src & 0x80000000L) != 0L)
		    && ((dst & 0x80000000L) != 0L))
			flags |= V_FLAG;
		if ((dst & 0x80000000L) != 0L
		    || (src & 0x80000000L) != 0L)
			flags |= C_FLAG;
	}

	if (env->cc_op == CC_OP_SUB
	    || env->cc_op == CC_OP_CMP) {
		flags ^= C_FLAG;
	}
	evaluate_flags_writeback(flags);
}

void  helper_evaluate_flags_move_4 (void)
{
	uint32_t res;
	uint32_t flags = 0;

	res = env->cc_result;

	if ((int32_t)res < 0)
		flags |= N_FLAG;
	else if (res == 0L)
		flags |= Z_FLAG;

	evaluate_flags_writeback(flags);
}
void  helper_evaluate_flags_move_2 (void)
{
	uint32_t src;
	uint32_t flags = 0;
	uint16_t res;

	src = env->cc_src;
	res = env->cc_result;

	if ((int16_t)res < 0L)
		flags |= N_FLAG;
	else if (res == 0)
		flags |= Z_FLAG;

	evaluate_flags_writeback(flags);
}

/* TODO: This is expensive. We could split things up and only evaluate part of
   CCR on a need to know basis. For now, we simply re-evaluate everything.  */
void helper_evaluate_flags (void)
{
	uint32_t src;
	uint32_t dst;
	uint32_t res;
	uint32_t flags = 0;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		src = ~src;

	/* Now, evaluate the flags. This stuff is based on
	   Per Zander's CRISv10 simulator.  */
	switch (env->cc_size)
	{
		case 1:
			if ((res & 0x80L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80L) == 0L)
				    && ((dst & 0x80L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80L) != 0L)
					 && ((dst & 0x80L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x80L) != 0L)
				    && ((dst & 0x80L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x80L) != 0L
				    || (src & 0x80L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 2:
			if ((res & 0x8000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x8000L) == 0L)
				    && ((dst & 0x8000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x8000L) != 0L)
					 && ((dst & 0x8000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x8000L) != 0L)
				    && ((dst & 0x8000L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x8000L) != 0L
				    || (src & 0x8000L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 4:
			if ((res & 0x80000000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80000000L) == 0L)
				    && ((dst & 0x80000000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80000000L) != 0L) &&
					 ((dst & 0x80000000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if (res == 0L)
					flags |= Z_FLAG;
				if (((src & 0x80000000L) != 0L)
				    && ((dst & 0x80000000L) != 0L))
					flags |= V_FLAG;
				if ((dst & 0x80000000L) != 0L
				    || (src & 0x80000000L) != 0L)
					flags |= C_FLAG;
			}
			break;
		default:
			break;
	}

	if (env->cc_op == CC_OP_SUB
	    || env->cc_op == CC_OP_CMP) {
		flags ^= C_FLAG;
	}
	evaluate_flags_writeback(flags);
}

void helper_top_evaluate_flags(void)
{
	switch (env->cc_op)
	{
		case CC_OP_MCP:
			helper_evaluate_flags_mcp();
			break;
		case CC_OP_MULS:
			helper_evaluate_flags_muls();
			break;
		case CC_OP_MULU:
			helper_evaluate_flags_mulu();
			break;
		case CC_OP_MOVE:
		case CC_OP_AND:
		case CC_OP_OR:
		case CC_OP_XOR:
		case CC_OP_ASR:
		case CC_OP_LSR:
		case CC_OP_LSL:
			switch (env->cc_size)
			{
				case 4:
					helper_evaluate_flags_move_4();
					break;
				case 2:
					helper_evaluate_flags_move_2();
					break;
				default:
					helper_evaluate_flags();
					break;
			}
			break;
		case CC_OP_FLAGS:
			/* live.  */
			break;
		default:
		{
			switch (env->cc_size)
			{
				case 4:
					helper_evaluate_flags_alu_4();
					break;
				default:
					helper_evaluate_flags();
					break;
			}
		}
		break;
	}
}
Commit	Line	Data
81fdc5f8 TS	1	/*
	2	* CRIS helper routines
	3	*
	4	* Copyright (c) 2007 AXIS Communications
	5	* Written by Edgar E. Iglesias
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
	22	#include <assert.h>
	23	#include "exec.h"
786c02f1	24	#include "mmu.h"
30abcfc7	25	#include "helper.h"
81fdc5f8	26
e2eef170 PB	27	#define D(x)
	28
	29	#if !defined(CONFIG_USER_ONLY)
	30
81fdc5f8	31	#define MMUSUFFIX _mmu
81fdc5f8 TS	32
	33	#define SHIFT 0
	34	#include "softmmu_template.h"
	35
	36	#define SHIFT 1
	37	#include "softmmu_template.h"
	38
	39	#define SHIFT 2
	40	#include "softmmu_template.h"
	41
	42	#define SHIFT 3
	43	#include "softmmu_template.h"
	44
	45	/* Try to fill the TLB and return an exception if error. If retaddr is
	46	NULL, it means that the function was called in C code (i.e. not
	47	from generated code or from helper.c) */
	48	/* XXX: fix it to restore all registers */
6ebbf390	49	void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
81fdc5f8 TS	50	{
	51	TranslationBlock *tb;
	52	CPUState *saved_env;
44f8625d	53	unsigned long pc;
81fdc5f8 TS	54	int ret;
	55
	56	/* XXX: hack to restore env in all cases, even if not called from
	57	generated code */
	58	saved_env = env;
	59	env = cpu_single_env;
b41f7df0	60
ef29a70d EI	61	D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__,
ef29a70d EI	62	env->pc, env->debug1, retaddr));
6ebbf390	63	ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
81fdc5f8 TS	64	if (__builtin_expect(ret, 0)) {
	65	if (retaddr) {
	66	/* now we have a real cpu fault */
44f8625d	67	pc = (unsigned long)retaddr;
81fdc5f8 TS	68	tb = tb_find_pc(pc);
	69	if (tb) {
	70	/* the PC is inside the translated code. It means that we have
	71	a virtual CPU fault */
	72	cpu_restore_state(tb, env, pc, NULL);
30abcfc7 EI	73
	74	/* Evaluate flags after retranslation. */
	75	helper_top_evaluate_flags();
81fdc5f8 TS	76	}
	77	}
	78	cpu_loop_exit();
	79	}
	80	env = saved_env;
	81	}
	82
e2eef170 PB	83	#endif
e2eef170 PB	84
dceaf394	85	void helper_raise_exception(uint32_t index)
786c02f1	86	{
dceaf394 EI	87	env->exception_index = index;
dceaf394 EI	88	cpu_loop_exit();
786c02f1 EI	89	}
786c02f1 EI	90
cf1d97f0 EI	91	void helper_tlb_flush_pid(uint32_t pid)
	92	{
	93	#if !defined(CONFIG_USER_ONLY)
	94	cris_mmu_flush_pid(env, pid);
	95	#endif
	96	}
	97
30abcfc7	98	void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
b41f7df0 EI	99	{
	100	(fprintf(logfile, "%s: a0=%x a1=%x\n", __func__, a0, a1));
	101	}
	102
	103	void helper_dummy(void)
	104	{
	105
	106	}
	107
cf1d97f0 EI	108	/* Used by the tlb decoder. */
	109	#define EXTRACT_FIELD(src, start, end) \
	110	(((src) >> start) & ((1 << (end - start + 1)) - 1))
	111
dceaf394 EI	112	void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
	113	{
	114	uint32_t srs;
	115	srs = env->pregs[PR_SRS];
	116	srs &= 3;
	117	env->sregs[srs][sreg] = env->regs[reg];
	118
	119	#if !defined(CONFIG_USER_ONLY)
	120	if (srs == 1 \|\| srs == 2) {
	121	if (sreg == 6) {
	122	/* Writes to tlb-hi write to mm_cause as a side
	123	effect. */
6913ba56 EI	124	env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
6913ba56 EI	125	env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
dceaf394 EI	126	}
	127	else if (sreg == 5) {
	128	uint32_t set;
	129	uint32_t idx;
	130	uint32_t lo, hi;
	131	uint32_t vaddr;
cf1d97f0	132	int tlb_v;
dceaf394 EI	133
	134	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	135	set >>= 4;
	136	set &= 3;
	137
	138	idx &= 15;
	139	/* We've just made a write to tlb_lo. */
	140	lo = env->sregs[SFR_RW_MM_TLB_LO];
	141	/* Writes are done via r_mm_cause. */
	142	hi = env->sregs[SFR_R_MM_CAUSE];
cf1d97f0 EI	143
	144	vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
	145	13, 31);
	146	vaddr <<= TARGET_PAGE_BITS;
	147	tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
	148	3, 3);
dceaf394 EI	149	env->tlbsets[srs - 1][set][idx].lo = lo;
dceaf394 EI	150	env->tlbsets[srs - 1][set][idx].hi = hi;
cf1d97f0 EI	151
	152	D(fprintf(logfile,
	153	"tlb flush vaddr=%x v=%d pc=%x\n",
	154	vaddr, tlb_v, env->pc));
	155	tlb_flush_page(env, vaddr);
dceaf394 EI	156	}
	157	}
	158	#endif
	159	}
	160
	161	void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg)
	162	{
	163	uint32_t srs;
	164	env->pregs[PR_SRS] &= 3;
	165	srs = env->pregs[PR_SRS];
	166
	167	#if !defined(CONFIG_USER_ONLY)
	168	if (srs == 1 \|\| srs == 2)
	169	{
	170	uint32_t set;
	171	uint32_t idx;
	172	uint32_t lo, hi;
	173
	174	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	175	set >>= 4;
	176	set &= 3;
	177	idx &= 15;
	178
	179	/* Update the mirror regs. */
	180	hi = env->tlbsets[srs - 1][set][idx].hi;
	181	lo = env->tlbsets[srs - 1][set][idx].lo;
	182	env->sregs[SFR_RW_MM_TLB_HI] = hi;
	183	env->sregs[SFR_RW_MM_TLB_LO] = lo;
	184	}
	185	#endif
	186	env->regs[reg] = env->sregs[srs][sreg];
	187	RETURN();
	188	}
	189
	190	static void cris_ccs_rshift(CPUState *env)
	191	{
	192	uint32_t ccs;
	193
	194	/* Apply the ccs shift. */
	195	ccs = env->pregs[PR_CCS];
	196	ccs = (ccs & 0xc0000000) \| ((ccs & 0x0fffffff) >> 10);
	197	if (ccs & U_FLAG)
	198	{
	199	/* Enter user mode. */
	200	env->ksp = env->regs[R_SP];
	201	env->regs[R_SP] = env->pregs[PR_USP];
	202	}
	203
	204	env->pregs[PR_CCS] = ccs;
	205	}
	206
b41f7df0 EI	207	void helper_rfe(void)
b41f7df0 EI	208	{
bf443337 EI	209	int rflag = env->pregs[PR_CCS] & R_FLAG;
bf443337 EI	210
b41f7df0 EI	211	D(fprintf(logfile, "rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
	212	env->pregs[PR_ERP], env->pregs[PR_PID],
	213	env->pregs[PR_CCS],
	214	env->btarget));
dceaf394 EI	215
	216	cris_ccs_rshift(env);
	217
	218	/* RFE sets the P_FLAG only if the R_FLAG is not set. */
bf443337	219	if (!rflag)
dceaf394	220	env->pregs[PR_CCS] \|= P_FLAG;
b41f7df0 EI	221	}
b41f7df0 EI	222
5bf8f1ab EI	223	void helper_rfn(void)
	224	{
	225	int rflag = env->pregs[PR_CCS] & R_FLAG;
	226
	227	D(fprintf(logfile, "rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
	228	env->pregs[PR_ERP], env->pregs[PR_PID],
	229	env->pregs[PR_CCS],
	230	env->btarget));
	231
	232	cris_ccs_rshift(env);
	233
	234	/* Set the P_FLAG only if the R_FLAG is not set. */
	235	if (!rflag)
	236	env->pregs[PR_CCS] \|= P_FLAG;
	237
	238	/* Always set the M flag. */
	239	env->pregs[PR_CCS] \|= M_FLAG;
	240	}
	241
b41f7df0 EI	242	void helper_store(uint32_t a0)
	243	{
	244	if (env->pregs[PR_CCS] & P_FLAG )
	245	{
	246	cpu_abort(env, "cond_store_failed! pc=%x a0=%x\n",
	247	env->pc, a0);
	248	}
	249	}
	250
81fdc5f8 TS	251	void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
	252	int is_asi)
	253	{
786c02f1 EI	254	D(printf("%s addr=%x w=%d ex=%d asi=%d\n",
786c02f1 EI	255	__func__, addr, is_write, is_exec, is_asi));
81fdc5f8	256	}
b41f7df0 EI	257
	258	static void evaluate_flags_writeback(uint32_t flags)
	259	{
	260	int x;
	261
	262	/* Extended arithmetics, leave the z flag alone. */
30abcfc7	263	x = env->cc_x;
b41f7df0 EI	264	if ((x \|\| env->cc_op == CC_OP_ADDC)
	265	&& flags & Z_FLAG)
	266	env->cc_mask &= ~Z_FLAG;
	267
	268	/* all insn clear the x-flag except setf or clrf. */
	269	env->pregs[PR_CCS] &= ~(env->cc_mask \| X_FLAG);
	270	flags &= env->cc_mask;
	271	env->pregs[PR_CCS] \|= flags;
b41f7df0 EI	272	}
	273
	274	void helper_evaluate_flags_muls(void)
	275	{
	276	uint32_t src;
	277	uint32_t dst;
	278	uint32_t res;
	279	uint32_t flags = 0;
dceaf394	280	int64_t tmp;
b41f7df0 EI	281	int32_t mof;
	282	int dneg;
	283
	284	src = env->cc_src;
	285	dst = env->cc_dest;
	286	res = env->cc_result;
	287
b41f7df0 EI	288	dneg = ((int32_t)res) < 0;
b41f7df0 EI	289
dceaf394 EI	290	mof = env->pregs[PR_MOF];
	291	tmp = mof;
	292	tmp <<= 32;
	293	tmp \|= res;
b41f7df0 EI	294	if (tmp == 0)
	295	flags \|= Z_FLAG;
	296	else if (tmp < 0)
	297	flags \|= N_FLAG;
	298	if ((dneg && mof != -1)
	299	\|\| (!dneg && mof != 0))
	300	flags \|= V_FLAG;
	301	evaluate_flags_writeback(flags);
	302	}
	303
	304	void helper_evaluate_flags_mulu(void)
	305	{
	306	uint32_t src;
	307	uint32_t dst;
	308	uint32_t res;
	309	uint32_t flags = 0;
dceaf394	310	uint64_t tmp;
b41f7df0 EI	311	uint32_t mof;
	312
	313	src = env->cc_src;
	314	dst = env->cc_dest;
	315	res = env->cc_result;
	316
dceaf394 EI	317	mof = env->pregs[PR_MOF];
	318	tmp = mof;
	319	tmp <<= 32;
	320	tmp \|= res;
b41f7df0 EI	321	if (tmp == 0)
	322	flags \|= Z_FLAG;
	323	else if (tmp >> 63)
	324	flags \|= N_FLAG;
	325	if (mof)
	326	flags \|= V_FLAG;
	327
	328	evaluate_flags_writeback(flags);
	329	}
	330
	331	void helper_evaluate_flags_mcp(void)
	332	{
	333	uint32_t src;
	334	uint32_t dst;
	335	uint32_t res;
	336	uint32_t flags = 0;
	337
	338	src = env->cc_src;
	339	dst = env->cc_dest;
	340	res = env->cc_result;
	341
	342	if ((res & 0x80000000L) != 0L)
	343	{
	344	flags \|= N_FLAG;
	345	if (((src & 0x80000000L) == 0L)
	346	&& ((dst & 0x80000000L) == 0L))
	347	{
	348	flags \|= V_FLAG;
	349	}
	350	else if (((src & 0x80000000L) != 0L) &&
	351	((dst & 0x80000000L) != 0L))
	352	{
	353	flags \|= R_FLAG;
	354	}
	355	}
	356	else
	357	{
	358	if (res == 0L)
	359	flags \|= Z_FLAG;
	360	if (((src & 0x80000000L) != 0L)
	361	&& ((dst & 0x80000000L) != 0L))
	362	flags \|= V_FLAG;
	363	if ((dst & 0x80000000L) != 0L
	364	\|\| (src & 0x80000000L) != 0L)
	365	flags \|= R_FLAG;
	366	}
	367
	368	evaluate_flags_writeback(flags);
	369	}
	370
	371	void helper_evaluate_flags_alu_4(void)
	372	{
	373	uint32_t src;
	374	uint32_t dst;
	375	uint32_t res;
	376	uint32_t flags = 0;
	377
	378	src = env->cc_src;
	379	dst = env->cc_dest;
30abcfc7 EI	380
	381	/* Reconstruct the result. */
	382	switch (env->cc_op)
	383	{
	384	case CC_OP_SUB:
	385	res = dst - src;
	386	break;
	387	case CC_OP_ADD:
	388	res = dst + src;
	389	break;
	390	default:
	391	res = env->cc_result;
	392	break;
	393	}
	394
	395	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
	396	src = ~src;
b41f7df0 EI	397
	398	if ((res & 0x80000000L) != 0L)
	399	{
	400	flags \|= N_FLAG;
	401	if (((src & 0x80000000L) == 0L)
	402	&& ((dst & 0x80000000L) == 0L))
	403	{
	404	flags \|= V_FLAG;
	405	}
	406	else if (((src & 0x80000000L) != 0L) &&
	407	((dst & 0x80000000L) != 0L))
	408	{
	409	flags \|= C_FLAG;
	410	}
	411	}
	412	else
	413	{
	414	if (res == 0L)
	415	flags \|= Z_FLAG;
	416	if (((src & 0x80000000L) != 0L)
	417	&& ((dst & 0x80000000L) != 0L))
	418	flags \|= V_FLAG;
	419	if ((dst & 0x80000000L) != 0L
	420	\|\| (src & 0x80000000L) != 0L)
	421	flags \|= C_FLAG;
	422	}
	423
	424	if (env->cc_op == CC_OP_SUB
	425	\|\| env->cc_op == CC_OP_CMP) {
	426	flags ^= C_FLAG;
	427	}
	428	evaluate_flags_writeback(flags);
	429	}
	430
	431	void helper_evaluate_flags_move_4 (void)
	432	{
b41f7df0 EI	433	uint32_t res;
	434	uint32_t flags = 0;
	435
b41f7df0 EI	436	res = env->cc_result;
	437
	438	if ((int32_t)res < 0)
	439	flags \|= N_FLAG;
	440	else if (res == 0L)
	441	flags \|= Z_FLAG;
	442
	443	evaluate_flags_writeback(flags);
	444	}
	445	void helper_evaluate_flags_move_2 (void)
	446	{
	447	uint32_t src;
	448	uint32_t flags = 0;
	449	uint16_t res;
	450
	451	src = env->cc_src;
	452	res = env->cc_result;
	453
	454	if ((int16_t)res < 0L)
	455	flags \|= N_FLAG;
	456	else if (res == 0)
	457	flags \|= Z_FLAG;
	458
	459	evaluate_flags_writeback(flags);
	460	}
	461
	462	/* TODO: This is expensive. We could split things up and only evaluate part of
	463	CCR on a need to know basis. For now, we simply re-evaluate everything. */
	464	void helper_evaluate_flags (void)
	465	{
	466	uint32_t src;
	467	uint32_t dst;
	468	uint32_t res;
	469	uint32_t flags = 0;
	470
	471	src = env->cc_src;
	472	dst = env->cc_dest;
	473	res = env->cc_result;
	474
30abcfc7 EI	475	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
30abcfc7 EI	476	src = ~src;
b41f7df0 EI	477
	478	/* Now, evaluate the flags. This stuff is based on
	479	Per Zander's CRISv10 simulator. */
	480	switch (env->cc_size)
	481	{
	482	case 1:
	483	if ((res & 0x80L) != 0L)
	484	{
	485	flags \|= N_FLAG;
	486	if (((src & 0x80L) == 0L)
	487	&& ((dst & 0x80L) == 0L))
	488	{
	489	flags \|= V_FLAG;
	490	}
	491	else if (((src & 0x80L) != 0L)
	492	&& ((dst & 0x80L) != 0L))
	493	{
	494	flags \|= C_FLAG;
	495	}
	496	}
	497	else
	498	{
	499	if ((res & 0xFFL) == 0L)
	500	{
	501	flags \|= Z_FLAG;
	502	}
	503	if (((src & 0x80L) != 0L)
	504	&& ((dst & 0x80L) != 0L))
	505	{
	506	flags \|= V_FLAG;
	507	}
	508	if ((dst & 0x80L) != 0L
	509	\|\| (src & 0x80L) != 0L)
	510	{
	511	flags \|= C_FLAG;
	512	}
	513	}
	514	break;
	515	case 2:
	516	if ((res & 0x8000L) != 0L)
	517	{
	518	flags \|= N_FLAG;
	519	if (((src & 0x8000L) == 0L)
	520	&& ((dst & 0x8000L) == 0L))
	521	{
	522	flags \|= V_FLAG;
	523	}
	524	else if (((src & 0x8000L) != 0L)
	525	&& ((dst & 0x8000L) != 0L))
	526	{
	527	flags \|= C_FLAG;
	528	}
	529	}
	530	else
	531	{
	532	if ((res & 0xFFFFL) == 0L)
	533	{
	534	flags \|= Z_FLAG;
	535	}
	536	if (((src & 0x8000L) != 0L)
	537	&& ((dst & 0x8000L) != 0L))
	538	{
	539	flags \|= V_FLAG;
	540	}
541	if ((dst & 0x8000L) != 0L
542	\|\| (src & 0x8000L) != 0L)
543	{
544	flags \|= C_FLAG;
545	}
546	}
547	break;
548	case 4:
549	if ((res & 0x80000000L) != 0L)
550	{
551	flags \|= N_FLAG;
552	if (((src & 0x80000000L) == 0L)
553	&& ((dst & 0x80000000L) == 0L))
554	{
555	flags \|= V_FLAG;
556	}
557	else if (((src & 0x80000000L) != 0L) &&
558	((dst & 0x80000000L) != 0L))
559	{
560	flags \|= C_FLAG;
561	}
562	}
563	else
564	{
565	if (res == 0L)
566	flags \|= Z_FLAG;
567	if (((src & 0x80000000L) != 0L)
568	&& ((dst & 0x80000000L) != 0L))
569	flags \|= V_FLAG;
570	if ((dst & 0x80000000L) != 0L
571	\|\| (src & 0x80000000L) != 0L)
572	flags \|= C_FLAG;
573	}
574	break;
575	default:
576	break;
577	}
578
579	if (env->cc_op == CC_OP_SUB
580	\|\| env->cc_op == CC_OP_CMP) {
581	flags ^= C_FLAG;
582	}
583	evaluate_flags_writeback(flags);
584	}
30abcfc7 EI	585
	586	void helper_top_evaluate_flags(void)
	587	{
	588	switch (env->cc_op)
	589	{
	590	case CC_OP_MCP:
	591	helper_evaluate_flags_mcp();
	592	break;
	593	case CC_OP_MULS:
	594	helper_evaluate_flags_muls();
	595	break;
	596	case CC_OP_MULU:
	597	helper_evaluate_flags_mulu();
	598	break;
	599	case CC_OP_MOVE:
	600	case CC_OP_AND:
	601	case CC_OP_OR:
	602	case CC_OP_XOR:
	603	case CC_OP_ASR:
	604	case CC_OP_LSR:
	605	case CC_OP_LSL:
	606	switch (env->cc_size)
	607	{
	608	case 4:
	609	helper_evaluate_flags_move_4();
	610	break;
	611	case 2:
	612	helper_evaluate_flags_move_2();
	613	break;
	614	default:
	615	helper_evaluate_flags();
	616	break;
	617	}
	618	break;
	619	case CC_OP_FLAGS:
	620	/* live. */
	621	break;
	622	default:
	623	{
	624	switch (env->cc_size)
	625	{
	626	case 4:
	627	helper_evaluate_flags_alu_4();
	628	break;
	629	default:
	630	helper_evaluate_flags();
	631	break;
	632	}
	633	}
	634	break;
	635	}
	636	}