[qemu.git] / target-i386 / int_helper.c

/*
 *  x86 integer helpers
 *
 *  Copyright (c) 2003 Fabrice Bellard
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include "cpu.h"
#include "qemu/host-utils.h"
#include "helper.h"

//#define DEBUG_MULDIV

/* modulo 9 table */
static const uint8_t rclb_table[32] = {
    0, 1, 2, 3, 4, 5, 6, 7,
    8, 0, 1, 2, 3, 4, 5, 6,
    7, 8, 0, 1, 2, 3, 4, 5,
    6, 7, 8, 0, 1, 2, 3, 4,
};

/* modulo 17 table */
static const uint8_t rclw_table[32] = {
    0, 1, 2, 3, 4, 5, 6, 7,
    8, 9, 10, 11, 12, 13, 14, 15,
    16, 0, 1, 2, 3, 4, 5, 6,
    7, 8, 9, 10, 11, 12, 13, 14,
};

/* division, flags are undefined */

void helper_divb_AL(CPUX86State *env, target_ulong t0)
{
    unsigned int num, den, q, r;

    num = (env->regs[R_EAX] & 0xffff);
    den = (t0 & 0xff);
    if (den == 0) {
        raise_exception(env, EXCP00_DIVZ);
    }
    q = (num / den);
    if (q > 0xff) {
        raise_exception(env, EXCP00_DIVZ);
    }
    q &= 0xff;
    r = (num % den) & 0xff;
    env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | (r << 8) | q;
}

void helper_idivb_AL(CPUX86State *env, target_ulong t0)
{
    int num, den, q, r;

    num = (int16_t)env->regs[R_EAX];
    den = (int8_t)t0;
    if (den == 0) {
        raise_exception(env, EXCP00_DIVZ);
    }
    q = (num / den);
    if (q != (int8_t)q) {
        raise_exception(env, EXCP00_DIVZ);
    }
    q &= 0xff;
    r = (num % den) & 0xff;
    env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | (r << 8) | q;
}

void helper_divw_AX(CPUX86State *env, target_ulong t0)
{
    unsigned int num, den, q, r;

    num = (env->regs[R_EAX] & 0xffff) | ((env->regs[R_EDX] & 0xffff) << 16);
    den = (t0 & 0xffff);
    if (den == 0) {
        raise_exception(env, EXCP00_DIVZ);
    }
    q = (num / den);
    if (q > 0xffff) {
        raise_exception(env, EXCP00_DIVZ);
    }
    q &= 0xffff;
    r = (num % den) & 0xffff;
    env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | q;
    env->regs[R_EDX] = (env->regs[R_EDX] & ~0xffff) | r;
}

void helper_idivw_AX(CPUX86State *env, target_ulong t0)
{
    int num, den, q, r;

    num = (env->regs[R_EAX] & 0xffff) | ((env->regs[R_EDX] & 0xffff) << 16);
    den = (int16_t)t0;
    if (den == 0) {
        raise_exception(env, EXCP00_DIVZ);
    }
    q = (num / den);
    if (q != (int16_t)q) {
        raise_exception(env, EXCP00_DIVZ);
    }
    q &= 0xffff;
    r = (num % den) & 0xffff;
    env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | q;
    env->regs[R_EDX] = (env->regs[R_EDX] & ~0xffff) | r;
}

void helper_divl_EAX(CPUX86State *env, target_ulong t0)
{
    unsigned int den, r;
    uint64_t num, q;

    num = ((uint32_t)env->regs[R_EAX]) | ((uint64_t)((uint32_t)env->regs[R_EDX]) << 32);
    den = t0;
    if (den == 0) {
        raise_exception(env, EXCP00_DIVZ);
    }
    q = (num / den);
    r = (num % den);
    if (q > 0xffffffff) {
        raise_exception(env, EXCP00_DIVZ);
    }
    env->regs[R_EAX] = (uint32_t)q;
    env->regs[R_EDX] = (uint32_t)r;
}

void helper_idivl_EAX(CPUX86State *env, target_ulong t0)
{
    int den, r;
    int64_t num, q;

    num = ((uint32_t)env->regs[R_EAX]) | ((uint64_t)((uint32_t)env->regs[R_EDX]) << 32);
    den = t0;
    if (den == 0) {
        raise_exception(env, EXCP00_DIVZ);
    }
    q = (num / den);
    r = (num % den);
    if (q != (int32_t)q) {
        raise_exception(env, EXCP00_DIVZ);
    }
    env->regs[R_EAX] = (uint32_t)q;
    env->regs[R_EDX] = (uint32_t)r;
}

/* bcd */

/* XXX: exception */
void helper_aam(CPUX86State *env, int base)
{
    int al, ah;

    al = env->regs[R_EAX] & 0xff;
    ah = al / base;
    al = al % base;
    env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | al | (ah << 8);
    CC_DST = al;
}

void helper_aad(CPUX86State *env, int base)
{
    int al, ah;

    al = env->regs[R_EAX] & 0xff;
    ah = (env->regs[R_EAX] >> 8) & 0xff;
    al = ((ah * base) + al) & 0xff;
    env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | al;
    CC_DST = al;
}

void helper_aaa(CPUX86State *env)
{
    int icarry;
    int al, ah, af;
    int eflags;

    eflags = cpu_cc_compute_all(env, CC_OP);
    af = eflags & CC_A;
    al = env->regs[R_EAX] & 0xff;
    ah = (env->regs[R_EAX] >> 8) & 0xff;

    icarry = (al > 0xf9);
    if (((al & 0x0f) > 9) || af) {
        al = (al + 6) & 0x0f;
        ah = (ah + 1 + icarry) & 0xff;
        eflags |= CC_C | CC_A;
    } else {
        eflags &= ~(CC_C | CC_A);
        al &= 0x0f;
    }
    env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | al | (ah << 8);
    CC_SRC = eflags;
}

void helper_aas(CPUX86State *env)
{
    int icarry;
    int al, ah, af;
    int eflags;

    eflags = cpu_cc_compute_all(env, CC_OP);
    af = eflags & CC_A;
    al = env->regs[R_EAX] & 0xff;
    ah = (env->regs[R_EAX] >> 8) & 0xff;

    icarry = (al < 6);
    if (((al & 0x0f) > 9) || af) {
        al = (al - 6) & 0x0f;
        ah = (ah - 1 - icarry) & 0xff;
        eflags |= CC_C | CC_A;
    } else {
        eflags &= ~(CC_C | CC_A);
        al &= 0x0f;
    }
    env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | al | (ah << 8);
    CC_SRC = eflags;
}

void helper_daa(CPUX86State *env)
{
    int old_al, al, af, cf;
    int eflags;

    eflags = cpu_cc_compute_all(env, CC_OP);
    cf = eflags & CC_C;
    af = eflags & CC_A;
    old_al = al = env->regs[R_EAX] & 0xff;

    eflags = 0;
    if (((al & 0x0f) > 9) || af) {
        al = (al + 6) & 0xff;
        eflags |= CC_A;
    }
    if ((old_al > 0x99) || cf) {
        al = (al + 0x60) & 0xff;
        eflags |= CC_C;
    }
    env->regs[R_EAX] = (env->regs[R_EAX] & ~0xff) | al;
    /* well, speed is not an issue here, so we compute the flags by hand */
    eflags |= (al == 0) << 6; /* zf */
    eflags |= parity_table[al]; /* pf */
    eflags |= (al & 0x80); /* sf */
    CC_SRC = eflags;
}

void helper_das(CPUX86State *env)
{
    int al, al1, af, cf;
    int eflags;

    eflags = cpu_cc_compute_all(env, CC_OP);
    cf = eflags & CC_C;
    af = eflags & CC_A;
    al = env->regs[R_EAX] & 0xff;

    eflags = 0;
    al1 = al;
    if (((al & 0x0f) > 9) || af) {
        eflags |= CC_A;
        if (al < 6 || cf) {
            eflags |= CC_C;
        }
        al = (al - 6) & 0xff;
    }
    if ((al1 > 0x99) || cf) {
        al = (al - 0x60) & 0xff;
        eflags |= CC_C;
    }
    env->regs[R_EAX] = (env->regs[R_EAX] & ~0xff) | al;
    /* well, speed is not an issue here, so we compute the flags by hand */
    eflags |= (al == 0) << 6; /* zf */
    eflags |= parity_table[al]; /* pf */
    eflags |= (al & 0x80); /* sf */
    CC_SRC = eflags;
}

#ifdef TARGET_X86_64
static void add128(uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b)
{
    *plow += a;
    /* carry test */
    if (*plow < a) {
        (*phigh)++;
    }
    *phigh += b;
}

static void neg128(uint64_t *plow, uint64_t *phigh)
{
    *plow = ~*plow;
    *phigh = ~*phigh;
    add128(plow, phigh, 1, 0);
}

/* return TRUE if overflow */
static int div64(uint64_t *plow, uint64_t *phigh, uint64_t b)
{
    uint64_t q, r, a1, a0;
    int i, qb, ab;

    a0 = *plow;
    a1 = *phigh;
    if (a1 == 0) {
        q = a0 / b;
        r = a0 % b;
        *plow = q;
        *phigh = r;
    } else {
        if (a1 >= b) {
            return 1;
        }
        /* XXX: use a better algorithm */
        for (i = 0; i < 64; i++) {
            ab = a1 >> 63;
            a1 = (a1 << 1) | (a0 >> 63);
            if (ab || a1 >= b) {
                a1 -= b;
                qb = 1;
            } else {
                qb = 0;
            }
            a0 = (a0 << 1) | qb;
        }
#if defined(DEBUG_MULDIV)
        printf("div: 0x%016" PRIx64 "%016" PRIx64 " / 0x%016" PRIx64
               ": q=0x%016" PRIx64 " r=0x%016" PRIx64 "\n",
               *phigh, *plow, b, a0, a1);
#endif
        *plow = a0;
        *phigh = a1;
    }
    return 0;
}

/* return TRUE if overflow */
static int idiv64(uint64_t *plow, uint64_t *phigh, int64_t b)
{
    int sa, sb;

    sa = ((int64_t)*phigh < 0);
    if (sa) {
        neg128(plow, phigh);
    }
    sb = (b < 0);
    if (sb) {
        b = -b;
    }
    if (div64(plow, phigh, b) != 0) {
        return 1;
    }
    if (sa ^ sb) {
        if (*plow > (1ULL << 63)) {
            return 1;
        }
        *plow = -*plow;
    } else {
        if (*plow >= (1ULL << 63)) {
            return 1;
        }
    }
    if (sa) {
        *phigh = -*phigh;
    }
    return 0;
}

void helper_divq_EAX(CPUX86State *env, target_ulong t0)
{
    uint64_t r0, r1;

    if (t0 == 0) {
        raise_exception(env, EXCP00_DIVZ);
    }
    r0 = env->regs[R_EAX];
    r1 = env->regs[R_EDX];
    if (div64(&r0, &r1, t0)) {
        raise_exception(env, EXCP00_DIVZ);
    }
    env->regs[R_EAX] = r0;
    env->regs[R_EDX] = r1;
}

void helper_idivq_EAX(CPUX86State *env, target_ulong t0)
{
    uint64_t r0, r1;

    if (t0 == 0) {
        raise_exception(env, EXCP00_DIVZ);
    }
    r0 = env->regs[R_EAX];
    r1 = env->regs[R_EDX];
    if (idiv64(&r0, &r1, t0)) {
        raise_exception(env, EXCP00_DIVZ);
    }
    env->regs[R_EAX] = r0;
    env->regs[R_EDX] = r1;
}
#endif

#if TARGET_LONG_BITS == 32
# define ctztl  ctz32
# define clztl  clz32
#else
# define ctztl  ctz64
# define clztl  clz64
#endif

/* bit operations */
target_ulong helper_ctz(target_ulong t0)
{
    return ctztl(t0);
}

target_ulong helper_clz(target_ulong t0)
{
    return clztl(t0);
}

target_ulong helper_pdep(target_ulong src, target_ulong mask)
{
    target_ulong dest = 0;
    int i, o;

    for (i = 0; mask != 0; i++) {
        o = ctztl(mask);
        mask &= mask - 1;
        dest |= ((src >> i) & 1) << o;
    }
    return dest;
}

target_ulong helper_pext(target_ulong src, target_ulong mask)
{
    target_ulong dest = 0;
    int i, o;

    for (o = 0; mask != 0; o++) {
        i = ctztl(mask);
        mask &= mask - 1;
        dest |= ((src >> i) & 1) << o;
    }
    return dest;
}

#define SHIFT 0
#include "shift_helper_template.h"
#undef SHIFT

#define SHIFT 1
#include "shift_helper_template.h"
#undef SHIFT

#define SHIFT 2
#include "shift_helper_template.h"
#undef SHIFT

#ifdef TARGET_X86_64
#define SHIFT 3
#include "shift_helper_template.h"
#undef SHIFT
#endif
Commit	Line	Data
d7582078 BS	1	/*
	2	* x86 integer helpers
	3	*
	4	* Copyright (c) 2003 Fabrice Bellard
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#include "cpu.h"
1de7afc9	21	#include "qemu/host-utils.h"
d7582078 BS	22	#include "helper.h"
	23
	24	//#define DEBUG_MULDIV
	25
	26	/* modulo 9 table */
	27	static const uint8_t rclb_table[32] = {
	28	0, 1, 2, 3, 4, 5, 6, 7,
	29	8, 0, 1, 2, 3, 4, 5, 6,
	30	7, 8, 0, 1, 2, 3, 4, 5,
	31	6, 7, 8, 0, 1, 2, 3, 4,
	32	};
	33
	34	/* modulo 17 table */
	35	static const uint8_t rclw_table[32] = {
	36	0, 1, 2, 3, 4, 5, 6, 7,
	37	8, 9, 10, 11, 12, 13, 14, 15,
	38	16, 0, 1, 2, 3, 4, 5, 6,
	39	7, 8, 9, 10, 11, 12, 13, 14,
	40	};
	41
	42	/* division, flags are undefined */
	43
7923057b	44	void helper_divb_AL(CPUX86State *env, target_ulong t0)
d7582078 BS	45	{
	46	unsigned int num, den, q, r;
	47
4b34e3ad	48	num = (env->regs[R_EAX] & 0xffff);
d7582078 BS	49	den = (t0 & 0xff);
	50	if (den == 0) {
	51	raise_exception(env, EXCP00_DIVZ);
	52	}
	53	q = (num / den);
	54	if (q > 0xff) {
	55	raise_exception(env, EXCP00_DIVZ);
	56	}
	57	q &= 0xff;
	58	r = (num % den) & 0xff;
4b34e3ad	59	env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) \| (r << 8) \| q;
d7582078 BS	60	}
d7582078 BS	61
7923057b	62	void helper_idivb_AL(CPUX86State *env, target_ulong t0)
d7582078 BS	63	{
	64	int num, den, q, r;
	65
4b34e3ad	66	num = (int16_t)env->regs[R_EAX];
d7582078 BS	67	den = (int8_t)t0;
	68	if (den == 0) {
	69	raise_exception(env, EXCP00_DIVZ);
	70	}
	71	q = (num / den);
	72	if (q != (int8_t)q) {
	73	raise_exception(env, EXCP00_DIVZ);
	74	}
	75	q &= 0xff;
	76	r = (num % den) & 0xff;
4b34e3ad	77	env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) \| (r << 8) \| q;
d7582078 BS	78	}
d7582078 BS	79
7923057b	80	void helper_divw_AX(CPUX86State *env, target_ulong t0)
d7582078 BS	81	{
	82	unsigned int num, den, q, r;
	83
00f5e6f2	84	num = (env->regs[R_EAX] & 0xffff) \| ((env->regs[R_EDX] & 0xffff) << 16);
d7582078 BS	85	den = (t0 & 0xffff);
	86	if (den == 0) {
	87	raise_exception(env, EXCP00_DIVZ);
	88	}
	89	q = (num / den);
	90	if (q > 0xffff) {
	91	raise_exception(env, EXCP00_DIVZ);
	92	}
	93	q &= 0xffff;
	94	r = (num % den) & 0xffff;
4b34e3ad	95	env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) \| q;
00f5e6f2	96	env->regs[R_EDX] = (env->regs[R_EDX] & ~0xffff) \| r;
d7582078 BS	97	}
d7582078 BS	98
7923057b	99	void helper_idivw_AX(CPUX86State *env, target_ulong t0)
d7582078 BS	100	{
	101	int num, den, q, r;
	102
00f5e6f2	103	num = (env->regs[R_EAX] & 0xffff) \| ((env->regs[R_EDX] & 0xffff) << 16);
d7582078 BS	104	den = (int16_t)t0;
	105	if (den == 0) {
	106	raise_exception(env, EXCP00_DIVZ);
	107	}
	108	q = (num / den);
	109	if (q != (int16_t)q) {
	110	raise_exception(env, EXCP00_DIVZ);
	111	}
	112	q &= 0xffff;
	113	r = (num % den) & 0xffff;
4b34e3ad	114	env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) \| q;
00f5e6f2	115	env->regs[R_EDX] = (env->regs[R_EDX] & ~0xffff) \| r;
d7582078 BS	116	}
d7582078 BS	117
7923057b	118	void helper_divl_EAX(CPUX86State *env, target_ulong t0)
d7582078 BS	119	{
	120	unsigned int den, r;
	121	uint64_t num, q;
	122
00f5e6f2	123	num = ((uint32_t)env->regs[R_EAX]) \| ((uint64_t)((uint32_t)env->regs[R_EDX]) << 32);
d7582078 BS	124	den = t0;
	125	if (den == 0) {
	126	raise_exception(env, EXCP00_DIVZ);
	127	}
	128	q = (num / den);
	129	r = (num % den);
	130	if (q > 0xffffffff) {
	131	raise_exception(env, EXCP00_DIVZ);
	132	}
4b34e3ad	133	env->regs[R_EAX] = (uint32_t)q;
00f5e6f2	134	env->regs[R_EDX] = (uint32_t)r;
d7582078 BS	135	}
d7582078 BS	136
7923057b	137	void helper_idivl_EAX(CPUX86State *env, target_ulong t0)
d7582078 BS	138	{
	139	int den, r;
	140	int64_t num, q;
	141
00f5e6f2	142	num = ((uint32_t)env->regs[R_EAX]) \| ((uint64_t)((uint32_t)env->regs[R_EDX]) << 32);
d7582078 BS	143	den = t0;
	144	if (den == 0) {
	145	raise_exception(env, EXCP00_DIVZ);
	146	}
	147	q = (num / den);
	148	r = (num % den);
	149	if (q != (int32_t)q) {
	150	raise_exception(env, EXCP00_DIVZ);
	151	}
4b34e3ad	152	env->regs[R_EAX] = (uint32_t)q;
00f5e6f2	153	env->regs[R_EDX] = (uint32_t)r;
d7582078 BS	154	}
	155
	156	/* bcd */
	157
	158	/* XXX: exception */
7923057b	159	void helper_aam(CPUX86State *env, int base)
d7582078 BS	160	{
	161	int al, ah;
	162
4b34e3ad	163	al = env->regs[R_EAX] & 0xff;
d7582078 BS	164	ah = al / base;
d7582078 BS	165	al = al % base;
4b34e3ad	166	env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) \| al \| (ah << 8);
d7582078 BS	167	CC_DST = al;
	168	}
	169
7923057b	170	void helper_aad(CPUX86State *env, int base)
d7582078 BS	171	{
	172	int al, ah;
	173
4b34e3ad	174	al = env->regs[R_EAX] & 0xff;
4b34e3ad	175	ah = (env->regs[R_EAX] >> 8) & 0xff;
d7582078	176	al = ((ah * base) + al) & 0xff;
4b34e3ad	177	env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) \| al;
d7582078 BS	178	CC_DST = al;
	179	}
	180
7923057b	181	void helper_aaa(CPUX86State *env)
d7582078 BS	182	{
	183	int icarry;
	184	int al, ah, af;
	185	int eflags;
	186
f0967a1a	187	eflags = cpu_cc_compute_all(env, CC_OP);
d7582078	188	af = eflags & CC_A;
4b34e3ad	189	al = env->regs[R_EAX] & 0xff;
4b34e3ad	190	ah = (env->regs[R_EAX] >> 8) & 0xff;
d7582078 BS	191
	192	icarry = (al > 0xf9);
	193	if (((al & 0x0f) > 9) \|\| af) {
	194	al = (al + 6) & 0x0f;
	195	ah = (ah + 1 + icarry) & 0xff;
	196	eflags \|= CC_C \| CC_A;
	197	} else {
	198	eflags &= ~(CC_C \| CC_A);
	199	al &= 0x0f;
	200	}
4b34e3ad	201	env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) \| al \| (ah << 8);
d7582078 BS	202	CC_SRC = eflags;
	203	}
	204
7923057b	205	void helper_aas(CPUX86State *env)
d7582078 BS	206	{
	207	int icarry;
	208	int al, ah, af;
	209	int eflags;
	210
f0967a1a	211	eflags = cpu_cc_compute_all(env, CC_OP);
d7582078	212	af = eflags & CC_A;
4b34e3ad	213	al = env->regs[R_EAX] & 0xff;
4b34e3ad	214	ah = (env->regs[R_EAX] >> 8) & 0xff;
d7582078 BS	215
	216	icarry = (al < 6);
	217	if (((al & 0x0f) > 9) \|\| af) {
	218	al = (al - 6) & 0x0f;
	219	ah = (ah - 1 - icarry) & 0xff;
	220	eflags \|= CC_C \| CC_A;
	221	} else {
	222	eflags &= ~(CC_C \| CC_A);
	223	al &= 0x0f;
	224	}
4b34e3ad	225	env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) \| al \| (ah << 8);
d7582078 BS	226	CC_SRC = eflags;
	227	}
	228
7923057b	229	void helper_daa(CPUX86State *env)
d7582078 BS	230	{
	231	int old_al, al, af, cf;
	232	int eflags;
	233
f0967a1a	234	eflags = cpu_cc_compute_all(env, CC_OP);
d7582078 BS	235	cf = eflags & CC_C;
d7582078 BS	236	af = eflags & CC_A;
4b34e3ad	237	old_al = al = env->regs[R_EAX] & 0xff;
d7582078 BS	238
	239	eflags = 0;
	240	if (((al & 0x0f) > 9) \|\| af) {
	241	al = (al + 6) & 0xff;
	242	eflags \|= CC_A;
	243	}
	244	if ((old_al > 0x99) \|\| cf) {
	245	al = (al + 0x60) & 0xff;
	246	eflags \|= CC_C;
	247	}
4b34e3ad	248	env->regs[R_EAX] = (env->regs[R_EAX] & ~0xff) \| al;
d7582078 BS	249	/* well, speed is not an issue here, so we compute the flags by hand */
	250	eflags \|= (al == 0) << 6; /* zf */
	251	eflags \|= parity_table[al]; /* pf */
	252	eflags \|= (al & 0x80); /* sf */
	253	CC_SRC = eflags;
	254	}
	255
7923057b	256	void helper_das(CPUX86State *env)
d7582078 BS	257	{
	258	int al, al1, af, cf;
	259	int eflags;
	260
f0967a1a	261	eflags = cpu_cc_compute_all(env, CC_OP);
d7582078 BS	262	cf = eflags & CC_C;
d7582078 BS	263	af = eflags & CC_A;
4b34e3ad	264	al = env->regs[R_EAX] & 0xff;
d7582078 BS	265
	266	eflags = 0;
	267	al1 = al;
	268	if (((al & 0x0f) > 9) \|\| af) {
	269	eflags \|= CC_A;
	270	if (al < 6 \|\| cf) {
	271	eflags \|= CC_C;
	272	}
	273	al = (al - 6) & 0xff;
	274	}
	275	if ((al1 > 0x99) \|\| cf) {
	276	al = (al - 0x60) & 0xff;
	277	eflags \|= CC_C;
	278	}
4b34e3ad	279	env->regs[R_EAX] = (env->regs[R_EAX] & ~0xff) \| al;
d7582078 BS	280	/* well, speed is not an issue here, so we compute the flags by hand */
	281	eflags \|= (al == 0) << 6; /* zf */
	282	eflags \|= parity_table[al]; /* pf */
	283	eflags \|= (al & 0x80); /* sf */
	284	CC_SRC = eflags;
	285	}
	286
	287	#ifdef TARGET_X86_64
	288	static void add128(uint64_t plow, uint64_t phigh, uint64_t a, uint64_t b)
	289	{
	290	*plow += a;
	291	/* carry test */
	292	if (*plow < a) {
	293	(*phigh)++;
	294	}
	295	*phigh += b;
	296	}
	297
	298	static void neg128(uint64_t plow, uint64_t phigh)
	299	{
	300	plow = ~plow;
	301	phigh = ~phigh;
	302	add128(plow, phigh, 1, 0);
	303	}
	304
	305	/* return TRUE if overflow */
	306	static int div64(uint64_t plow, uint64_t phigh, uint64_t b)
	307	{
	308	uint64_t q, r, a1, a0;
	309	int i, qb, ab;
	310
	311	a0 = *plow;
	312	a1 = *phigh;
	313	if (a1 == 0) {
	314	q = a0 / b;
	315	r = a0 % b;
	316	*plow = q;
	317	*phigh = r;
	318	} else {
	319	if (a1 >= b) {
	320	return 1;
	321	}
	322	/* XXX: use a better algorithm */
	323	for (i = 0; i < 64; i++) {
	324	ab = a1 >> 63;
	325	a1 = (a1 << 1) \| (a0 >> 63);
	326	if (ab \|\| a1 >= b) {
	327	a1 -= b;
	328	qb = 1;
	329	} else {
	330	qb = 0;
	331	}
	332	a0 = (a0 << 1) \| qb;
	333	}
	334	#if defined(DEBUG_MULDIV)
	335	printf("div: 0x%016" PRIx64 "%016" PRIx64 " / 0x%016" PRIx64
	336	": q=0x%016" PRIx64 " r=0x%016" PRIx64 "\n",
	337	phigh, plow, b, a0, a1);
	338	#endif
	339	*plow = a0;
	340	*phigh = a1;
	341	}
	342	return 0;
	343	}
344
345	/* return TRUE if overflow */
346	static int idiv64(uint64_t plow, uint64_t phigh, int64_t b)
347	{
348	int sa, sb;
349
350	sa = ((int64_t)*phigh < 0);
351	if (sa) {
352	neg128(plow, phigh);
353	}
354	sb = (b < 0);
355	if (sb) {
356	b = -b;
357	}
358	if (div64(plow, phigh, b) != 0) {
359	return 1;
360	}
361	if (sa ^ sb) {
362	if (*plow > (1ULL << 63)) {
363	return 1;
364	}
365	plow = -plow;
366	} else {
367	if (*plow >= (1ULL << 63)) {
368	return 1;
369	}
370	}
371	if (sa) {
372	phigh = -phigh;
373	}
374	return 0;
375	}
376
7923057b	377	void helper_divq_EAX(CPUX86State *env, target_ulong t0)
d7582078 BS	378	{
	379	uint64_t r0, r1;
	380
	381	if (t0 == 0) {
	382	raise_exception(env, EXCP00_DIVZ);
	383	}
4b34e3ad	384	r0 = env->regs[R_EAX];
00f5e6f2	385	r1 = env->regs[R_EDX];
d7582078 BS	386	if (div64(&r0, &r1, t0)) {
	387	raise_exception(env, EXCP00_DIVZ);
	388	}
4b34e3ad	389	env->regs[R_EAX] = r0;
00f5e6f2	390	env->regs[R_EDX] = r1;
d7582078 BS	391	}
d7582078 BS	392
7923057b	393	void helper_idivq_EAX(CPUX86State *env, target_ulong t0)
d7582078 BS	394	{
	395	uint64_t r0, r1;
	396
	397	if (t0 == 0) {
	398	raise_exception(env, EXCP00_DIVZ);
	399	}
4b34e3ad	400	r0 = env->regs[R_EAX];
00f5e6f2	401	r1 = env->regs[R_EDX];
d7582078 BS	402	if (idiv64(&r0, &r1, t0)) {
	403	raise_exception(env, EXCP00_DIVZ);
	404	}
4b34e3ad	405	env->regs[R_EAX] = r0;
00f5e6f2	406	env->regs[R_EDX] = r1;
d7582078 BS	407	}
	408	#endif
	409
f1300734 RH	410	#if TARGET_LONG_BITS == 32
	411	# define ctztl ctz32
	412	# define clztl clz32
	413	#else
	414	# define ctztl ctz64
	415	# define clztl clz64
	416	#endif
	417
d7582078	418	/* bit operations */
321c5351	419	target_ulong helper_ctz(target_ulong t0)
d7582078	420	{
f1300734	421	return ctztl(t0);
d7582078 BS	422	}
d7582078 BS	423
321c5351	424	target_ulong helper_clz(target_ulong t0)
d7582078	425	{
321c5351	426	return clztl(t0);
d7582078 BS	427	}
d7582078 BS	428
0592f74a RH	429	target_ulong helper_pdep(target_ulong src, target_ulong mask)
	430	{
	431	target_ulong dest = 0;
	432	int i, o;
	433
	434	for (i = 0; mask != 0; i++) {
	435	o = ctztl(mask);
	436	mask &= mask - 1;
	437	dest \|= ((src >> i) & 1) << o;
	438	}
	439	return dest;
	440	}
	441
	442	target_ulong helper_pext(target_ulong src, target_ulong mask)
	443	{
	444	target_ulong dest = 0;
	445	int i, o;
	446
	447	for (o = 0; mask != 0; o++) {
	448	i = ctztl(mask);
	449	mask &= mask - 1;
	450	dest \|= ((src >> i) & 1) << o;
	451	}
	452	return dest;
	453	}
	454
d7582078 BS	455	#define SHIFT 0
	456	#include "shift_helper_template.h"
	457	#undef SHIFT
	458
	459	#define SHIFT 1
	460	#include "shift_helper_template.h"
	461	#undef SHIFT
	462
	463	#define SHIFT 2
	464	#include "shift_helper_template.h"
	465	#undef SHIFT
	466
	467	#ifdef TARGET_X86_64
	468	#define SHIFT 3
	469	#include "shift_helper_template.h"
	470	#undef SHIFT
	471	#endif