[qemu.git] / target-i386 / machine.c

#include "hw/hw.h"
#include "hw/boards.h"
#include "hw/pc.h"
#include "hw/isa.h"

#include "exec-all.h"
#include "kvm.h"

static const VMStateDescription vmstate_segment = {
    .name = "segment",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_UINT32(selector, SegmentCache),
        VMSTATE_UINTTL(base, SegmentCache),
        VMSTATE_UINT32(limit, SegmentCache),
        VMSTATE_UINT32(flags, SegmentCache),
        VMSTATE_END_OF_LIST()
    }
};

#define VMSTATE_SEGMENT(_field, _state) {                            \
    .name       = (stringify(_field)),                               \
    .size       = sizeof(SegmentCache),                              \
    .vmsd       = &vmstate_segment,                                  \
    .flags      = VMS_STRUCT,                                        \
    .offset     = offsetof(_state, _field)                           \
            + type_check(SegmentCache,typeof_field(_state, _field))  \
}

#define VMSTATE_SEGMENT_ARRAY(_field, _state, _n)                    \
    VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)

static const VMStateDescription vmstate_xmm_reg = {
    .name = "xmm_reg",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_UINT64(XMM_Q(0), XMMReg),
        VMSTATE_UINT64(XMM_Q(1), XMMReg),
        VMSTATE_END_OF_LIST()
    }
};

#define VMSTATE_XMM_REGS(_field, _state, _n)                         \
    VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)

static const VMStateDescription vmstate_mtrr_var = {
    .name = "mtrr_var",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_UINT64(base, MTRRVar),
        VMSTATE_UINT64(mask, MTRRVar),
        VMSTATE_END_OF_LIST()
    }
};

#define VMSTATE_MTRR_VARS(_field, _state, _n, _v)                    \
    VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar)

static void put_fpreg_error(QEMUFile *f, void *opaque, size_t size)
{
    fprintf(stderr, "call put_fpreg() with invalid arguments\n");
    exit(0);
}

#ifdef USE_X86LDOUBLE
/* XXX: add that in a FPU generic layer */
union x86_longdouble {
    uint64_t mant;
    uint16_t exp;
};

#define MANTD1(fp)	(fp & ((1LL << 52) - 1))
#define EXPBIAS1 1023
#define EXPD1(fp)	((fp >> 52) & 0x7FF)
#define SIGND1(fp)	((fp >> 32) & 0x80000000)

static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
{
    int e;
    /* mantissa */
    p->mant = (MANTD1(temp) << 11) | (1LL << 63);
    /* exponent + sign */
    e = EXPD1(temp) - EXPBIAS1 + 16383;
    e |= SIGND1(temp) >> 16;
    p->exp = e;
}

static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;
    uint64_t mant;
    uint16_t exp;

    qemu_get_be64s(f, &mant);
    qemu_get_be16s(f, &exp);
    fp_reg->d = cpu_set_fp80(mant, exp);
    return 0;
}

static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;
    uint64_t mant;
    uint16_t exp;
    /* we save the real CPU data (in case of MMX usage only 'mant'
       contains the MMX register */
    cpu_get_fp80(&mant, &exp, fp_reg->d);
    qemu_put_be64s(f, &mant);
    qemu_put_be16s(f, &exp);
}

static const VMStateInfo vmstate_fpreg = {
    .name = "fpreg",
    .get  = get_fpreg,
    .put  = put_fpreg,
};

static int get_fpreg_1_mmx(QEMUFile *f, void *opaque, size_t size)
{
    union x86_longdouble *p = opaque;
    uint64_t mant;

    qemu_get_be64s(f, &mant);
    p->mant = mant;
    p->exp = 0xffff;
    return 0;
}

static const VMStateInfo vmstate_fpreg_1_mmx = {
    .name = "fpreg_1_mmx",
    .get  = get_fpreg_1_mmx,
    .put  = put_fpreg_error,
};

static int get_fpreg_1_no_mmx(QEMUFile *f, void *opaque, size_t size)
{
    union x86_longdouble *p = opaque;
    uint64_t mant;

    qemu_get_be64s(f, &mant);
    fp64_to_fp80(p, mant);
    return 0;
}

static const VMStateInfo vmstate_fpreg_1_no_mmx = {
    .name = "fpreg_1_no_mmx",
    .get  = get_fpreg_1_no_mmx,
    .put  = put_fpreg_error,
};

static bool fpregs_is_0(void *opaque, int version_id)
{
    CPUState *env = opaque;

    return (env->fpregs_format_vmstate == 0);
}

static bool fpregs_is_1_mmx(void *opaque, int version_id)
{
    CPUState *env = opaque;
    int guess_mmx;

    guess_mmx = ((env->fptag_vmstate == 0xff) &&
                 (env->fpus_vmstate & 0x3800) == 0);
    return (guess_mmx && (env->fpregs_format_vmstate == 1));
}

static bool fpregs_is_1_no_mmx(void *opaque, int version_id)
{
    CPUState *env = opaque;
    int guess_mmx;

    guess_mmx = ((env->fptag_vmstate == 0xff) &&
                 (env->fpus_vmstate & 0x3800) == 0);
    return (!guess_mmx && (env->fpregs_format_vmstate == 1));
}

#define VMSTATE_FP_REGS(_field, _state, _n)                               \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)

#else
static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;

    qemu_get_be64s(f, &fp_reg->mmx.MMX_Q(0));
    return 0;
}

static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;
    /* if we use doubles for float emulation, we save the doubles to
       avoid losing information in case of MMX usage. It can give
       problems if the image is restored on a CPU where long
       doubles are used instead. */
    qemu_put_be64s(f, &fp_reg->mmx.MMX_Q(0));
}

const VMStateInfo vmstate_fpreg = {
    .name = "fpreg",
    .get  = get_fpreg,
    .put  = put_fpreg,
};

static int get_fpreg_0_mmx(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;
    uint64_t mant;
    uint16_t exp;

    qemu_get_be64s(f, &mant);
    qemu_get_be16s(f, &exp);
    fp_reg->mmx.MMX_Q(0) = mant;
    return 0;
}

const VMStateInfo vmstate_fpreg_0_mmx = {
    .name = "fpreg_0_mmx",
    .get  = get_fpreg_0_mmx,
    .put  = put_fpreg_error,
};

static int get_fpreg_0_no_mmx(QEMUFile *f, void *opaque, size_t size)
{
    FPReg *fp_reg = opaque;
    uint64_t mant;
    uint16_t exp;

    qemu_get_be64s(f, &mant);
    qemu_get_be16s(f, &exp);

    fp_reg->d = cpu_set_fp80(mant, exp);
    return 0;
}

const VMStateInfo vmstate_fpreg_0_no_mmx = {
    .name = "fpreg_0_no_mmx",
    .get  = get_fpreg_0_no_mmx,
    .put  = put_fpreg_error,
};

static bool fpregs_is_1(void *opaque, int version_id)
{
    CPUState *env = opaque;

    return env->fpregs_format_vmstate == 1;
}

static bool fpregs_is_0_mmx(void *opaque, int version_id)
{
    CPUState *env = opaque;
    int guess_mmx;

    guess_mmx = ((env->fptag_vmstate == 0xff) &&
                 (env->fpus_vmstate & 0x3800) == 0);
    return guess_mmx && env->fpregs_format_vmstate == 0;
}

static bool fpregs_is_0_no_mmx(void *opaque, int version_id)
{
    CPUState *env = opaque;
    int guess_mmx;

    guess_mmx = ((env->fptag_vmstate == 0xff) &&
                 (env->fpus_vmstate & 0x3800) == 0);
    return !guess_mmx && env->fpregs_format_vmstate == 0;
}

#define VMSTATE_FP_REGS(_field, _state, _n)                               \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1, vmstate_fpreg, FPReg), \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_mmx, vmstate_fpreg_0_mmx, FPReg), \
    VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_no_mmx, vmstate_fpreg_0_no_mmx, FPReg)

#endif /* USE_X86LDOUBLE */

static bool version_is_5(void *opaque, int version_id)
{
    return version_id == 5;
}

#ifdef TARGET_X86_64
static bool less_than_7(void *opaque, int version_id)
{
    return version_id < 7;
}

static int get_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
{
    uint64_t *v = pv;
    *v = qemu_get_be32(f);
    return 0;
}

static void put_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
{
    uint64_t *v = pv;
    qemu_put_be32(f, *v);
}

static const VMStateInfo vmstate_hack_uint64_as_uint32 = {
    .name = "uint64_as_uint32",
    .get  = get_uint64_as_uint32,
    .put  = put_uint64_as_uint32,
};

#define VMSTATE_HACK_UINT32(_f, _s, _t)                                  \
    VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
#endif

static void cpu_pre_save(void *opaque)
{
    CPUState *env = opaque;
    int i;

    /* FPU */
    env->fpus_vmstate = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
    env->fptag_vmstate = 0;
    for(i = 0; i < 8; i++) {
        env->fptag_vmstate |= ((!env->fptags[i]) << i);
    }

#ifdef USE_X86LDOUBLE
    env->fpregs_format_vmstate = 0;
#else
    env->fpregs_format_vmstate = 1;
#endif
}

static int cpu_post_load(void *opaque, int version_id)
{
    CPUState *env = opaque;
    int i;

    /* XXX: restore FPU round state */
    env->fpstt = (env->fpus_vmstate >> 11) & 7;
    env->fpus = env->fpus_vmstate & ~0x3800;
    env->fptag_vmstate ^= 0xff;
    for(i = 0; i < 8; i++) {
        env->fptags[i] = (env->fptag_vmstate >> i) & 1;
    }

    cpu_breakpoint_remove_all(env, BP_CPU);
    cpu_watchpoint_remove_all(env, BP_CPU);
    for (i = 0; i < 4; i++)
        hw_breakpoint_insert(env, i);

    tlb_flush(env, 1);
    return 0;
}

static const VMStateDescription vmstate_cpu = {
    .name = "cpu",
    .version_id = CPU_SAVE_VERSION,
    .minimum_version_id = 3,
    .minimum_version_id_old = 3,
    .pre_save = cpu_pre_save,
    .post_load = cpu_post_load,
    .fields      = (VMStateField []) {
        VMSTATE_UINTTL_ARRAY(regs, CPUState, CPU_NB_REGS),
        VMSTATE_UINTTL(eip, CPUState),
        VMSTATE_UINTTL(eflags, CPUState),
        VMSTATE_UINT32(hflags, CPUState),
        /* FPU */
        VMSTATE_UINT16(fpuc, CPUState),
        VMSTATE_UINT16(fpus_vmstate, CPUState),
        VMSTATE_UINT16(fptag_vmstate, CPUState),
        VMSTATE_UINT16(fpregs_format_vmstate, CPUState),
        VMSTATE_FP_REGS(fpregs, CPUState, 8),

        VMSTATE_SEGMENT_ARRAY(segs, CPUState, 6),
        VMSTATE_SEGMENT(ldt, CPUState),
        VMSTATE_SEGMENT(tr, CPUState),
        VMSTATE_SEGMENT(gdt, CPUState),
        VMSTATE_SEGMENT(idt, CPUState),

        VMSTATE_UINT32(sysenter_cs, CPUState),
#ifdef TARGET_X86_64
        /* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
        VMSTATE_HACK_UINT32(sysenter_esp, CPUState, less_than_7),
        VMSTATE_HACK_UINT32(sysenter_eip, CPUState, less_than_7),
        VMSTATE_UINTTL_V(sysenter_esp, CPUState, 7),
        VMSTATE_UINTTL_V(sysenter_eip, CPUState, 7),
#else
        VMSTATE_UINTTL(sysenter_esp, CPUState),
        VMSTATE_UINTTL(sysenter_eip, CPUState),
#endif

        VMSTATE_UINTTL(cr[0], CPUState),
        VMSTATE_UINTTL(cr[2], CPUState),
        VMSTATE_UINTTL(cr[3], CPUState),
        VMSTATE_UINTTL(cr[4], CPUState),
        VMSTATE_UINTTL_ARRAY(dr, CPUState, 8),
        /* MMU */
        VMSTATE_INT32(a20_mask, CPUState),
        /* XMM */
        VMSTATE_UINT32(mxcsr, CPUState),
        VMSTATE_XMM_REGS(xmm_regs, CPUState, CPU_NB_REGS),

#ifdef TARGET_X86_64
        VMSTATE_UINT64(efer, CPUState),
        VMSTATE_UINT64(star, CPUState),
        VMSTATE_UINT64(lstar, CPUState),
        VMSTATE_UINT64(cstar, CPUState),
        VMSTATE_UINT64(fmask, CPUState),
        VMSTATE_UINT64(kernelgsbase, CPUState),
#endif
        VMSTATE_UINT32_V(smbase, CPUState, 4),

        VMSTATE_UINT64_V(pat, CPUState, 5),
        VMSTATE_UINT32_V(hflags2, CPUState, 5),

        VMSTATE_UINT32_TEST(halted, CPUState, version_is_5),
        VMSTATE_UINT64_V(vm_hsave, CPUState, 5),
        VMSTATE_UINT64_V(vm_vmcb, CPUState, 5),
        VMSTATE_UINT64_V(tsc_offset, CPUState, 5),
        VMSTATE_UINT64_V(intercept, CPUState, 5),
        VMSTATE_UINT16_V(intercept_cr_read, CPUState, 5),
        VMSTATE_UINT16_V(intercept_cr_write, CPUState, 5),
        VMSTATE_UINT16_V(intercept_dr_read, CPUState, 5),
        VMSTATE_UINT16_V(intercept_dr_write, CPUState, 5),
        VMSTATE_UINT32_V(intercept_exceptions, CPUState, 5),
        VMSTATE_UINT8_V(v_tpr, CPUState, 5),
        /* MTRRs */
        VMSTATE_UINT64_ARRAY_V(mtrr_fixed, CPUState, 11, 8),
        VMSTATE_UINT64_V(mtrr_deftype, CPUState, 8),
        VMSTATE_MTRR_VARS(mtrr_var, CPUState, 8, 8),
        /* KVM-related states */
        VMSTATE_INT32_V(interrupt_injected, CPUState, 9),
        VMSTATE_UINT32_V(mp_state, CPUState, 9),
        VMSTATE_UINT64_V(tsc, CPUState, 9),
        VMSTATE_INT32_V(exception_injected, CPUState, 11),
        VMSTATE_UINT8_V(soft_interrupt, CPUState, 11),
        VMSTATE_UINT8_V(nmi_injected, CPUState, 11),
        VMSTATE_UINT8_V(nmi_pending, CPUState, 11),
        VMSTATE_UINT8_V(has_error_code, CPUState, 11),
        VMSTATE_UINT32_V(sipi_vector, CPUState, 11),
        /* MCE */
        VMSTATE_UINT64_V(mcg_cap, CPUState, 10),
        VMSTATE_UINT64_V(mcg_status, CPUState, 10),
        VMSTATE_UINT64_V(mcg_ctl, CPUState, 10),
        VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10),
        /* rdtscp */
        VMSTATE_UINT64_V(tsc_aux, CPUState, 11),
        /* KVM pvclock msr */
        VMSTATE_UINT64_V(system_time_msr, CPUState, 11),
        VMSTATE_UINT64_V(wall_clock_msr, CPUState, 11),
        VMSTATE_END_OF_LIST()
        /* The above list is not sorted /wrt version numbers, watch out! */
    }
};

void cpu_save(QEMUFile *f, void *opaque)
{
    vmstate_save_state(f, &vmstate_cpu, opaque);
}

int cpu_load(QEMUFile *f, void *opaque, int version_id)
{
    return vmstate_load_state(f, &vmstate_cpu, opaque, version_id);
}
Commit	Line	Data
8dd3dca3 AJ	1	#include "hw/hw.h"
	2	#include "hw/boards.h"
	3	#include "hw/pc.h"
	4	#include "hw/isa.h"
	5
	6	#include "exec-all.h"
b0a46a33	7	#include "kvm.h"
8dd3dca3	8
66e6d55b JQ	9	static const VMStateDescription vmstate_segment = {
	10	.name = "segment",
	11	.version_id = 1,
	12	.minimum_version_id = 1,
	13	.minimum_version_id_old = 1,
	14	.fields = (VMStateField []) {
	15	VMSTATE_UINT32(selector, SegmentCache),
	16	VMSTATE_UINTTL(base, SegmentCache),
	17	VMSTATE_UINT32(limit, SegmentCache),
	18	VMSTATE_UINT32(flags, SegmentCache),
	19	VMSTATE_END_OF_LIST()
	20	}
	21	};
	22
0cb892aa JQ	23	#define VMSTATE_SEGMENT(_field, _state) { \
	24	.name = (stringify(_field)), \
	25	.size = sizeof(SegmentCache), \
	26	.vmsd = &vmstate_segment, \
	27	.flags = VMS_STRUCT, \
	28	.offset = offsetof(_state, _field) \
	29	+ type_check(SegmentCache,typeof_field(_state, _field)) \
8dd3dca3 AJ	30	}
8dd3dca3 AJ	31
0cb892aa JQ	32	#define VMSTATE_SEGMENT_ARRAY(_field, _state, _n) \
0cb892aa JQ	33	VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)
8dd3dca3	34
fc3b0aa2 JQ	35	static const VMStateDescription vmstate_xmm_reg = {
	36	.name = "xmm_reg",
	37	.version_id = 1,
	38	.minimum_version_id = 1,
	39	.minimum_version_id_old = 1,
	40	.fields = (VMStateField []) {
	41	VMSTATE_UINT64(XMM_Q(0), XMMReg),
	42	VMSTATE_UINT64(XMM_Q(1), XMMReg),
	43	VMSTATE_END_OF_LIST()
	44	}
	45	};
	46
0cb892aa JQ	47	#define VMSTATE_XMM_REGS(_field, _state, _n) \
0cb892aa JQ	48	VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
fc3b0aa2	49
216c07c3 JQ	50	static const VMStateDescription vmstate_mtrr_var = {
	51	.name = "mtrr_var",
	52	.version_id = 1,
	53	.minimum_version_id = 1,
	54	.minimum_version_id_old = 1,
	55	.fields = (VMStateField []) {
	56	VMSTATE_UINT64(base, MTRRVar),
	57	VMSTATE_UINT64(mask, MTRRVar),
	58	VMSTATE_END_OF_LIST()
	59	}
	60	};
	61
0cb892aa JQ	62	#define VMSTATE_MTRR_VARS(_field, _state, _n, _v) \
0cb892aa JQ	63	VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar)
216c07c3	64
0cb892aa	65	static void put_fpreg_error(QEMUFile f, void opaque, size_t size)
216c07c3	66	{
0cb892aa JQ	67	fprintf(stderr, "call put_fpreg() with invalid arguments\n");
0cb892aa JQ	68	exit(0);
216c07c3 JQ	69	}
216c07c3 JQ	70
3c8ce630 JQ	71	#ifdef USE_X86LDOUBLE
	72	/* XXX: add that in a FPU generic layer */
	73	union x86_longdouble {
	74	uint64_t mant;
	75	uint16_t exp;
	76	};
	77
	78	#define MANTD1(fp) (fp & ((1LL << 52) - 1))
	79	#define EXPBIAS1 1023
	80	#define EXPD1(fp) ((fp >> 52) & 0x7FF)
	81	#define SIGND1(fp) ((fp >> 32) & 0x80000000)
	82
	83	static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
	84	{
	85	int e;
	86	/* mantissa */
	87	p->mant = (MANTD1(temp) << 11) \| (1LL << 63);
	88	/* exponent + sign */
	89	e = EXPD1(temp) - EXPBIAS1 + 16383;
	90	e \|= SIGND1(temp) >> 16;
	91	p->exp = e;
	92	}
	93
	94	static int get_fpreg(QEMUFile f, void opaque, size_t size)
	95	{
	96	FPReg *fp_reg = opaque;
	97	uint64_t mant;
	98	uint16_t exp;
	99
	100	qemu_get_be64s(f, &mant);
	101	qemu_get_be16s(f, &exp);
	102	fp_reg->d = cpu_set_fp80(mant, exp);
	103	return 0;
	104	}
	105
	106	static void put_fpreg(QEMUFile f, void opaque, size_t size)
	107	{
	108	FPReg *fp_reg = opaque;
	109	uint64_t mant;
	110	uint16_t exp;
	111	/* we save the real CPU data (in case of MMX usage only 'mant'
	112	contains the MMX register */
	113	cpu_get_fp80(&mant, &exp, fp_reg->d);
	114	qemu_put_be64s(f, &mant);
	115	qemu_put_be16s(f, &exp);
	116	}
	117
976b2037	118	static const VMStateInfo vmstate_fpreg = {
0cb892aa JQ	119	.name = "fpreg",
	120	.get = get_fpreg,
	121	.put = put_fpreg,
	122	};
	123
3c8ce630 JQ	124	static int get_fpreg_1_mmx(QEMUFile f, void opaque, size_t size)
	125	{
	126	union x86_longdouble *p = opaque;
	127	uint64_t mant;
	128
	129	qemu_get_be64s(f, &mant);
	130	p->mant = mant;
	131	p->exp = 0xffff;
	132	return 0;
	133	}
	134
976b2037	135	static const VMStateInfo vmstate_fpreg_1_mmx = {
0cb892aa JQ	136	.name = "fpreg_1_mmx",
	137	.get = get_fpreg_1_mmx,
	138	.put = put_fpreg_error,
	139	};
	140
3c8ce630 JQ	141	static int get_fpreg_1_no_mmx(QEMUFile f, void opaque, size_t size)
	142	{
	143	union x86_longdouble *p = opaque;
	144	uint64_t mant;
	145
	146	qemu_get_be64s(f, &mant);
	147	fp64_to_fp80(p, mant);
	148	return 0;
	149	}
	150
976b2037	151	static const VMStateInfo vmstate_fpreg_1_no_mmx = {
0cb892aa JQ	152	.name = "fpreg_1_no_mmx",
	153	.get = get_fpreg_1_no_mmx,
	154	.put = put_fpreg_error,
	155	};
	156
	157	static bool fpregs_is_0(void *opaque, int version_id)
	158	{
	159	CPUState *env = opaque;
	160
	161	return (env->fpregs_format_vmstate == 0);
	162	}
	163
	164	static bool fpregs_is_1_mmx(void *opaque, int version_id)
	165	{
	166	CPUState *env = opaque;
	167	int guess_mmx;
	168
	169	guess_mmx = ((env->fptag_vmstate == 0xff) &&
	170	(env->fpus_vmstate & 0x3800) == 0);
	171	return (guess_mmx && (env->fpregs_format_vmstate == 1));
	172	}
	173
	174	static bool fpregs_is_1_no_mmx(void *opaque, int version_id)
	175	{
	176	CPUState *env = opaque;
	177	int guess_mmx;
	178
	179	guess_mmx = ((env->fptag_vmstate == 0xff) &&
	180	(env->fpus_vmstate & 0x3800) == 0);
	181	return (!guess_mmx && (env->fpregs_format_vmstate == 1));
	182	}
	183
	184	#define VMSTATE_FP_REGS(_field, _state, _n) \
	185	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \
	186	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \
	187	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)
	188
3c8ce630 JQ	189	#else
	190	static int get_fpreg(QEMUFile f, void opaque, size_t size)
	191	{
	192	FPReg *fp_reg = opaque;
	193
	194	qemu_get_be64s(f, &fp_reg->mmx.MMX_Q(0));
	195	return 0;
	196	}
	197
	198	static void put_fpreg(QEMUFile f, void opaque, size_t size)
	199	{
	200	FPReg *fp_reg = opaque;
	201	/* if we use doubles for float emulation, we save the doubles to
	202	avoid losing information in case of MMX usage. It can give
	203	problems if the image is restored on a CPU where long
	204	doubles are used instead. */
	205	qemu_put_be64s(f, &fp_reg->mmx.MMX_Q(0));
	206	}
	207
0cb892aa JQ	208	const VMStateInfo vmstate_fpreg = {
	209	.name = "fpreg",
	210	.get = get_fpreg,
	211	.put = put_fpreg,
	212	};
	213
3c8ce630 JQ	214	static int get_fpreg_0_mmx(QEMUFile f, void opaque, size_t size)
	215	{
	216	FPReg *fp_reg = opaque;
	217	uint64_t mant;
	218	uint16_t exp;
	219
	220	qemu_get_be64s(f, &mant);
	221	qemu_get_be16s(f, &exp);
	222	fp_reg->mmx.MMX_Q(0) = mant;
	223	return 0;
	224	}
	225
0cb892aa JQ	226	const VMStateInfo vmstate_fpreg_0_mmx = {
	227	.name = "fpreg_0_mmx",
	228	.get = get_fpreg_0_mmx,
	229	.put = put_fpreg_error,
	230	};
	231
3c8ce630 JQ	232	static int get_fpreg_0_no_mmx(QEMUFile f, void opaque, size_t size)
	233	{
	234	FPReg *fp_reg = opaque;
	235	uint64_t mant;
	236	uint16_t exp;
	237
	238	qemu_get_be64s(f, &mant);
	239	qemu_get_be16s(f, &exp);
	240
	241	fp_reg->d = cpu_set_fp80(mant, exp);
	242	return 0;
	243	}
	244
0cb892aa JQ	245	const VMStateInfo vmstate_fpreg_0_no_mmx = {
	246	.name = "fpreg_0_no_mmx",
	247	.get = get_fpreg_0_no_mmx,
	248	.put = put_fpreg_error,
	249	};
	250
	251	static bool fpregs_is_1(void *opaque, int version_id)
	252	{
	253	CPUState *env = opaque;
	254
	255	return env->fpregs_format_vmstate == 1;
	256	}
	257
	258	static bool fpregs_is_0_mmx(void *opaque, int version_id)
	259	{
	260	CPUState *env = opaque;
	261	int guess_mmx;
	262
	263	guess_mmx = ((env->fptag_vmstate == 0xff) &&
	264	(env->fpus_vmstate & 0x3800) == 0);
	265	return guess_mmx && env->fpregs_format_vmstate == 0;
	266	}
	267
	268	static bool fpregs_is_0_no_mmx(void *opaque, int version_id)
	269	{
	270	CPUState *env = opaque;
	271	int guess_mmx;
	272
	273	guess_mmx = ((env->fptag_vmstate == 0xff) &&
	274	(env->fpus_vmstate & 0x3800) == 0);
	275	return !guess_mmx && env->fpregs_format_vmstate == 0;
	276	}
	277
	278	#define VMSTATE_FP_REGS(_field, _state, _n) \
	279	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1, vmstate_fpreg, FPReg), \
	280	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_mmx, vmstate_fpreg_0_mmx, FPReg), \
	281	VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_no_mmx, vmstate_fpreg_0_no_mmx, FPReg)
	282
3c8ce630 JQ	283	#endif /* USE_X86LDOUBLE */
3c8ce630 JQ	284
0cb892aa JQ	285	static bool version_is_5(void *opaque, int version_id)
	286	{
	287	return version_id == 5;
	288	}
	289
	290	#ifdef TARGET_X86_64
	291	static bool less_than_7(void *opaque, int version_id)
	292	{
	293	return version_id < 7;
	294	}
	295
	296	static int get_uint64_as_uint32(QEMUFile f, void pv, size_t size)
	297	{
	298	uint64_t *v = pv;
	299	*v = qemu_get_be32(f);
	300	return 0;
	301	}
	302
	303	static void put_uint64_as_uint32(QEMUFile f, void pv, size_t size)
	304	{
	305	uint64_t *v = pv;
	306	qemu_put_be32(f, *v);
	307	}
	308
976b2037	309	static const VMStateInfo vmstate_hack_uint64_as_uint32 = {
0cb892aa JQ	310	.name = "uint64_as_uint32",
	311	.get = get_uint64_as_uint32,
	312	.put = put_uint64_as_uint32,
	313	};
	314
	315	#define VMSTATE_HACK_UINT32(_f, _s, _t) \
d4829d49	316	VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
0cb892aa JQ	317	#endif
0cb892aa JQ	318
c4c38c8c	319	static void cpu_pre_save(void *opaque)
8dd3dca3 AJ	320	{
8dd3dca3 AJ	321	CPUState *env = opaque;
0e607a80	322	int i;
8dd3dca3	323
8dd3dca3	324	/* FPU */
67b8f419	325	env->fpus_vmstate = (env->fpus & ~0x3800) \| (env->fpstt & 0x7) << 11;
cdc0c58f	326	env->fptag_vmstate = 0;
8dd3dca3	327	for(i = 0; i < 8; i++) {
cdc0c58f	328	env->fptag_vmstate \|= ((!env->fptags[i]) << i);
8dd3dca3 AJ	329	}
8dd3dca3 AJ	330
8dd3dca3	331	#ifdef USE_X86LDOUBLE
60a902f1	332	env->fpregs_format_vmstate = 0;
8dd3dca3	333	#else
60a902f1	334	env->fpregs_format_vmstate = 1;
8dd3dca3	335	#endif
c4c38c8c JQ	336	}
c4c38c8c JQ	337
468f6581 JQ	338	static int cpu_post_load(void *opaque, int version_id)
	339	{
	340	CPUState *env = opaque;
	341	int i;
	342
	343	/* XXX: restore FPU round state */
	344	env->fpstt = (env->fpus_vmstate >> 11) & 7;
	345	env->fpus = env->fpus_vmstate & ~0x3800;
	346	env->fptag_vmstate ^= 0xff;
	347	for(i = 0; i < 8; i++) {
	348	env->fptags[i] = (env->fptag_vmstate >> i) & 1;
	349	}
	350
	351	cpu_breakpoint_remove_all(env, BP_CPU);
	352	cpu_watchpoint_remove_all(env, BP_CPU);
	353	for (i = 0; i < 4; i++)
	354	hw_breakpoint_insert(env, i);
	355
1e7fbc6d JQ	356	tlb_flush(env, 1);
1e7fbc6d JQ	357	return 0;
468f6581 JQ	358	}
468f6581 JQ	359
976b2037	360	static const VMStateDescription vmstate_cpu = {
0cb892aa JQ	361	.name = "cpu",
	362	.version_id = CPU_SAVE_VERSION,
	363	.minimum_version_id = 3,
	364	.minimum_version_id_old = 3,
	365	.pre_save = cpu_pre_save,
0cb892aa JQ	366	.post_load = cpu_post_load,
	367	.fields = (VMStateField []) {
	368	VMSTATE_UINTTL_ARRAY(regs, CPUState, CPU_NB_REGS),
	369	VMSTATE_UINTTL(eip, CPUState),
	370	VMSTATE_UINTTL(eflags, CPUState),
	371	VMSTATE_UINT32(hflags, CPUState),
	372	/* FPU */
	373	VMSTATE_UINT16(fpuc, CPUState),
	374	VMSTATE_UINT16(fpus_vmstate, CPUState),
	375	VMSTATE_UINT16(fptag_vmstate, CPUState),
	376	VMSTATE_UINT16(fpregs_format_vmstate, CPUState),
	377	VMSTATE_FP_REGS(fpregs, CPUState, 8),
	378
	379	VMSTATE_SEGMENT_ARRAY(segs, CPUState, 6),
	380	VMSTATE_SEGMENT(ldt, CPUState),
	381	VMSTATE_SEGMENT(tr, CPUState),
	382	VMSTATE_SEGMENT(gdt, CPUState),
	383	VMSTATE_SEGMENT(idt, CPUState),
	384
	385	VMSTATE_UINT32(sysenter_cs, CPUState),
	386	#ifdef TARGET_X86_64
	387	/* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
	388	VMSTATE_HACK_UINT32(sysenter_esp, CPUState, less_than_7),
	389	VMSTATE_HACK_UINT32(sysenter_eip, CPUState, less_than_7),
	390	VMSTATE_UINTTL_V(sysenter_esp, CPUState, 7),
	391	VMSTATE_UINTTL_V(sysenter_eip, CPUState, 7),
8dd3dca3	392	#else
0cb892aa JQ	393	VMSTATE_UINTTL(sysenter_esp, CPUState),
0cb892aa JQ	394	VMSTATE_UINTTL(sysenter_eip, CPUState),
3c8ce630	395	#endif
8dd3dca3	396
0cb892aa JQ	397	VMSTATE_UINTTL(cr[0], CPUState),
	398	VMSTATE_UINTTL(cr[2], CPUState),
	399	VMSTATE_UINTTL(cr[3], CPUState),
	400	VMSTATE_UINTTL(cr[4], CPUState),
	401	VMSTATE_UINTTL_ARRAY(dr, CPUState, 8),
	402	/* MMU */
	403	VMSTATE_INT32(a20_mask, CPUState),
	404	/* XMM */
	405	VMSTATE_UINT32(mxcsr, CPUState),
	406	VMSTATE_XMM_REGS(xmm_regs, CPUState, CPU_NB_REGS),
8dd3dca3 AJ	407
8dd3dca3 AJ	408	#ifdef TARGET_X86_64
0cb892aa JQ	409	VMSTATE_UINT64(efer, CPUState),
	410	VMSTATE_UINT64(star, CPUState),
	411	VMSTATE_UINT64(lstar, CPUState),
	412	VMSTATE_UINT64(cstar, CPUState),
	413	VMSTATE_UINT64(fmask, CPUState),
	414	VMSTATE_UINT64(kernelgsbase, CPUState),
8dd3dca3	415	#endif
0cb892aa JQ	416	VMSTATE_UINT32_V(smbase, CPUState, 4),
	417
	418	VMSTATE_UINT64_V(pat, CPUState, 5),
	419	VMSTATE_UINT32_V(hflags2, CPUState, 5),
	420
	421	VMSTATE_UINT32_TEST(halted, CPUState, version_is_5),
	422	VMSTATE_UINT64_V(vm_hsave, CPUState, 5),
	423	VMSTATE_UINT64_V(vm_vmcb, CPUState, 5),
	424	VMSTATE_UINT64_V(tsc_offset, CPUState, 5),
	425	VMSTATE_UINT64_V(intercept, CPUState, 5),
	426	VMSTATE_UINT16_V(intercept_cr_read, CPUState, 5),
	427	VMSTATE_UINT16_V(intercept_cr_write, CPUState, 5),
	428	VMSTATE_UINT16_V(intercept_dr_read, CPUState, 5),
	429	VMSTATE_UINT16_V(intercept_dr_write, CPUState, 5),
	430	VMSTATE_UINT32_V(intercept_exceptions, CPUState, 5),
	431	VMSTATE_UINT8_V(v_tpr, CPUState, 5),
dd5e3b17	432	/* MTRRs */
0cb892aa JQ	433	VMSTATE_UINT64_ARRAY_V(mtrr_fixed, CPUState, 11, 8),
	434	VMSTATE_UINT64_V(mtrr_deftype, CPUState, 8),
	435	VMSTATE_MTRR_VARS(mtrr_var, CPUState, 8, 8),
	436	/* KVM-related states */
0e607a80	437	VMSTATE_INT32_V(interrupt_injected, CPUState, 9),
0cb892aa JQ	438	VMSTATE_UINT32_V(mp_state, CPUState, 9),
0cb892aa JQ	439	VMSTATE_UINT64_V(tsc, CPUState, 9),
31827373	440	VMSTATE_INT32_V(exception_injected, CPUState, 11),
a0fb002c JK	441	VMSTATE_UINT8_V(soft_interrupt, CPUState, 11),
	442	VMSTATE_UINT8_V(nmi_injected, CPUState, 11),
	443	VMSTATE_UINT8_V(nmi_pending, CPUState, 11),
	444	VMSTATE_UINT8_V(has_error_code, CPUState, 11),
	445	VMSTATE_UINT32_V(sipi_vector, CPUState, 11),
0cb892aa JQ	446	/* MCE */
	447	VMSTATE_UINT64_V(mcg_cap, CPUState, 10),
	448	VMSTATE_UINT64_V(mcg_status, CPUState, 10),
	449	VMSTATE_UINT64_V(mcg_ctl, CPUState, 10),
	450	VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10),
	451	/* rdtscp */
	452	VMSTATE_UINT64_V(tsc_aux, CPUState, 11),
1a03675d GC	453	/* KVM pvclock msr */
	454	VMSTATE_UINT64_V(system_time_msr, CPUState, 11),
	455	VMSTATE_UINT64_V(wall_clock_msr, CPUState, 11),
0cb892aa	456	VMSTATE_END_OF_LIST()
a0fb002c	457	/* The above list is not sorted /wrt version numbers, watch out! */
79c4f6b0	458	}
0cb892aa	459	};
79c4f6b0	460
0cb892aa JQ	461	void cpu_save(QEMUFile f, void opaque)
	462	{
	463	vmstate_save_state(f, &vmstate_cpu, opaque);
	464	}
1f76b9b9	465
0cb892aa JQ	466	int cpu_load(QEMUFile f, void opaque, int version_id)
	467	{
	468	return vmstate_load_state(f, &vmstate_cpu, opaque, version_id);
8dd3dca3	469	}