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1LatticeMico32 target
2--------------------
3
4General
5-------
6All opcodes including the JUART CSRs are supported.
7
8
9JTAG UART
10---------
11JTAG UART is routed to a serial console device. For the current boards it
12is the second one. Ie to enable it in the qemu virtual console window use
13the following command line parameters:
14 -serial vc -serial vc
15This will make serial0 (the lm32_uart) and serial1 (the JTAG UART)
16available as virtual consoles.
17
18
19Programmatically terminate the emulator
20----------------------------------------
21Originally neither the LatticeMico32 nor its peripherals support a
22mechanism to shut down the machine. Emulation aware programs can write to a
23to a special register within the system control block to shut down the
24virtual machine. For more details see hw/lm32_sys.c. The lm32-evr is the
25first BSP which instantiate this model. A (32 bit) write to 0xfff0000
26causes a vm shutdown.
27
28
29Special instructions
30--------------------
31The translation recognizes one special instruction to halt the cpu:
32 and r0, r0, r0
33On real hardware this instruction is a nop. It is not used by GCC and
34should (hopefully) not be used within hand-crafted assembly.
35Insert this instruction in your idle loop to reduce the cpu load on the
36host.
37
38
39Ignoring the MSB of the address bus
40-----------------------------------
41Some SoC ignores the MSB on the address bus. Thus creating a shadow memory
42area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
430x80000000-0xffffffff is not cached and used to access IO devices. This
44behaviour can be enabled with:
45 cpu_lm32_set_phys_msb_ignore(env, 1);
46