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cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
[qemu.git] / target-moxie / cpu.h
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1/*
2 * Moxie emulation
3 *
4 * Copyright (c) 2008, 2010, 2013 Anthony Green
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19#ifndef _CPU_MOXIE_H
20#define _CPU_MOXIE_H
21
22#include "config.h"
23#include "qemu-common.h"
24
25#define TARGET_LONG_BITS 32
26
27#define CPUArchState struct CPUMoxieState
28
29#define TARGET_HAS_ICE 1
30
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31#define ELF_MACHINE 0xFEED /* EM_MOXIE */
32
33#define MOXIE_EX_DIV0 0
34#define MOXIE_EX_BAD 1
35#define MOXIE_EX_IRQ 2
36#define MOXIE_EX_SWI 3
37#define MOXIE_EX_MMU_MISS 4
38#define MOXIE_EX_BREAK 16
39
40#include "exec/cpu-defs.h"
41#include "fpu/softfloat.h"
42
43#define TARGET_PAGE_BITS 12 /* 4k */
44
45#define TARGET_PHYS_ADDR_SPACE_BITS 32
46#define TARGET_VIRT_ADDR_SPACE_BITS 32
47
48#define NB_MMU_MODES 1
49
50typedef struct CPUMoxieState {
51
52 uint32_t flags; /* general execution flags */
53 uint32_t gregs[16]; /* general registers */
54 uint32_t sregs[256]; /* special registers */
55 uint32_t pc; /* program counter */
56 /* Instead of saving the cc value, we save the cmp arguments
57 and compute cc on demand. */
58 uint32_t cc_a; /* reg a for condition code calculation */
59 uint32_t cc_b; /* reg b for condition code calculation */
60
61 void *irq[8];
62
63 CPU_COMMON
64
65} CPUMoxieState;
66
67#include "qom/cpu.h"
68
69#define TYPE_MOXIE_CPU "moxie-cpu"
70
71#define MOXIE_CPU_CLASS(klass) \
72 OBJECT_CLASS_CHECK(MoxieCPUClass, (klass), TYPE_MOXIE_CPU)
73#define MOXIE_CPU(obj) \
74 OBJECT_CHECK(MoxieCPU, (obj), TYPE_MOXIE_CPU)
75#define MOXIE_CPU_GET_CLASS(obj) \
76 OBJECT_GET_CLASS(MoxieCPUClass, (obj), TYPE_MOXIE_CPU)
77
78/**
79 * MoxieCPUClass:
80 * @parent_reset: The parent class' reset handler.
81 *
82 * A Moxie CPU model.
83 */
84typedef struct MoxieCPUClass {
85 /*< private >*/
86 CPUClass parent_class;
87 /*< public >*/
88
89 DeviceRealize parent_realize;
90 void (*parent_reset)(CPUState *cpu);
91} MoxieCPUClass;
92
93/**
94 * MoxieCPU:
95 * @env: #CPUMoxieState
96 *
97 * A Moxie CPU.
98 */
99typedef struct MoxieCPU {
100 /*< private >*/
101 CPUState parent_obj;
102 /*< public >*/
103
104 CPUMoxieState env;
105} MoxieCPU;
106
107static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env)
108{
6e42be7c 109 return container_of(env, MoxieCPU, env);
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110}
111
112#define ENV_GET_CPU(e) CPU(moxie_env_get_cpu(e))
113
114#define ENV_OFFSET offsetof(MoxieCPU, env)
115
116MoxieCPU *cpu_moxie_init(const char *cpu_model);
117int cpu_moxie_exec(CPUMoxieState *s);
53574064 118void moxie_cpu_do_interrupt(CPUState *cs);
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119void moxie_cpu_dump_state(CPUState *cpu, FILE *f,
120 fprintf_function cpu_fprintf, int flags);
00b941e5 121hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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122void moxie_translate_init(void);
123int cpu_moxie_signal_handler(int host_signum, void *pinfo,
124 void *puc);
125
126static inline CPUMoxieState *cpu_init(const char *cpu_model)
127{
128 MoxieCPU *cpu = cpu_moxie_init(cpu_model);
129 if (cpu == NULL) {
130 return NULL;
131 }
132 return &cpu->env;
133}
134
135#define cpu_exec cpu_moxie_exec
136#define cpu_gen_code cpu_moxie_gen_code
137#define cpu_signal_handler cpu_moxie_signal_handler
138
139static inline int cpu_mmu_index(CPUMoxieState *env)
140{
141 return 0;
142}
143
144#include "exec/cpu-all.h"
145#include "exec/exec-all.h"
146
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147static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
148 target_ulong *cs_base, int *flags)
149{
150 *pc = env->pc;
151 *cs_base = 0;
152 *flags = 0;
153}
154
155static inline int cpu_has_work(CPUState *cpu)
156{
157 return cpu->interrupt_request & CPU_INTERRUPT_HARD;
158}
159
160int cpu_moxie_handle_mmu_fault(CPUMoxieState *env, target_ulong address,
161 int rw, int mmu_idx);
162
163#endif /* _CPU_MOXIE_H */