[qemu.git] / target-xtensa / core-dc232b.c

#include "cpu.h"
#include "exec-all.h"
#include "gdbstub.h"
#include "qemu-common.h"
#include "host-utils.h"

#include "core-dc232b/core-isa.h"
#include "overlay_tool.h"

static const XtensaConfig dc232b = {
    .name = "dc232b",
    .options = XTENSA_OPTIONS,
    .gdb_regmap = {
        .num_regs = 120,
        .num_core_regs = 52,
        .reg = {
#include "core-dc232b/gdb-config.c"
        }
    },
    .nareg = XCHAL_NUM_AREGS,
    .ndepc = 1,
    EXCEPTIONS_SECTION,
    INTERRUPTS_SECTION,
    TLB_SECTION,
    .clock_freq_khz = 10000,
};

REGISTER_CORE(dc232b)
Commit	Line	Data
53add759 MF	1	#include "cpu.h"
	2	#include "exec-all.h"
	3	#include "gdbstub.h"
	4	#include "qemu-common.h"
	5	#include "host-utils.h"
	6
	7	#include "core-dc232b/core-isa.h"
	8	#include "overlay_tool.h"
	9
	10	static const XtensaConfig dc232b = {
	11	.name = "dc232b",
	12	.options = XTENSA_OPTIONS,
	13	.gdb_regmap = {
	14	.num_regs = 120,
	15	.num_core_regs = 52,
	16	.reg = {
	17	#include "core-dc232b/gdb-config.c"
	18	}
	19	},
	20	.nareg = XCHAL_NUM_AREGS,
	21	.ndepc = 1,
	22	EXCEPTIONS_SECTION,
	23	INTERRUPTS_SECTION,
	24	TLB_SECTION,
	25	.clock_freq_khz = 10000,
	26	};
	27
	28	REGISTER_CORE(dc232b)