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1/*
2 * Host code generation
5fafdf24 3 *
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4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 */
19#include <stdarg.h>
20#include <stdlib.h>
21#include <stdio.h>
22#include <string.h>
23#include <inttypes.h>
24
25#include "config.h"
2054396a 26
af5ad107 27#define NO_CPU_IO_DEFS
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28#include "cpu.h"
29#include "exec-all.h"
d19893da 30#include "disas.h"
57fec1fe 31#include "tcg.h"
29e922b6 32#include "qemu-timer.h"
d19893da 33
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34/* code generation context */
35TCGContext tcg_ctx;
d19893da 36
d19893da 37uint16_t gen_opc_buf[OPC_BUF_SIZE];
57fec1fe 38TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
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39
40target_ulong gen_opc_pc[OPC_BUF_SIZE];
2e70f6ef 41uint16_t gen_opc_icount[OPC_BUF_SIZE];
d19893da 42uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
d19893da 43
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44void cpu_gen_init(void)
45{
46 tcg_context_init(&tcg_ctx);
47 tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf),
a20e31dc 48 CPU_TEMP_BUF_NLONGS * sizeof(long));
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49}
50
d19893da 51/* return non zero if the very first instruction is invalid so that
5fafdf24 52 the virtual CPU can trigger an exception.
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53
54 '*gen_code_size_ptr' contains the size of the generated code (host
55 code).
56*/
d07bde88 57int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
d19893da 58{
57fec1fe 59 TCGContext *s = &tcg_ctx;
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60 uint8_t *gen_code_buf;
61 int gen_code_size;
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62#ifdef CONFIG_PROFILER
63 int64_t ti;
64#endif
65
66#ifdef CONFIG_PROFILER
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67 s->tb_count1++; /* includes aborted translations because of
68 exceptions */
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69 ti = profile_getclock();
70#endif
71 tcg_func_start(s);
d19893da 72
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73 gen_intermediate_code(env, tb);
74
ec6338ba 75 /* generate machine code */
57fec1fe 76 gen_code_buf = tb->tc_ptr;
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77 tb->tb_next_offset[0] = 0xffff;
78 tb->tb_next_offset[1] = 0xffff;
57fec1fe 79 s->tb_next_offset = tb->tb_next_offset;
4cbb86e1 80#ifdef USE_DIRECT_JUMP
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81 s->tb_jmp_offset = tb->tb_jmp_offset;
82 s->tb_next = NULL;
d19893da 83#else
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84 s->tb_jmp_offset = NULL;
85 s->tb_next = tb->tb_next;
d19893da 86#endif
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87
88#ifdef CONFIG_PROFILER
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89 s->tb_count++;
90 s->interm_time += profile_getclock() - ti;
91 s->code_time -= profile_getclock();
57fec1fe 92#endif
54604f74 93 gen_code_size = tcg_gen_code(s, gen_code_buf);
d19893da 94 *gen_code_size_ptr = gen_code_size;
57fec1fe 95#ifdef CONFIG_PROFILER
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96 s->code_time += profile_getclock();
97 s->code_in_len += tb->size;
98 s->code_out_len += gen_code_size;
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99#endif
100
d19893da 101#ifdef DEBUG_DISAS
8fec2b8c 102 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
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103 qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
104 log_disas(tb->tc_ptr, *gen_code_size_ptr);
105 qemu_log("\n");
31b1a7b4 106 qemu_log_flush();
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107 }
108#endif
109 return 0;
110}
111
5fafdf24 112/* The cpu state corresponding to 'searched_pc' is restored.
d19893da 113 */
5fafdf24 114int cpu_restore_state(TranslationBlock *tb,
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115 CPUState *env, unsigned long searched_pc,
116 void *puc)
d19893da 117{
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118 TCGContext *s = &tcg_ctx;
119 int j;
d19893da 120 unsigned long tc_ptr;
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121#ifdef CONFIG_PROFILER
122 int64_t ti;
123#endif
124
125#ifdef CONFIG_PROFILER
126 ti = profile_getclock();
127#endif
128 tcg_func_start(s);
d19893da 129
2cfc5f17 130 gen_intermediate_code_pc(env, tb);
3b46e624 131
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132 if (use_icount) {
133 /* Reset the cycle counter to the start of the block. */
134 env->icount_decr.u16.low += tb->icount;
135 /* Clear the IO flag. */
136 env->can_do_io = 0;
137 }
138
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139 /* find opc index corresponding to search_pc */
140 tc_ptr = (unsigned long)tb->tc_ptr;
141 if (searched_pc < tc_ptr)
142 return -1;
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143
144 s->tb_next_offset = tb->tb_next_offset;
145#ifdef USE_DIRECT_JUMP
146 s->tb_jmp_offset = tb->tb_jmp_offset;
147 s->tb_next = NULL;
148#else
149 s->tb_jmp_offset = NULL;
150 s->tb_next = tb->tb_next;
151#endif
54604f74 152 j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr);
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153 if (j < 0)
154 return -1;
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155 /* now find start of instruction before */
156 while (gen_opc_instr_start[j] == 0)
157 j--;
2e70f6ef 158 env->icount_decr.u16.low -= gen_opc_icount[j];
3b46e624 159
d2856f1a 160 gen_pc_load(env, tb, searched_pc, j, puc);
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161
162#ifdef CONFIG_PROFILER
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163 s->restore_time += profile_getclock() - ti;
164 s->restore_count++;
57fec1fe 165#endif
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166 return 0;
167}