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1/*
2 * Host code generation
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <stdarg.h>
21#include <stdlib.h>
22#include <stdio.h>
23#include <string.h>
24#include <inttypes.h>
25
26#include "config.h"
2054396a 27
af5ad107 28#define NO_CPU_IO_DEFS
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29#include "cpu.h"
30#include "exec-all.h"
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31#include "disas.h"
32
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33extern int dyngen_code(uint8_t *gen_code_buf,
34 uint16_t *label_offsets, uint16_t *jmp_offsets,
35 const uint16_t *opc_buf, const uint32_t *opparam_buf, const long *gen_labels);
36
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37enum {
38#define DEF(s, n, copy_size) INDEX_op_ ## s,
d3eead2e 39#include "opc.h"
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40#undef DEF
41 NB_OPS,
42};
43
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44uint16_t gen_opc_buf[OPC_BUF_SIZE];
45uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE];
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46long gen_labels[OPC_BUF_SIZE];
47int nb_gen_labels;
48
49target_ulong gen_opc_pc[OPC_BUF_SIZE];
d19893da 50uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
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51#if defined(TARGET_I386)
52uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
e95c8d51 53#elif defined(TARGET_SPARC)
c4687878 54target_ulong gen_opc_npc[OPC_BUF_SIZE];
f76af4b3 55#endif
d19893da 56
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57int code_copy_enabled = 1;
58
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59#ifdef DEBUG_DISAS
60static const char *op_str[] = {
61#define DEF(s, n, copy_size) #s,
d3eead2e 62#include "opc.h"
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63#undef DEF
64};
65
66static uint8_t op_nb_args[] = {
67#define DEF(s, n, copy_size) n,
d3eead2e 68#include "opc.h"
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69#undef DEF
70};
71
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72static const unsigned short opc_copy_size[] = {
73#define DEF(s, n, copy_size) copy_size,
74#include "opc.h"
75#undef DEF
76};
77
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78void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf)
79{
80 const uint16_t *opc_ptr;
81 const uint32_t *opparam_ptr;
82 int c, n, i;
83
84 opc_ptr = opc_buf;
85 opparam_ptr = opparam_buf;
86 for(;;) {
87 c = *opc_ptr++;
88 n = op_nb_args[c];
89 fprintf(logfile, "0x%04x: %s",
90 (int)(opc_ptr - opc_buf - 1), op_str[c]);
91 for(i = 0; i < n; i++) {
92 fprintf(logfile, " 0x%x", opparam_ptr[i]);
93 }
94 fprintf(logfile, "\n");
95 if (c == INDEX_op_end)
96 break;
97 opparam_ptr += n;
98 }
99}
100
101#endif
102
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103/* compute label info */
104static void dyngen_labels(long *gen_labels, int nb_gen_labels,
105 uint8_t *gen_code_buf, const uint16_t *opc_buf)
106{
107 uint8_t *gen_code_ptr;
108 int c, i;
109 unsigned long gen_code_addr[OPC_BUF_SIZE];
110
111 if (nb_gen_labels == 0)
112 return;
113 /* compute the address of each op code */
114
115 gen_code_ptr = gen_code_buf;
116 i = 0;
117 for(;;) {
118 c = opc_buf[i];
119 gen_code_addr[i] =(unsigned long)gen_code_ptr;
120 if (c == INDEX_op_end)
121 break;
122 gen_code_ptr += opc_copy_size[c];
123 i++;
124 }
125
126 /* compute the address of each label */
127 for(i = 0; i < nb_gen_labels; i++) {
128 gen_labels[i] = gen_code_addr[gen_labels[i]];
129 }
130}
131
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132/* return non zero if the very first instruction is invalid so that
133 the virtual CPU can trigger an exception.
134
135 '*gen_code_size_ptr' contains the size of the generated code (host
136 code).
137*/
4c3a88a2 138int cpu_gen_code(CPUState *env, TranslationBlock *tb,
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139 int max_code_size, int *gen_code_size_ptr)
140{
141 uint8_t *gen_code_buf;
142 int gen_code_size;
143
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144#ifdef USE_CODE_COPY
145 if (code_copy_enabled &&
146 cpu_gen_code_copy(env, tb, max_code_size, &gen_code_size) == 0) {
147 /* nothing more to do */
148 } else
149#endif
150 {
151 if (gen_intermediate_code(env, tb) < 0)
152 return -1;
d19893da 153
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154 /* generate machine code */
155 tb->tb_next_offset[0] = 0xffff;
156 tb->tb_next_offset[1] = 0xffff;
157 gen_code_buf = tb->tc_ptr;
4cbb86e1 158#ifdef USE_DIRECT_JUMP
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159 /* the following two entries are optional (only used for string ops) */
160 tb->tb_jmp_offset[2] = 0xffff;
161 tb->tb_jmp_offset[3] = 0xffff;
4cbb86e1 162#endif
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163 dyngen_labels(gen_labels, nb_gen_labels, gen_code_buf, gen_opc_buf);
164
58fe2f10 165 gen_code_size = dyngen_code(gen_code_buf, tb->tb_next_offset,
d19893da 166#ifdef USE_DIRECT_JUMP
58fe2f10 167 tb->tb_jmp_offset,
d19893da 168#else
58fe2f10 169 NULL,
d19893da 170#endif
c4687878 171 gen_opc_buf, gen_opparam_buf, gen_labels);
58fe2f10 172 }
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173 *gen_code_size_ptr = gen_code_size;
174#ifdef DEBUG_DISAS
f193c797 175 if (loglevel & CPU_LOG_TB_OUT_ASM) {
d19893da 176 fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr);
c4687878 177 disas(logfile, tb->tc_ptr, *gen_code_size_ptr);
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178 fprintf(logfile, "\n");
179 fflush(logfile);
180 }
181#endif
182 return 0;
183}
184
f76af4b3 185/* The cpu state corresponding to 'searched_pc' is restored.
d19893da 186 */
f76af4b3 187int cpu_restore_state(TranslationBlock *tb,
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188 CPUState *env, unsigned long searched_pc,
189 void *puc)
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190{
191 int j, c;
192 unsigned long tc_ptr;
193 uint16_t *opc_ptr;
194
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195#ifdef USE_CODE_COPY
196 if (tb->cflags & CF_CODE_COPY) {
197 return cpu_restore_state_copy(tb, env, searched_pc, puc);
198 }
199#endif
4c3a88a2 200 if (gen_intermediate_code_pc(env, tb) < 0)
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201 return -1;
202
203 /* find opc index corresponding to search_pc */
204 tc_ptr = (unsigned long)tb->tc_ptr;
205 if (searched_pc < tc_ptr)
206 return -1;
207 j = 0;
208 opc_ptr = gen_opc_buf;
209 for(;;) {
210 c = *opc_ptr;
211 if (c == INDEX_op_end)
212 return -1;
213 tc_ptr += opc_copy_size[c];
214 if (searched_pc < tc_ptr)
215 break;
216 opc_ptr++;
217 }
218 j = opc_ptr - gen_opc_buf;
219 /* now find start of instruction before */
220 while (gen_opc_instr_start[j] == 0)
221 j--;
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222#if defined(TARGET_I386)
223 {
224 int cc_op;
3c1cf9fa 225#ifdef DEBUG_DISAS
f193c797 226 if (loglevel & CPU_LOG_TB_OP) {
3c1cf9fa 227 int i;
6e0374f6 228 fprintf(logfile, "RESTORE:\n");
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229 for(i=0;i<=j; i++) {
230 if (gen_opc_instr_start[i]) {
c4687878 231 fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
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232 }
233 }
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234 fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
235 searched_pc, j, gen_opc_pc[j] - tb->cs_base,
236 (uint32_t)tb->cs_base);
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237 }
238#endif
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239 env->eip = gen_opc_pc[j] - tb->cs_base;
240 cc_op = gen_opc_cc_op[j];
241 if (cc_op != CC_OP_DYNAMIC)
242 env->cc_op = cc_op;
243 }
244#elif defined(TARGET_ARM)
245 env->regs[15] = gen_opc_pc[j];
d3eead2e 246#elif defined(TARGET_SPARC)
58fe2f10 247 /* XXX: restore npc too */
6dca2016 248 env->pc = gen_opc_pc[j];
e95c8d51 249 env->npc = gen_opc_npc[j];
6dca2016 250#elif defined(TARGET_PPC)
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251 {
252 int type;
253 /* for PPC, we need to look at the micro operation to get the
254 access type */
255 env->nip = gen_opc_pc[j];
256 switch(c) {
257#if defined(CONFIG_USER_ONLY)
258#define CASE3(op)\
259 case INDEX_op_ ## op ## _raw
260#else
261#define CASE3(op)\
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262 case INDEX_op_ ## op ## _user:\
263 case INDEX_op_ ## op ## _kernel
264#endif
265
266 CASE3(stfd):
267 CASE3(stfs):
268 CASE3(lfd):
269 CASE3(lfs):
270 type = ACCESS_FLOAT;
271 break;
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272 CASE3(lwarx):
273 type = ACCESS_RES;
274 break;
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275 CASE3(stwcx):
276 type = ACCESS_RES;
277 break;
278 CASE3(eciwx):
279 CASE3(ecowx):
280 type = ACCESS_EXT;
281 break;
282 default:
283 type = ACCESS_INT;
284 break;
285 }
286 env->access_type = type;
287 }
f76af4b3 288#endif
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289 return 0;
290}