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1 /*
2 * QEMU/mipssim emulation
3 *
4 * Emulates a very simple machine model similiar to the one use by the
5 * proprietary MIPS emulator.
6 *
7 * Copyright (c) 2007 Thiemo Seufer
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
26 */
27 #include "hw.h"
28 #include "mips.h"
29 #include "pc.h"
30 #include "isa.h"
31 #include "net.h"
32 #include "sysemu.h"
33 #include "boards.h"
34 #include "mips-bios.h"
35 #include "loader.h"
36 #include "elf.h"
37
38 #ifdef TARGET_MIPS64
39 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffULL)
40 #else
41 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffU)
42 #endif
43
44 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
45
46 static struct _loaderparams {
47 int ram_size;
48 const char *kernel_filename;
49 const char *kernel_cmdline;
50 const char *initrd_filename;
51 } loaderparams;
52
53 static void load_kernel (CPUState *env)
54 {
55 int64_t entry, kernel_low, kernel_high;
56 long kernel_size;
57 long initrd_size;
58 a_ram_addr initrd_offset;
59 int big_endian;
60
61 #ifdef TARGET_WORDS_BIGENDIAN
62 big_endian = 1;
63 #else
64 big_endian = 0;
65 #endif
66
67 kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
68 (uint64_t *)&entry, (uint64_t *)&kernel_low,
69 (uint64_t *)&kernel_high, big_endian, ELF_MACHINE, 1);
70 if (kernel_size >= 0) {
71 if ((entry & ~0x7fffffffULL) == 0x80000000)
72 entry = (int32_t)entry;
73 env->active_tc.PC = entry;
74 } else {
75 fprintf(stderr, "qemu: could not load kernel '%s'\n",
76 loaderparams.kernel_filename);
77 exit(1);
78 }
79
80 /* load initrd */
81 initrd_size = 0;
82 initrd_offset = 0;
83 if (loaderparams.initrd_filename) {
84 initrd_size = get_image_size (loaderparams.initrd_filename);
85 if (initrd_size > 0) {
86 initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
87 if (initrd_offset + initrd_size > loaderparams.ram_size) {
88 fprintf(stderr,
89 "qemu: memory too small for initial ram disk '%s'\n",
90 loaderparams.initrd_filename);
91 exit(1);
92 }
93 initrd_size = load_image_targphys(loaderparams.initrd_filename,
94 initrd_offset, loaderparams.ram_size - initrd_offset);
95 }
96 if (initrd_size == (target_ulong) -1) {
97 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
98 loaderparams.initrd_filename);
99 exit(1);
100 }
101 }
102 }
103
104 static void main_cpu_reset(void *opaque)
105 {
106 CPUState *env = opaque;
107 cpu_reset(env);
108
109 if (loaderparams.kernel_filename)
110 load_kernel (env);
111 }
112
113 static void
114 mips_mipssim_init (a_ram_addr ram_size,
115 const char *boot_device,
116 const char *kernel_filename, const char *kernel_cmdline,
117 const char *initrd_filename, const char *cpu_model)
118 {
119 char *filename;
120 a_ram_addr ram_offset;
121 a_ram_addr bios_offset;
122 CPUState *env;
123 int bios_size;
124
125 /* Init CPUs. */
126 if (cpu_model == NULL) {
127 #ifdef TARGET_MIPS64
128 cpu_model = "5Kf";
129 #else
130 cpu_model = "24Kf";
131 #endif
132 }
133 env = cpu_init(cpu_model);
134 if (!env) {
135 fprintf(stderr, "Unable to find CPU definition\n");
136 exit(1);
137 }
138 qemu_register_reset(main_cpu_reset, env);
139
140 /* Allocate RAM. */
141 ram_offset = qemu_ram_alloc(ram_size);
142 bios_offset = qemu_ram_alloc(BIOS_SIZE);
143
144 cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
145
146 /* Map the BIOS / boot exception handler. */
147 cpu_register_physical_memory(0x1fc00000LL,
148 BIOS_SIZE, bios_offset | IO_MEM_ROM);
149 /* Load a BIOS / boot exception handler image. */
150 if (bios_name == NULL)
151 bios_name = BIOS_FILENAME;
152 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
153 if (filename) {
154 bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE);
155 qemu_free(filename);
156 } else {
157 bios_size = -1;
158 }
159 if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
160 /* Bail out if we have neither a kernel image nor boot vector code. */
161 fprintf(stderr,
162 "qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n",
163 filename);
164 exit(1);
165 } else {
166 /* We have a boot vector start address. */
167 env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
168 }
169
170 if (kernel_filename) {
171 loaderparams.ram_size = ram_size;
172 loaderparams.kernel_filename = kernel_filename;
173 loaderparams.kernel_cmdline = kernel_cmdline;
174 loaderparams.initrd_filename = initrd_filename;
175 load_kernel(env);
176 }
177
178 /* Init CPU internal devices. */
179 cpu_mips_irq_init_cpu(env);
180 cpu_mips_clock_init(env);
181
182 /* Register 64 KB of ISA IO space at 0x1fd00000. */
183 isa_mmio_init(0x1fd00000, 0x00010000);
184
185 /* A single 16450 sits at offset 0x3f8. It is attached to
186 MIPS CPU INT2, which is interrupt 4. */
187 if (serial_hds[0])
188 serial_init(0x3f8, env->irq[4], 115200, serial_hds[0]);
189
190 if (nd_table[0].vlan)
191 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
192 mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
193 }
194
195 static QEMUMachine mips_mipssim_machine = {
196 .name = "mipssim",
197 .desc = "MIPS MIPSsim platform",
198 .init = mips_mipssim_init,
199 };
200
201 static void mips_mipssim_machine_init(void)
202 {
203 qemu_register_machine(&mips_mipssim_machine);
204 }
205
206 machine_init(mips_mipssim_machine_init);