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1 /*
2 * QEMU sPAPR VIO code
3 *
4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
5 * Based on the s390 virtio bus code:
6 * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
7 *
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 */
21
22 #include "hw.h"
23 #include "sysemu.h"
24 #include "boards.h"
25 #include "monitor.h"
26 #include "loader.h"
27 #include "elf.h"
28 #include "hw/sysbus.h"
29 #include "kvm.h"
30 #include "device_tree.h"
31 #include "kvm_ppc.h"
32
33 #include "hw/spapr.h"
34 #include "hw/spapr_vio.h"
35
36 #ifdef CONFIG_FDT
37 #include <libfdt.h>
38 #endif /* CONFIG_FDT */
39
40 /* #define DEBUG_SPAPR */
41 /* #define DEBUG_TCE */
42
43 #ifdef DEBUG_SPAPR
44 #define dprintf(fmt, ...) \
45 do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
46 #else
47 #define dprintf(fmt, ...) \
48 do { } while (0)
49 #endif
50
51 static struct BusInfo spapr_vio_bus_info = {
52 .name = "spapr-vio",
53 .size = sizeof(VIOsPAPRBus),
54 };
55
56 VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg)
57 {
58 DeviceState *qdev;
59 VIOsPAPRDevice *dev = NULL;
60
61 QLIST_FOREACH(qdev, &bus->bus.children, sibling) {
62 dev = (VIOsPAPRDevice *)qdev;
63 if (dev->reg == reg) {
64 break;
65 }
66 }
67
68 return dev;
69 }
70
71 #ifdef CONFIG_FDT
72 static int vio_make_devnode(VIOsPAPRDevice *dev,
73 void *fdt)
74 {
75 VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)dev->qdev.info;
76 int vdevice_off, node_off;
77 int ret;
78
79 vdevice_off = fdt_path_offset(fdt, "/vdevice");
80 if (vdevice_off < 0) {
81 return vdevice_off;
82 }
83
84 node_off = fdt_add_subnode(fdt, vdevice_off, dev->qdev.id);
85 if (node_off < 0) {
86 return node_off;
87 }
88
89 ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg);
90 if (ret < 0) {
91 return ret;
92 }
93
94 if (info->dt_type) {
95 ret = fdt_setprop_string(fdt, node_off, "device_type",
96 info->dt_type);
97 if (ret < 0) {
98 return ret;
99 }
100 }
101
102 if (info->dt_compatible) {
103 ret = fdt_setprop_string(fdt, node_off, "compatible",
104 info->dt_compatible);
105 if (ret < 0) {
106 return ret;
107 }
108 }
109
110 if (dev->qirq) {
111 uint32_t ints_prop[] = {cpu_to_be32(dev->vio_irq_num), 0};
112
113 ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop,
114 sizeof(ints_prop));
115 if (ret < 0) {
116 return ret;
117 }
118 }
119
120 if (dev->rtce_window_size) {
121 uint32_t dma_prop[] = {cpu_to_be32(dev->reg),
122 0, 0,
123 0, cpu_to_be32(dev->rtce_window_size)};
124
125 ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2);
126 if (ret < 0) {
127 return ret;
128 }
129
130 ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2);
131 if (ret < 0) {
132 return ret;
133 }
134
135 ret = fdt_setprop(fdt, node_off, "ibm,my-dma-window", dma_prop,
136 sizeof(dma_prop));
137 if (ret < 0) {
138 return ret;
139 }
140 }
141
142 if (info->devnode) {
143 ret = (info->devnode)(dev, fdt, node_off);
144 if (ret < 0) {
145 return ret;
146 }
147 }
148
149 return node_off;
150 }
151 #endif /* CONFIG_FDT */
152
153 /*
154 * RTCE handling
155 */
156
157 static void rtce_init(VIOsPAPRDevice *dev)
158 {
159 size_t size = (dev->rtce_window_size >> SPAPR_VIO_TCE_PAGE_SHIFT)
160 * sizeof(VIOsPAPR_RTCE);
161
162 if (size) {
163 dev->rtce_table = qemu_mallocz(size);
164 }
165 }
166
167 static target_ulong h_put_tce(CPUState *env, sPAPREnvironment *spapr,
168 target_ulong opcode, target_ulong *args)
169 {
170 target_ulong liobn = args[0];
171 target_ulong ioba = args[1];
172 target_ulong tce = args[2];
173 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, liobn);
174 VIOsPAPR_RTCE *rtce;
175
176 if (!dev) {
177 hcall_dprintf("spapr_vio_put_tce on non-existent LIOBN "
178 TARGET_FMT_lx "\n", liobn);
179 return H_PARAMETER;
180 }
181
182 ioba &= ~(SPAPR_VIO_TCE_PAGE_SIZE - 1);
183
184 #ifdef DEBUG_TCE
185 fprintf(stderr, "spapr_vio_put_tce on %s ioba 0x" TARGET_FMT_lx
186 " TCE 0x" TARGET_FMT_lx "\n", dev->qdev.id, ioba, tce);
187 #endif
188
189 if (ioba >= dev->rtce_window_size) {
190 hcall_dprintf("spapr_vio_put_tce on out-of-boards IOBA 0x"
191 TARGET_FMT_lx "\n", ioba);
192 return H_PARAMETER;
193 }
194
195 rtce = dev->rtce_table + (ioba >> SPAPR_VIO_TCE_PAGE_SHIFT);
196 rtce->tce = tce;
197
198 return H_SUCCESS;
199 }
200
201 int spapr_vio_check_tces(VIOsPAPRDevice *dev, target_ulong ioba,
202 target_ulong len, enum VIOsPAPR_TCEAccess access)
203 {
204 int start, end, i;
205
206 start = ioba >> SPAPR_VIO_TCE_PAGE_SHIFT;
207 end = (ioba + len - 1) >> SPAPR_VIO_TCE_PAGE_SHIFT;
208
209 for (i = start; i <= end; i++) {
210 if ((dev->rtce_table[i].tce & access) != access) {
211 #ifdef DEBUG_TCE
212 fprintf(stderr, "FAIL on %d\n", i);
213 #endif
214 return -1;
215 }
216 }
217
218 return 0;
219 }
220
221 int spapr_tce_dma_write(VIOsPAPRDevice *dev, uint64_t taddr, const void *buf,
222 uint32_t size)
223 {
224 #ifdef DEBUG_TCE
225 fprintf(stderr, "spapr_tce_dma_write taddr=0x%llx size=0x%x\n",
226 (unsigned long long)taddr, size);
227 #endif
228
229 /* Check for bypass */
230 if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) {
231 cpu_physical_memory_write(taddr, buf, size);
232 return 0;
233 }
234
235 while (size) {
236 uint64_t tce;
237 uint32_t lsize;
238 uint64_t txaddr;
239
240 /* Check if we are in bound */
241 if (taddr >= dev->rtce_window_size) {
242 #ifdef DEBUG_TCE
243 fprintf(stderr, "spapr_tce_dma_write out of bounds\n");
244 #endif
245 return H_DEST_PARM;
246 }
247 tce = dev->rtce_table[taddr >> SPAPR_VIO_TCE_PAGE_SHIFT].tce;
248
249 /* How much til end of page ? */
250 lsize = MIN(size, ((~taddr) & SPAPR_VIO_TCE_PAGE_MASK) + 1);
251
252 /* Check TCE */
253 if (!(tce & 2)) {
254 return H_DEST_PARM;
255 }
256
257 /* Translate */
258 txaddr = (tce & ~SPAPR_VIO_TCE_PAGE_MASK) |
259 (taddr & SPAPR_VIO_TCE_PAGE_MASK);
260
261 #ifdef DEBUG_TCE
262 fprintf(stderr, " -> write to txaddr=0x%llx, size=0x%x\n",
263 (unsigned long long)txaddr, lsize);
264 #endif
265
266 /* Do it */
267 cpu_physical_memory_write(txaddr, buf, lsize);
268 buf += lsize;
269 taddr += lsize;
270 size -= lsize;
271 }
272 return 0;
273 }
274
275 int spapr_tce_dma_zero(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t size)
276 {
277 /* FIXME: allocating a temp buffer is nasty, but just stepping
278 * through writing zeroes is awkward. This will do for now. */
279 uint8_t zeroes[size];
280
281 #ifdef DEBUG_TCE
282 fprintf(stderr, "spapr_tce_dma_zero taddr=0x%llx size=0x%x\n",
283 (unsigned long long)taddr, size);
284 #endif
285
286 memset(zeroes, 0, size);
287 return spapr_tce_dma_write(dev, taddr, zeroes, size);
288 }
289
290 void stb_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint8_t val)
291 {
292 spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
293 }
294
295 void sth_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint16_t val)
296 {
297 val = tswap16(val);
298 spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
299 }
300
301
302 void stw_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t val)
303 {
304 val = tswap32(val);
305 spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
306 }
307
308 void stq_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint64_t val)
309 {
310 val = tswap64(val);
311 spapr_tce_dma_write(dev, taddr, &val, sizeof(val));
312 }
313
314 int spapr_tce_dma_read(VIOsPAPRDevice *dev, uint64_t taddr, void *buf,
315 uint32_t size)
316 {
317 #ifdef DEBUG_TCE
318 fprintf(stderr, "spapr_tce_dma_write taddr=0x%llx size=0x%x\n",
319 (unsigned long long)taddr, size);
320 #endif
321
322 /* Check for bypass */
323 if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) {
324 cpu_physical_memory_read(taddr, buf, size);
325 return 0;
326 }
327
328 while (size) {
329 uint64_t tce;
330 uint32_t lsize;
331 uint64_t txaddr;
332
333 /* Check if we are in bound */
334 if (taddr >= dev->rtce_window_size) {
335 #ifdef DEBUG_TCE
336 fprintf(stderr, "spapr_tce_dma_read out of bounds\n");
337 #endif
338 return H_DEST_PARM;
339 }
340 tce = dev->rtce_table[taddr >> SPAPR_VIO_TCE_PAGE_SHIFT].tce;
341
342 /* How much til end of page ? */
343 lsize = MIN(size, ((~taddr) & SPAPR_VIO_TCE_PAGE_MASK) + 1);
344
345 /* Check TCE */
346 if (!(tce & 1)) {
347 return H_DEST_PARM;
348 }
349
350 /* Translate */
351 txaddr = (tce & ~SPAPR_VIO_TCE_PAGE_MASK) |
352 (taddr & SPAPR_VIO_TCE_PAGE_MASK);
353
354 #ifdef DEBUG_TCE
355 fprintf(stderr, " -> write to txaddr=0x%llx, size=0x%x\n",
356 (unsigned long long)txaddr, lsize);
357 #endif
358 /* Do it */
359 cpu_physical_memory_read(txaddr, buf, lsize);
360 buf += lsize;
361 taddr += lsize;
362 size -= lsize;
363 }
364 return H_SUCCESS;
365 }
366
367 uint64_t ldq_tce(VIOsPAPRDevice *dev, uint64_t taddr)
368 {
369 uint64_t val;
370
371 spapr_tce_dma_read(dev, taddr, &val, sizeof(val));
372 return tswap64(val);
373 }
374
375 /*
376 * CRQ handling
377 */
378 static target_ulong h_reg_crq(CPUState *env, sPAPREnvironment *spapr,
379 target_ulong opcode, target_ulong *args)
380 {
381 target_ulong reg = args[0];
382 target_ulong queue_addr = args[1];
383 target_ulong queue_len = args[2];
384 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
385
386 if (!dev) {
387 hcall_dprintf("h_reg_crq on non-existent unit 0x"
388 TARGET_FMT_lx "\n", reg);
389 return H_PARAMETER;
390 }
391
392 /* We can't grok a queue size bigger than 256M for now */
393 if (queue_len < 0x1000 || queue_len > 0x10000000) {
394 hcall_dprintf("h_reg_crq, queue size too small or too big (0x%llx)\n",
395 (unsigned long long)queue_len);
396 return H_PARAMETER;
397 }
398
399 /* Check queue alignment */
400 if (queue_addr & 0xfff) {
401 hcall_dprintf("h_reg_crq, queue not aligned (0x%llx)\n",
402 (unsigned long long)queue_addr);
403 return H_PARAMETER;
404 }
405
406 /* Check if device supports CRQs */
407 if (!dev->crq.SendFunc) {
408 return H_NOT_FOUND;
409 }
410
411
412 /* Already a queue ? */
413 if (dev->crq.qsize) {
414 return H_RESOURCE;
415 }
416 dev->crq.qladdr = queue_addr;
417 dev->crq.qsize = queue_len;
418 dev->crq.qnext = 0;
419
420 dprintf("CRQ for dev 0x" TARGET_FMT_lx " registered at 0x"
421 TARGET_FMT_lx "/0x" TARGET_FMT_lx "\n",
422 reg, queue_addr, queue_len);
423 return H_SUCCESS;
424 }
425
426 static target_ulong h_free_crq(CPUState *env, sPAPREnvironment *spapr,
427 target_ulong opcode, target_ulong *args)
428 {
429 target_ulong reg = args[0];
430 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
431
432 if (!dev) {
433 hcall_dprintf("h_free_crq on non-existent unit 0x"
434 TARGET_FMT_lx "\n", reg);
435 return H_PARAMETER;
436 }
437
438 dev->crq.qladdr = 0;
439 dev->crq.qsize = 0;
440 dev->crq.qnext = 0;
441
442 dprintf("CRQ for dev 0x" TARGET_FMT_lx " freed\n", reg);
443
444 return H_SUCCESS;
445 }
446
447 static target_ulong h_send_crq(CPUState *env, sPAPREnvironment *spapr,
448 target_ulong opcode, target_ulong *args)
449 {
450 target_ulong reg = args[0];
451 target_ulong msg_hi = args[1];
452 target_ulong msg_lo = args[2];
453 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
454 uint64_t crq_mangle[2];
455
456 if (!dev) {
457 hcall_dprintf("h_send_crq on non-existent unit 0x"
458 TARGET_FMT_lx "\n", reg);
459 return H_PARAMETER;
460 }
461 crq_mangle[0] = cpu_to_be64(msg_hi);
462 crq_mangle[1] = cpu_to_be64(msg_lo);
463
464 if (dev->crq.SendFunc) {
465 return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle);
466 }
467
468 return H_HARDWARE;
469 }
470
471 static target_ulong h_enable_crq(CPUState *env, sPAPREnvironment *spapr,
472 target_ulong opcode, target_ulong *args)
473 {
474 target_ulong reg = args[0];
475 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
476
477 if (!dev) {
478 hcall_dprintf("h_enable_crq on non-existent unit 0x"
479 TARGET_FMT_lx "\n", reg);
480 return H_PARAMETER;
481 }
482
483 return 0;
484 }
485
486 /* Returns negative error, 0 success, or positive: queue full */
487 int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq)
488 {
489 int rc;
490 uint8_t byte;
491
492 if (!dev->crq.qsize) {
493 fprintf(stderr, "spapr_vio_send_creq on uninitialized queue\n");
494 return -1;
495 }
496
497 /* Maybe do a fast path for KVM just writing to the pages */
498 rc = spapr_tce_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1);
499 if (rc) {
500 return rc;
501 }
502 if (byte != 0) {
503 return 1;
504 }
505
506 rc = spapr_tce_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8,
507 &crq[8], 8);
508 if (rc) {
509 return rc;
510 }
511
512 kvmppc_eieio();
513
514 rc = spapr_tce_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8);
515 if (rc) {
516 return rc;
517 }
518
519 dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize;
520
521 if (dev->signal_state & 1) {
522 qemu_irq_pulse(dev->qirq);
523 }
524
525 return 0;
526 }
527
528 /* "quiesce" handling */
529
530 static void spapr_vio_quiesce_one(VIOsPAPRDevice *dev)
531 {
532 dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS;
533
534 if (dev->rtce_table) {
535 size_t size = (dev->rtce_window_size >> SPAPR_VIO_TCE_PAGE_SHIFT)
536 * sizeof(VIOsPAPR_RTCE);
537 memset(dev->rtce_table, 0, size);
538 }
539
540 dev->crq.qladdr = 0;
541 dev->crq.qsize = 0;
542 dev->crq.qnext = 0;
543 }
544
545 static void rtas_set_tce_bypass(sPAPREnvironment *spapr, uint32_t token,
546 uint32_t nargs, target_ulong args,
547 uint32_t nret, target_ulong rets)
548 {
549 VIOsPAPRBus *bus = spapr->vio_bus;
550 VIOsPAPRDevice *dev;
551 uint32_t unit, enable;
552
553 if (nargs != 2) {
554 rtas_st(rets, 0, -3);
555 return;
556 }
557 unit = rtas_ld(args, 0);
558 enable = rtas_ld(args, 1);
559 dev = spapr_vio_find_by_reg(bus, unit);
560 if (!dev) {
561 rtas_st(rets, 0, -3);
562 return;
563 }
564 if (enable) {
565 dev->flags |= VIO_PAPR_FLAG_DMA_BYPASS;
566 } else {
567 dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS;
568 }
569
570 rtas_st(rets, 0, 0);
571 }
572
573 static void rtas_quiesce(sPAPREnvironment *spapr, uint32_t token,
574 uint32_t nargs, target_ulong args,
575 uint32_t nret, target_ulong rets)
576 {
577 VIOsPAPRBus *bus = spapr->vio_bus;
578 DeviceState *qdev;
579 VIOsPAPRDevice *dev = NULL;
580
581 if (nargs != 0) {
582 rtas_st(rets, 0, -3);
583 return;
584 }
585
586 QLIST_FOREACH(qdev, &bus->bus.children, sibling) {
587 dev = (VIOsPAPRDevice *)qdev;
588 spapr_vio_quiesce_one(dev);
589 }
590
591 rtas_st(rets, 0, 0);
592 }
593
594 static int spapr_vio_busdev_init(DeviceState *qdev, DeviceInfo *qinfo)
595 {
596 VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qinfo;
597 VIOsPAPRDevice *dev = (VIOsPAPRDevice *)qdev;
598 char *id;
599
600 if (asprintf(&id, "%s@%x", info->dt_name, dev->reg) < 0) {
601 return -1;
602 }
603
604 dev->qdev.id = id;
605
606 rtce_init(dev);
607
608 return info->init(dev);
609 }
610
611 void spapr_vio_bus_register_withprop(VIOsPAPRDeviceInfo *info)
612 {
613 info->qdev.init = spapr_vio_busdev_init;
614 info->qdev.bus_info = &spapr_vio_bus_info;
615
616 assert(info->qdev.size >= sizeof(VIOsPAPRDevice));
617 qdev_register(&info->qdev);
618 }
619
620 static target_ulong h_vio_signal(CPUState *env, sPAPREnvironment *spapr,
621 target_ulong opcode,
622 target_ulong *args)
623 {
624 target_ulong reg = args[0];
625 target_ulong mode = args[1];
626 VIOsPAPRDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
627 VIOsPAPRDeviceInfo *info;
628
629 if (!dev) {
630 return H_PARAMETER;
631 }
632
633 info = (VIOsPAPRDeviceInfo *)dev->qdev.info;
634
635 if (mode & ~info->signal_mask) {
636 return H_PARAMETER;
637 }
638
639 dev->signal_state = mode;
640
641 return H_SUCCESS;
642 }
643
644 VIOsPAPRBus *spapr_vio_bus_init(void)
645 {
646 VIOsPAPRBus *bus;
647 BusState *qbus;
648 DeviceState *dev;
649 DeviceInfo *qinfo;
650
651 /* Create bridge device */
652 dev = qdev_create(NULL, "spapr-vio-bridge");
653 qdev_init_nofail(dev);
654
655 /* Create bus on bridge device */
656
657 qbus = qbus_create(&spapr_vio_bus_info, dev, "spapr-vio");
658 bus = DO_UPCAST(VIOsPAPRBus, bus, qbus);
659
660 /* hcall-vio */
661 spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal);
662
663 /* hcall-tce */
664 spapr_register_hypercall(H_PUT_TCE, h_put_tce);
665
666 /* hcall-crq */
667 spapr_register_hypercall(H_REG_CRQ, h_reg_crq);
668 spapr_register_hypercall(H_FREE_CRQ, h_free_crq);
669 spapr_register_hypercall(H_SEND_CRQ, h_send_crq);
670 spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq);
671
672 /* RTAS calls */
673 spapr_rtas_register("ibm,set-tce-bypass", rtas_set_tce_bypass);
674 spapr_rtas_register("quiesce", rtas_quiesce);
675
676 for (qinfo = device_info_list; qinfo; qinfo = qinfo->next) {
677 VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qinfo;
678
679 if (qinfo->bus_info != &spapr_vio_bus_info) {
680 continue;
681 }
682
683 if (info->hcalls) {
684 info->hcalls(bus);
685 }
686 }
687
688 return bus;
689 }
690
691 /* Represents sPAPR hcall VIO devices */
692
693 static int spapr_vio_bridge_init(SysBusDevice *dev)
694 {
695 /* nothing */
696 return 0;
697 }
698
699 static SysBusDeviceInfo spapr_vio_bridge_info = {
700 .init = spapr_vio_bridge_init,
701 .qdev.name = "spapr-vio-bridge",
702 .qdev.size = sizeof(SysBusDevice),
703 .qdev.no_user = 1,
704 };
705
706 static void spapr_vio_register_devices(void)
707 {
708 sysbus_register_withprop(&spapr_vio_bridge_info);
709 }
710
711 device_init(spapr_vio_register_devices)
712
713 #ifdef CONFIG_FDT
714 int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt)
715 {
716 DeviceState *qdev;
717 int ret = 0;
718
719 QLIST_FOREACH(qdev, &bus->bus.children, sibling) {
720 VIOsPAPRDevice *dev = (VIOsPAPRDevice *)qdev;
721
722 ret = vio_make_devnode(dev, fdt);
723
724 if (ret < 0) {
725 return ret;
726 }
727 }
728
729 return 0;
730 }
731 #endif /* CONFIG_FDT */