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1 /*
2 * ARM Versatile Express emulation.
3 *
4 * Copyright (c) 2010 - 2011 B Labs Ltd.
5 * Copyright (c) 2011 Linaro Limited
6 * Written by Bahadir Balban, Amit Mahajan, Peter Maydell
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #include "sysbus.h"
22 #include "arm-misc.h"
23 #include "primecell.h"
24 #include "devices.h"
25 #include "net.h"
26 #include "sysemu.h"
27 #include "boards.h"
28 #include "exec-memory.h"
29
30 #define SMP_BOOT_ADDR 0xe0000000
31
32 #define VEXPRESS_BOARD_ID 0x8e0
33
34 static struct arm_boot_info vexpress_binfo = {
35 .smp_loader_start = SMP_BOOT_ADDR,
36 };
37
38 static void vexpress_a9_init(ram_addr_t ram_size,
39 const char *boot_device,
40 const char *kernel_filename, const char *kernel_cmdline,
41 const char *initrd_filename, const char *cpu_model)
42 {
43 CPUState *env = NULL;
44 MemoryRegion *sysmem = get_system_memory();
45 MemoryRegion *ram = g_new(MemoryRegion, 1);
46 MemoryRegion *lowram = g_new(MemoryRegion, 1);
47 MemoryRegion *vram = g_new(MemoryRegion, 1);
48 MemoryRegion *sram = g_new(MemoryRegion, 1);
49 MemoryRegion *hackram = g_new(MemoryRegion, 1);
50 DeviceState *dev, *sysctl, *pl041;
51 SysBusDevice *busdev;
52 qemu_irq *irqp;
53 qemu_irq pic[64];
54 int n;
55 qemu_irq cpu_irq[4];
56 uint32_t proc_id;
57 uint32_t sys_id;
58 ram_addr_t low_ram_size, vram_size, sram_size;
59
60 if (!cpu_model) {
61 cpu_model = "cortex-a9";
62 }
63
64 for (n = 0; n < smp_cpus; n++) {
65 env = cpu_init(cpu_model);
66 if (!env) {
67 fprintf(stderr, "Unable to find CPU definition\n");
68 exit(1);
69 }
70 irqp = arm_pic_init_cpu(env);
71 cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
72 }
73
74 if (ram_size > 0x40000000) {
75 /* 1GB is the maximum the address space permits */
76 fprintf(stderr, "vexpress: cannot model more than 1GB RAM\n");
77 exit(1);
78 }
79
80 memory_region_init_ram(ram, "vexpress.highmem", ram_size);
81 vmstate_register_ram_global(ram);
82 low_ram_size = ram_size;
83 if (low_ram_size > 0x4000000) {
84 low_ram_size = 0x4000000;
85 }
86 /* RAM is from 0x60000000 upwards. The bottom 64MB of the
87 * address space should in theory be remappable to various
88 * things including ROM or RAM; we always map the RAM there.
89 */
90 memory_region_init_alias(lowram, "vexpress.lowmem", ram, 0, low_ram_size);
91 memory_region_add_subregion(sysmem, 0x0, lowram);
92 memory_region_add_subregion(sysmem, 0x60000000, ram);
93
94 /* 0x1e000000 A9MPCore (SCU) private memory region */
95 dev = qdev_create(NULL, "a9mpcore_priv");
96 qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
97 qdev_init_nofail(dev);
98 busdev = sysbus_from_qdev(dev);
99 vexpress_binfo.smp_priv_base = 0x1e000000;
100 sysbus_mmio_map(busdev, 0, vexpress_binfo.smp_priv_base);
101 for (n = 0; n < smp_cpus; n++) {
102 sysbus_connect_irq(busdev, n, cpu_irq[n]);
103 }
104 /* Interrupts [42:0] are from the motherboard;
105 * [47:43] are reserved; [63:48] are daughterboard
106 * peripherals. Note that some documentation numbers
107 * external interrupts starting from 32 (because the
108 * A9MP has internal interrupts 0..31).
109 */
110 for (n = 0; n < 64; n++) {
111 pic[n] = qdev_get_gpio_in(dev, n);
112 }
113
114 /* Motherboard peripherals CS7 : 0x10000000 .. 0x10020000 */
115 sys_id = 0x1190f500;
116 proc_id = 0x0c000191;
117
118 /* 0x10000000 System registers */
119 sysctl = qdev_create(NULL, "realview_sysctl");
120 qdev_prop_set_uint32(sysctl, "sys_id", sys_id);
121 qdev_init_nofail(sysctl);
122 qdev_prop_set_uint32(sysctl, "proc_id", proc_id);
123 sysbus_mmio_map(sysbus_from_qdev(sysctl), 0, 0x10000000);
124
125 /* 0x10001000 SP810 system control */
126 /* 0x10002000 serial bus PCI */
127 /* 0x10004000 PL041 audio */
128 pl041 = qdev_create(NULL, "pl041");
129 qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512);
130 qdev_init_nofail(pl041);
131 sysbus_mmio_map(sysbus_from_qdev(pl041), 0, 0x10004000);
132 sysbus_connect_irq(sysbus_from_qdev(pl041), 0, pic[11]);
133
134 dev = sysbus_create_varargs("pl181", 0x10005000, pic[9], pic[10], NULL);
135 /* Wire up MMC card detect and read-only signals */
136 qdev_connect_gpio_out(dev, 0,
137 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_WPROT));
138 qdev_connect_gpio_out(dev, 1,
139 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_CARDIN));
140
141 sysbus_create_simple("pl050_keyboard", 0x10006000, pic[12]);
142 sysbus_create_simple("pl050_mouse", 0x10007000, pic[13]);
143
144 sysbus_create_simple("pl011", 0x10009000, pic[5]);
145 sysbus_create_simple("pl011", 0x1000a000, pic[6]);
146 sysbus_create_simple("pl011", 0x1000b000, pic[7]);
147 sysbus_create_simple("pl011", 0x1000c000, pic[8]);
148
149 /* 0x1000f000 SP805 WDT */
150
151 sysbus_create_simple("sp804", 0x10011000, pic[2]);
152 sysbus_create_simple("sp804", 0x10012000, pic[3]);
153
154 /* 0x10016000 Serial Bus DVI */
155
156 sysbus_create_simple("pl031", 0x10017000, pic[4]); /* RTC */
157
158 /* 0x1001a000 Compact Flash */
159
160 /* 0x1001f000 PL111 CLCD (motherboard) */
161
162 /* Daughterboard peripherals : 0x10020000 .. 0x20000000 */
163
164 /* 0x10020000 PL111 CLCD (daughterboard) */
165 sysbus_create_simple("pl111", 0x10020000, pic[44]);
166
167 /* 0x10060000 AXI RAM */
168 /* 0x100e0000 PL341 Dynamic Memory Controller */
169 /* 0x100e1000 PL354 Static Memory Controller */
170 /* 0x100e2000 System Configuration Controller */
171
172 sysbus_create_simple("sp804", 0x100e4000, pic[48]);
173 /* 0x100e5000 SP805 Watchdog module */
174 /* 0x100e6000 BP147 TrustZone Protection Controller */
175 /* 0x100e9000 PL301 'Fast' AXI matrix */
176 /* 0x100ea000 PL301 'Slow' AXI matrix */
177 /* 0x100ec000 TrustZone Address Space Controller */
178 /* 0x10200000 CoreSight debug APB */
179 /* 0x1e00a000 PL310 L2 Cache Controller */
180
181 /* CS0: NOR0 flash : 0x40000000 .. 0x44000000 */
182 /* CS4: NOR1 flash : 0x44000000 .. 0x48000000 */
183 /* CS2: SRAM : 0x48000000 .. 0x4a000000 */
184 sram_size = 0x2000000;
185 memory_region_init_ram(sram, "vexpress.sram", sram_size);
186 vmstate_register_ram_global(sram);
187 memory_region_add_subregion(sysmem, 0x48000000, sram);
188
189 /* CS3: USB, ethernet, VRAM : 0x4c000000 .. 0x50000000 */
190
191 /* 0x4c000000 Video RAM */
192 vram_size = 0x800000;
193 memory_region_init_ram(vram, "vexpress.vram", vram_size);
194 vmstate_register_ram_global(vram);
195 memory_region_add_subregion(sysmem, 0x4c000000, vram);
196
197 /* 0x4e000000 LAN9118 Ethernet */
198 if (nd_table[0].vlan) {
199 lan9118_init(&nd_table[0], 0x4e000000, pic[15]);
200 }
201
202 /* 0x4f000000 ISP1761 USB */
203
204 /* ??? Hack to map an additional page of ram for the secondary CPU
205 startup code. I guess this works on real hardware because the
206 BootROM happens to be in ROM/flash or in memory that isn't clobbered
207 until after Linux boots the secondary CPUs. */
208 memory_region_init_ram(hackram, "vexpress.hack", 0x1000);
209 vmstate_register_ram_global(hackram);
210 memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, hackram);
211
212 vexpress_binfo.ram_size = ram_size;
213 vexpress_binfo.kernel_filename = kernel_filename;
214 vexpress_binfo.kernel_cmdline = kernel_cmdline;
215 vexpress_binfo.initrd_filename = initrd_filename;
216 vexpress_binfo.nb_cpus = smp_cpus;
217 vexpress_binfo.board_id = VEXPRESS_BOARD_ID;
218 vexpress_binfo.loader_start = 0x60000000;
219 arm_load_kernel(first_cpu, &vexpress_binfo);
220 }
221
222
223 static QEMUMachine vexpress_a9_machine = {
224 .name = "vexpress-a9",
225 .desc = "ARM Versatile Express for Cortex-A9",
226 .init = vexpress_a9_init,
227 .use_scsi = 1,
228 .max_cpus = 4,
229 };
230
231 static void vexpress_machine_init(void)
232 {
233 qemu_register_machine(&vexpress_a9_machine);
234 }
235
236 machine_init(vexpress_machine_init);