cpu->env.cpucfgr = cpu->feature;
}
-void openrisc_cpu_realize(Object *obj, Error **errp)
+static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp)
{
- OpenRISCCPU *cpu = OPENRISC_CPU(obj);
+ OpenRISCCPU *cpu = OPENRISC_CPU(dev);
+ OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(dev);
qemu_init_vcpu(&cpu->env);
cpu_reset(CPU(cpu));
+
+ occ->parent_realize(dev, errp);
}
static void openrisc_cpu_initfn(Object *obj)
{
OpenRISCCPUClass *occ = OPENRISC_CPU_CLASS(oc);
CPUClass *cc = CPU_CLASS(occ);
+ DeviceClass *dc = DEVICE_CLASS(oc);
+
+ occ->parent_realize = dc->realize;
+ dc->realize = openrisc_cpu_realizefn;
occ->parent_reset = cc->reset;
cc->reset = openrisc_cpu_reset;
cpu = OPENRISC_CPU(object_new(object_class_get_name(oc)));
cpu->env.cpu_model_str = cpu_model;
- openrisc_cpu_realize(OBJECT(cpu), NULL);
+ object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
return cpu;
}
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
#include "qom/cpu.h"
-#include "qapi/error.h"
#define TYPE_OPENRISC_CPU "or32-cpu"
/**
* OpenRISCCPUClass:
+ * @parent_realize: The parent class' realize handler.
* @parent_reset: The parent class' reset handler.
*
* A OpenRISC CPU model.
CPUClass parent_class;
/*< public >*/
+ DeviceRealize parent_realize;
void (*parent_reset)(CPUState *cpu);
} OpenRISCCPUClass;
#define ENV_GET_CPU(e) CPU(openrisc_env_get_cpu(e))
OpenRISCCPU *cpu_openrisc_init(const char *cpu_model);
-void openrisc_cpu_realize(Object *obj, Error **errp);
void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf);
int cpu_openrisc_exec(CPUOpenRISCState *s);