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1 | /** @file\r |
2 | \r | |
3 | Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r | |
4 | Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>\r | |
5 | \r | |
6 | This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #include <Library/ArmGenericTimerCounterLib.h>\r | |
734bd6cc | 17 | #include <Library/ArmLib.h>\r |
bcf37cf6 AB |
18 | \r |
19 | VOID\r | |
20 | EFIAPI\r | |
21 | ArmGenericTimerEnableTimer (\r | |
22 | VOID\r | |
23 | )\r | |
24 | {\r | |
25 | UINTN TimerCtrlReg;\r | |
26 | \r | |
734bd6cc | 27 | TimerCtrlReg = ArmReadCntvCtl ();\r |
bcf37cf6 AB |
28 | TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE;\r |
29 | \r | |
30 | //\r | |
31 | // When running under KVM, we need to unmask the interrupt on the timer side\r | |
32 | // as KVM will mask it when servicing the interrupt at the hypervisor level\r | |
33 | // and delivering the virtual timer interrupt to the guest. Otherwise, the\r | |
34 | // interrupt will fire again, trapping into the hypervisor again, etc. etc.\r | |
35 | // This is scheduled to be fixed on the KVM side, but there is no harm in\r | |
36 | // leaving this in once KVM gets fixed.\r | |
37 | //\r | |
38 | TimerCtrlReg &= ~ARM_ARCH_TIMER_IMASK;\r | |
734bd6cc | 39 | ArmWriteCntvCtl (TimerCtrlReg);\r |
bcf37cf6 AB |
40 | }\r |
41 | \r | |
42 | VOID\r | |
43 | EFIAPI\r | |
44 | ArmGenericTimerDisableTimer (\r | |
45 | VOID\r | |
46 | )\r | |
47 | {\r | |
48 | UINTN TimerCtrlReg;\r | |
49 | \r | |
734bd6cc | 50 | TimerCtrlReg = ArmReadCntvCtl ();\r |
bcf37cf6 | 51 | TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;\r |
734bd6cc | 52 | ArmWriteCntvCtl (TimerCtrlReg);\r |
bcf37cf6 AB |
53 | }\r |
54 | \r | |
55 | VOID\r | |
56 | EFIAPI\r | |
57 | ArmGenericTimerSetTimerFreq (\r | |
58 | IN UINTN FreqInHz\r | |
59 | )\r | |
60 | {\r | |
734bd6cc | 61 | ArmWriteCntFrq (FreqInHz);\r |
bcf37cf6 AB |
62 | }\r |
63 | \r | |
64 | UINTN\r | |
65 | EFIAPI\r | |
66 | ArmGenericTimerGetTimerFreq (\r | |
67 | VOID\r | |
68 | )\r | |
69 | {\r | |
734bd6cc | 70 | return ArmReadCntFrq ();\r |
bcf37cf6 AB |
71 | }\r |
72 | \r | |
73 | UINTN\r | |
74 | EFIAPI\r | |
75 | ArmGenericTimerGetTimerVal (\r | |
76 | VOID\r | |
77 | )\r | |
78 | {\r | |
734bd6cc | 79 | return ArmReadCntvTval ();\r |
bcf37cf6 AB |
80 | }\r |
81 | \r | |
82 | \r | |
83 | VOID\r | |
84 | EFIAPI\r | |
85 | ArmGenericTimerSetTimerVal (\r | |
86 | IN UINTN Value\r | |
87 | )\r | |
88 | {\r | |
734bd6cc | 89 | ArmWriteCntvTval (Value);\r |
bcf37cf6 AB |
90 | }\r |
91 | \r | |
92 | UINT64\r | |
93 | EFIAPI\r | |
94 | ArmGenericTimerGetSystemCount (\r | |
95 | VOID\r | |
96 | )\r | |
97 | {\r | |
734bd6cc | 98 | return ArmReadCntvCt ();\r |
bcf37cf6 AB |
99 | }\r |
100 | \r | |
101 | UINTN\r | |
102 | EFIAPI\r | |
103 | ArmGenericTimerGetTimerCtrlReg (\r | |
104 | VOID\r | |
105 | )\r | |
106 | {\r | |
734bd6cc | 107 | return ArmReadCntvCtl ();\r |
bcf37cf6 AB |
108 | }\r |
109 | \r | |
110 | VOID\r | |
111 | EFIAPI\r | |
112 | ArmGenericTimerSetTimerCtrlReg (\r | |
113 | UINTN Value\r | |
114 | )\r | |
115 | {\r | |
734bd6cc | 116 | ArmWriteCntvCtl (Value);\r |
bcf37cf6 AB |
117 | }\r |
118 | \r | |
119 | UINT64\r | |
120 | EFIAPI\r | |
121 | ArmGenericTimerGetCompareVal (\r | |
122 | VOID\r | |
123 | )\r | |
124 | {\r | |
734bd6cc | 125 | return ArmReadCntvCval ();\r |
bcf37cf6 AB |
126 | }\r |
127 | \r | |
128 | VOID\r | |
129 | EFIAPI\r | |
130 | ArmGenericTimerSetCompareVal (\r | |
131 | IN UINT64 Value\r | |
132 | )\r | |
133 | {\r | |
734bd6cc | 134 | ArmWriteCntvCval (Value);\r |
bcf37cf6 | 135 | }\r |