]>
Commit | Line | Data |
---|---|---|
1d5d0ae9 | 1 | /** @file\r |
2 | *\r | |
3 | * Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
4 | * \r | |
5 | * This program and the accompanying materials \r | |
6 | * are licensed and made available under the terms and conditions of the BSD License \r | |
7 | * which accompanies this distribution. The full text of the license may be found at \r | |
8 | * http://opensource.org/licenses/bsd-license.php \r | |
9 | *\r | |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | *\r | |
13 | **/\r | |
14 | \r | |
15 | #include <Library/ArmPlatformLib.h>\r | |
16 | #include <Library/DebugLib.h>\r | |
17 | #include <Library/PcdLib.h>\r | |
18 | #include <Library/MemoryAllocationLib.h>\r | |
6377d2f1 | 19 | #include <Library/IoLib.h>\r |
1d5d0ae9 | 20 | \r |
21 | // DDR attributes\r | |
22 | #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r | |
23 | #define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r | |
24 | #define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK\r | |
25 | #define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED\r | |
26 | \r | |
27 | /**\r | |
28 | Return the information about the memory region in permanent memory used by PEI\r | |
29 | \r | |
30 | One of the PEI Module must install the permament memory used by PEI. This function returns the\r | |
31 | information about this region for your platform to this PEIM module.\r | |
32 | \r | |
33 | @param[out] PeiMemoryBase Base of the memory region used by PEI core and modules\r | |
34 | @param[out] PeiMemorySize Size of the memory region used by PEI core and modules\r | |
35 | \r | |
36 | **/\r | |
37 | VOID ArmPlatformGetPeiMemory (\r | |
38 | OUT UINTN* PeiMemoryBase,\r | |
39 | OUT UINTN* PeiMemorySize\r | |
40 | ) {\r | |
41 | ASSERT((PeiMemoryBase != NULL) && (PeiMemorySize != NULL));\r | |
42 | \r | |
43 | *PeiMemoryBase = ARM_EB_DRAM_BASE + ARM_EB_EFI_FIX_ADDRESS_REGION_SZ;\r | |
44 | *PeiMemorySize = ARM_EB_EFI_MEMORY_REGION_SZ;\r | |
45 | }\r | |
46 | \r | |
47 | /**\r | |
48 | Return the Virtual Memory Map of your platform\r | |
49 | \r | |
50 | This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.\r | |
51 | \r | |
52 | @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-\r | |
53 | Virtual Memory mapping. This array must be ended by a zero-filled\r | |
54 | entry\r | |
55 | \r | |
56 | **/\r | |
57 | VOID ArmPlatformGetVirtualMemoryMap(ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap) {\r | |
1d5d0ae9 | 58 | UINT32 CacheAttributes;\r |
59 | BOOLEAN bTrustzoneSupport = FALSE;\r | |
60 | UINTN Index = 0;\r | |
61 | ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;\r | |
62 | \r | |
63 | ASSERT(VirtualMemoryMap != NULL);\r | |
64 | \r | |
65 | VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * 9);\r | |
66 | if (VirtualMemoryTable == NULL) {\r | |
67 | return;\r | |
68 | }\r | |
69 | \r | |
70 | if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r | |
71 | CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED);\r | |
72 | } else {\r | |
73 | CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED);\r | |
74 | }\r | |
75 | \r | |
76 | // ReMap (Either NOR Flash or DRAM)\r | |
77 | VirtualMemoryTable[Index].PhysicalBase = ARM_EB_REMAP_BASE;\r | |
78 | VirtualMemoryTable[Index].VirtualBase = ARM_EB_REMAP_BASE;\r | |
79 | VirtualMemoryTable[Index].Length = ARM_EB_REMAP_SZ;\r | |
80 | VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;\r | |
81 | \r | |
82 | // DDR\r | |
83 | VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_DRAM_BASE;\r | |
84 | VirtualMemoryTable[Index].VirtualBase = ARM_EB_DRAM_BASE;\r | |
85 | VirtualMemoryTable[Index].Length = ARM_EB_DRAM_SZ;\r | |
86 | VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;\r | |
87 | \r | |
88 | // SMC CS7\r | |
89 | VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE;\r | |
90 | VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE;\r | |
91 | VirtualMemoryTable[Index].Length = ARM_EB_SMB_MB_ON_CHIP_PERIPH_SZ;\r | |
92 | VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r | |
93 | \r | |
94 | // SMB CS0-CS1 - NOR Flash 1 & 2\r | |
95 | VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_NOR_BASE;\r | |
96 | VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_NOR_BASE;\r | |
97 | VirtualMemoryTable[Index].Length = ARM_EB_SMB_NOR_SZ + ARM_EB_SMB_DOC_SZ;\r | |
98 | VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r | |
99 | \r | |
100 | // SMB CS2 - SRAM\r | |
101 | VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_SRAM_BASE;\r | |
102 | VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_SRAM_BASE;\r | |
103 | VirtualMemoryTable[Index].Length = ARM_EB_SMB_SRAM_SZ;\r | |
104 | VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;\r | |
105 | \r | |
106 | // SMB CS3-CS6 - Motherboard Peripherals\r | |
107 | VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_PERIPH_BASE;\r | |
108 | VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_PERIPH_BASE;\r | |
109 | VirtualMemoryTable[Index].Length = ARM_EB_SMB_PERIPH_SZ;\r | |
110 | VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r | |
111 | \r | |
112 | // If a Logic Tile is connected to The ARM Versatile Express Motherboard\r | |
113 | if (MmioRead32(ARM_EB_SYS_PROCID1_REG) != 0) {\r | |
114 | VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_LOGIC_TILE_BASE;\r | |
115 | VirtualMemoryTable[Index].VirtualBase = ARM_EB_LOGIC_TILE_BASE;\r | |
116 | VirtualMemoryTable[Index].Length = ARM_EB_LOGIC_TILE_SZ;\r | |
117 | VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r | |
118 | }\r | |
119 | \r | |
120 | // End of Table\r | |
121 | VirtualMemoryTable[++Index].PhysicalBase = 0;\r | |
122 | VirtualMemoryTable[Index].VirtualBase = 0;\r | |
123 | VirtualMemoryTable[Index].Length = 0;\r | |
124 | VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r | |
125 | \r | |
126 | *VirtualMemoryMap = VirtualMemoryTable;\r | |
127 | }\r | |
128 | \r | |
129 | /**\r | |
130 | Return the EFI Memory Map of your platform\r | |
131 | \r | |
132 | This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource\r | |
133 | Descriptor HOBs used by DXE core.\r | |
134 | \r | |
135 | @param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an\r | |
136 | EFI Memory region. This array must be ended by a zero-filled entry\r | |
137 | \r | |
138 | **/\r | |
139 | VOID ArmPlatformGetEfiMemoryMap (\r | |
140 | OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap\r | |
141 | ) {\r | |
142 | EFI_RESOURCE_ATTRIBUTE_TYPE Attributes;\r | |
143 | UINT64 MemoryBase;\r | |
144 | UINTN Index = 0;\r | |
145 | ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR *EfiMemoryTable;\r | |
146 | \r | |
147 | ASSERT(EfiMemoryMap != NULL);\r | |
148 | \r | |
149 | EfiMemoryTable = (ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR) * 6);\r | |
150 | \r | |
151 | Attributes =\r | |
152 | (\r | |
153 | EFI_RESOURCE_ATTRIBUTE_PRESENT |\r | |
154 | EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r | |
155 | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r | |
156 | EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r | |
157 | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r | |
158 | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r | |
159 | EFI_RESOURCE_ATTRIBUTE_TESTED\r | |
160 | );\r | |
161 | MemoryBase = ARM_EB_DRAM_BASE;\r | |
162 | \r | |
163 | // Memory Reserved for fixed address allocations (such as Exception Vector Table)\r | |
164 | EfiMemoryTable[Index].ResourceAttribute = Attributes;\r | |
165 | EfiMemoryTable[Index].PhysicalStart = MemoryBase;\r | |
166 | EfiMemoryTable[Index].NumberOfBytes = ARM_EB_EFI_FIX_ADDRESS_REGION_SZ;\r | |
167 | \r | |
168 | MemoryBase += ARM_EB_EFI_FIX_ADDRESS_REGION_SZ;\r | |
169 | \r | |
170 | // Memory declared to PEI as permanent memory for PEI and DXE\r | |
171 | EfiMemoryTable[++Index].ResourceAttribute = Attributes;\r | |
172 | EfiMemoryTable[Index].PhysicalStart = MemoryBase;\r | |
173 | EfiMemoryTable[Index].NumberOfBytes = ARM_EB_EFI_MEMORY_REGION_SZ;\r | |
174 | \r | |
175 | MemoryBase += ARM_EB_EFI_MEMORY_REGION_SZ;\r | |
176 | \r | |
177 | // We must reserve the memory used by the Firmware Volume copied in DRAM at 0x80000000\r | |
178 | if (FeaturePcdGet(PcdStandalone) == FALSE) {\r | |
179 | // Chunk between the EFI Memory region and the firmware\r | |
180 | EfiMemoryTable[++Index].ResourceAttribute = Attributes;\r | |
181 | EfiMemoryTable[Index].PhysicalStart = MemoryBase;\r | |
262a9b04 | 182 | EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdBaseAddress) - MemoryBase;\r |
1d5d0ae9 | 183 | \r |
184 | // Chunk reserved by the firmware in DRAM\r | |
185 | EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT);\r | |
262a9b04 | 186 | EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdNormalFdBaseAddress);\r |
187 | EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdSize);\r | |
1d5d0ae9 | 188 | \r |
262a9b04 | 189 | MemoryBase = PcdGet32(PcdNormalFdBaseAddress) + PcdGet32(PcdNormalFdSize);\r |
1d5d0ae9 | 190 | }\r |
191 | \r | |
192 | // We allocate all the remain memory as untested system memory\r | |
193 | EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_TESTED);\r | |
194 | EfiMemoryTable[Index].PhysicalStart = MemoryBase;\r | |
195 | EfiMemoryTable[Index].NumberOfBytes = ARM_EB_DRAM_SZ - (MemoryBase-ARM_EB_DRAM_BASE);\r | |
196 | \r | |
197 | EfiMemoryTable[++Index].ResourceAttribute = 0;\r | |
198 | EfiMemoryTable[Index].PhysicalStart = 0;\r | |
199 | EfiMemoryTable[Index].NumberOfBytes = 0;\r | |
200 | \r | |
201 | *EfiMemoryMap = EfiMemoryTable;\r | |
202 | }\r |