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1d5d0ae9 1/** @file\r
2*\r
3* Copyright (c) 2011, ARM Limited. All rights reserved.\r
4* \r
5* This program and the accompanying materials \r
6* are licensed and made available under the terms and conditions of the BSD License \r
7* which accompanies this distribution. The full text of the license may be found at \r
8* http://opensource.org/licenses/bsd-license.php \r
9*\r
10* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12*\r
13**/\r
14\r
15#include <Library/ArmPlatformLib.h>\r
16#include <Library/DebugLib.h>\r
17#include <Library/PcdLib.h>\r
18#include <Library/IoLib.h>\r
19#include <Library/MemoryAllocationLib.h>\r
20\r
21// DDR attributes\r
22#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
23#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
24#define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK\r
25#define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED\r
26\r
27/**\r
28 Return the information about the memory region in permanent memory used by PEI\r
29\r
30 One of the PEI Module must install the permament memory used by PEI. This function returns the\r
31 information about this region for your platform to this PEIM module.\r
32\r
33 @param[out] PeiMemoryBase Base of the memory region used by PEI core and modules\r
34 @param[out] PeiMemorySize Size of the memory region used by PEI core and modules\r
35\r
36**/\r
37VOID ArmPlatformGetPeiMemory (\r
38 OUT UINTN* PeiMemoryBase,\r
39 OUT UINTN* PeiMemorySize\r
40 ) {\r
41 ASSERT((PeiMemoryBase != NULL) && (PeiMemorySize != NULL));\r
42 \r
43 *PeiMemoryBase = ARM_VE_DRAM_BASE + ARM_VE_EFI_FIX_ADDRESS_REGION_SZ;\r
44 *PeiMemorySize = ARM_VE_EFI_MEMORY_REGION_SZ;\r
45}\r
46\r
47/**\r
48 Return the Virtual Memory Map of your platform\r
49\r
50 This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.\r
51\r
52 @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-\r
53 Virtual Memory mapping. This array must be ended by a zero-filled\r
54 entry\r
55\r
56**/\r
57VOID ArmPlatformGetVirtualMemoryMap(ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap) {\r
58 UINT32 val32;\r
59 UINT32 CacheAttributes;\r
60 BOOLEAN bTrustzoneSupport;\r
61 UINTN Index = 0;\r
62 ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;\r
63\r
64 ASSERT(VirtualMemoryMap != NULL);\r
65\r
66 VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * 9);\r
67 if (VirtualMemoryTable == NULL) {\r
68 return;\r
69 }\r
70\r
71 // Check if SMC TZASC is enabled. If Trustzone not enabled then all the entries remain in Secure World.\r
72 // As this value can be changed in the Board Configuration file, the UEFI firmware needs to work for both case\r
73 val32 = MmioRead32(ARM_VE_SYS_CFGRW1_REG);\r
74 if (ARM_VE_CFGRW1_TZASC_EN_BIT_MASK & val32) {\r
75 bTrustzoneSupport = TRUE;\r
76 } else {\r
77 bTrustzoneSupport = FALSE;\r
78 }\r
79\r
80 if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
81 CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED);\r
82 } else {\r
83 CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED);\r
84 }\r
85\r
86 // ReMap (Either NOR Flash or DRAM)\r
87 VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;\r
88 VirtualMemoryTable[Index].VirtualBase = ARM_VE_REMAP_BASE;\r
89 VirtualMemoryTable[Index].Length = ARM_VE_REMAP_SZ;\r
90 VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;\r
91\r
92 // DDR\r
93 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_DRAM_BASE;\r
94 VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;\r
95 VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;\r
96 VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;\r
97\r
98 // SMC CS7\r
99 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;\r
100 VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;\r
101 VirtualMemoryTable[Index].Length = ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ;\r
102 VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
103\r
104 // SMB CS0-CS1 - NOR Flash 1 & 2\r
105 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;\r
106 VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;\r
107 VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;\r
108 VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
109\r
110 // SMB CS2 - SRAM\r
111 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;\r
112 VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_SRAM_BASE;\r
113 VirtualMemoryTable[Index].Length = ARM_VE_SMB_SRAM_SZ;\r
114 VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;\r
115\r
116 // SMB CS3-CS6 - Motherboard Peripherals\r
117 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;\r
118 VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;\r
119 VirtualMemoryTable[Index].Length = ARM_VE_SMB_PERIPH_SZ;\r
120 VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
121\r
122 // If a Logic Tile is connected to The ARM Versatile Express Motherboard\r
123 if (MmioRead32(ARM_VE_SYS_PROCID1_REG) != 0) {\r
124 VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE;\r
125 VirtualMemoryTable[Index].VirtualBase = ARM_VE_EXT_AXI_BASE;\r
126 VirtualMemoryTable[Index].Length = ARM_VE_EXT_AXI_SZ;\r
127 VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
128 }\r
129\r
130 // End of Table\r
131 VirtualMemoryTable[++Index].PhysicalBase = 0;\r
132 VirtualMemoryTable[Index].VirtualBase = 0;\r
133 VirtualMemoryTable[Index].Length = 0;\r
134 VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
135\r
136 *VirtualMemoryMap = VirtualMemoryTable;\r
137}\r
138\r
139/**\r
140 Return the EFI Memory Map of your platform\r
141\r
142 This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource\r
143 Descriptor HOBs used by DXE core.\r
144\r
145 @param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an\r
146 EFI Memory region. This array must be ended by a zero-filled entry\r
147\r
148**/\r
149VOID ArmPlatformGetEfiMemoryMap (\r
150 OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap\r
151) {\r
152 EFI_RESOURCE_ATTRIBUTE_TYPE Attributes;\r
153 UINT64 MemoryBase;\r
154 UINTN Index = 0;\r
155 ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR *EfiMemoryTable;\r
156\r
157 ASSERT(EfiMemoryMap != NULL);\r
158\r
159 EfiMemoryTable = (ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR) * 6);\r
160\r
161 Attributes =\r
162 (\r
163 EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
164 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
165 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
166 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
167 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
168 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
169 EFI_RESOURCE_ATTRIBUTE_TESTED\r
170 );\r
171 MemoryBase = ARM_VE_DRAM_BASE;\r
172 \r
173 // Memory Reserved for fixed address allocations (such as Exception Vector Table)\r
174 EfiMemoryTable[Index].ResourceAttribute = Attributes;\r
175 EfiMemoryTable[Index].PhysicalStart = MemoryBase;\r
176 EfiMemoryTable[Index].NumberOfBytes = ARM_VE_EFI_FIX_ADDRESS_REGION_SZ;\r
177 \r
178 MemoryBase += ARM_VE_EFI_FIX_ADDRESS_REGION_SZ;\r
179\r
180 // Memory declared to PEI as permanent memory for PEI and DXE\r
181 EfiMemoryTable[++Index].ResourceAttribute = Attributes;\r
182 EfiMemoryTable[Index].PhysicalStart = MemoryBase;\r
183 EfiMemoryTable[Index].NumberOfBytes = ARM_VE_EFI_MEMORY_REGION_SZ;\r
184\r
185 MemoryBase += ARM_VE_EFI_MEMORY_REGION_SZ;\r
186\r
187 // We must reserve the memory used by the Firmware Volume copied in DRAM at 0x80000000\r
188 if (FeaturePcdGet(PcdStandalone) == FALSE) {\r
189 // Chunk between the EFI Memory region and the firmware\r
190 EfiMemoryTable[++Index].ResourceAttribute = Attributes;\r
191 EfiMemoryTable[Index].PhysicalStart = MemoryBase;\r
192 EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdBaseAddress) - MemoryBase;\r
193\r
194 // Chunk reserved by the firmware in DRAM\r
195 EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT);\r
196 EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdEmbeddedFdBaseAddress);\r
197 EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdSize);\r
198\r
199 MemoryBase = PcdGet32(PcdEmbeddedFdBaseAddress) + PcdGet32(PcdEmbeddedFdSize);\r
200 }\r
201 \r
202 // We allocate all the remain memory as untested system memory\r
203 EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_TESTED);\r
204 EfiMemoryTable[Index].PhysicalStart = MemoryBase;\r
205 EfiMemoryTable[Index].NumberOfBytes = ARM_VE_DRAM_SZ - (MemoryBase-ARM_VE_DRAM_BASE);\r
206\r
207 EfiMemoryTable[++Index].ResourceAttribute = 0;\r
208 EfiMemoryTable[Index].PhysicalStart = 0;\r
209 EfiMemoryTable[Index].NumberOfBytes = 0;\r
210\r
211 *EfiMemoryMap = EfiMemoryTable;\r
212}\r