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88d4f51d | 1 | #\r |
2 | # Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
3 | # \r | |
4 | # This program and the accompanying materials \r | |
5 | # are licensed and made available under the terms and conditions of the BSD License \r | |
6 | # which accompanies this distribution. The full text of the license may be found at \r | |
7 | # http:#opensource.org/licenses/bsd-license.php \r | |
8 | #\r | |
9 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | #\r | |
12 | #\r | |
13 | \r | |
14 | #include <AsmMacroIoLib.h>\r | |
15 | #include <Base.h>\r | |
16 | #include <Library/PcdLib.h>\r | |
17 | #include <AutoGen.h>\r | |
18 | #.include AsmMacroIoLib.inc\r | |
19 | \r | |
20 | #include <Chipset/ArmCortexA9.h>\r | |
21 | \r | |
22 | .text\r | |
23 | .align 2\r | |
24 | \r | |
25 | GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)\r | |
26 | \r | |
27 | # IN None\r | |
28 | # OUT r0 = SCU Base Address\r | |
29 | ASM_PFX(ArmGetScuBaseAddress):\r | |
30 | # Read Configuration Base Address Register. ArmCBar cannot be called to get\r | |
31 | # the Configuration BAR as a stack is not necessary setup. The SCU is at the\r | |
32 | # offset 0x0000 from the Private Memory Region.\r | |
33 | mrc p15, 4, r0, c15, c0, 0\r | |
34 | bx lr\r | |
35 | \r | |
36 | # IN None\r | |
37 | # OUT r0 = number of cores present in the system\r | |
38 | ASM_PFX(ArmGetCpuCountPerCluster):\r | |
39 | stmfd SP!, {r1-r2}\r | |
40 | \r | |
41 | # Read CP15 MIDR\r | |
42 | mrc p15, 0, r1, c0, c0, 0\r | |
43 | \r | |
44 | # Check if the CPU is A15\r | |
45 | mov r1, r1, LSR #4\r | |
46 | LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)\r | |
47 | and r1, r1, r0\r | |
48 | \r | |
49 | LoadConstantToReg (ARM_CPU_TYPE_A15, r0)\r | |
50 | cmp r1, r0\r | |
51 | beq _Read_cp15_reg\r | |
52 | \r | |
53 | _CPU_is_not_A15:\r | |
54 | mov r2, lr @ Save link register\r | |
55 | bl ArmGetScuBaseAddress @ Read SCU Base Address\r | |
56 | mov lr, r2 @ Restore link register val\r | |
57 | ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] @ Read SCU Config reg to get CPU count\r | |
58 | b _Return\r | |
59 | \r | |
60 | _Read_cp15_reg:\r | |
61 | mrc p15, 1, r0, c9, c0, 2 @ Read C9 register of CP15 to get CPU count\r | |
62 | lsr r0, #24\r | |
63 | \r | |
64 | _Return:\r | |
65 | and r0, r0, #3\r | |
66 | # Add '1' to the number of CPU on the Cluster\r | |
67 | add r0, r0, #1\r | |
68 | ldmfd SP!, {r1-r2}\r | |
69 | bx lr\r | |
70 | \r | |
71 | ASM_FUNCTION_REMOVE_IF_UNREFERENCED \r |