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1d5d0ae9 1/** @file NorFlashDxe.h
2
d5e12da4 3 Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
1d5d0ae9 4 This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12**/
13
14#ifndef __NOR_FLASH_DXE_H__
15#define __NOR_FLASH_DXE_H__
16
17
18#include <Base.h>
19#include <PiDxe.h>
20
21#include <Protocol/BlockIo.h>
22#include <Protocol/FirmwareVolumeBlock.h>
23
d5e12da4 24#include <Library/DebugLib.h>
25#include <Library/IoLib.h>
26#include <Library/NorFlashPlatformLib.h>
27#include <Library/UefiLib.h>
28
1d5d0ae9 29#include <ArmPlatform.h>
30
31#define HIGH_16_BITS 0xFFFF0000
32#define LOW_16_BITS 0x0000FFFF
33#define LOW_8_BITS 0x000000FF
34
1d5d0ae9 35// Device access macros
36// These are necessary because we use 2 x 16bit parts to make up 32bit data
37
38#define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
39
40#define GET_LOW_BYTE(value) ( value & LOW_8_BITS )
41#define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )
42
43// Each command must be sent simultaneously to both chips,
44// i.e. at the lower 16 bits AND at the higher 16 bits
d5e12da4 45#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))
1d5d0ae9 46#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
d5e12da4 47#define SEND_NOR_COMMAND(BaseAddr,OffsetAddr,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr), CREATE_DUAL_CMD(Cmd))
48#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
1d5d0ae9 49
50// Status Register Bits
d5e12da4 51#define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)
52#define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)
53#define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)
54#define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)
55#define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)
56#define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)
57#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)
58#define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)
1d5d0ae9 59
60// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
61
62// On chip buffer size for buffered programming operations
63// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.
64// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
65#define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)
66#define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
67#define MAX_BUFFERED_PROG_ITERATIONS 10000000
68#define BOUNDARY_OF_32_WORDS 0x7F
69
70// CFI Addresses
71#define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10
72#define P30_CFI_ADDR_VENDOR_ID 0x13
73
74// CFI Data
75#define CFI_QRY 0x00595251
76
77// READ Commands
78#define P30_CMD_READ_DEVICE_ID 0x0090
79#define P30_CMD_READ_STATUS_REGISTER 0x0070
80#define P30_CMD_CLEAR_STATUS_REGISTER 0x0050
81#define P30_CMD_READ_ARRAY 0x00FF
82#define P30_CMD_READ_CFI_QUERY 0x0098
83
84// WRITE Commands
85#define P30_CMD_WORD_PROGRAM_SETUP 0x0040
86#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010
87#define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8
88#define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0
89#define P30_CMD_BEFP_SETUP 0x0080
90#define P30_CMD_BEFP_CONFIRM 0x00D0
91
92// ERASE Commands
93#define P30_CMD_BLOCK_ERASE_SETUP 0x0020
94#define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0
95
96// SUSPEND Commands
97#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0
98#define P30_CMD_SUSPEND_RESUME 0x00D0
99
100// BLOCK LOCKING / UNLOCKING Commands
101#define P30_CMD_LOCK_BLOCK_SETUP 0x0060
102#define P30_CMD_LOCK_BLOCK 0x0001
103#define P30_CMD_UNLOCK_BLOCK 0x00D0
104#define P30_CMD_LOCK_DOWN_BLOCK 0x002F
105
106// PROTECTION Commands
107#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0
108
109// CONFIGURATION Commands
110#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
111#define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003
112
113#define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')
114#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)
115#define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)
116
117typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
118
119typedef EFI_STATUS (*NOR_FLASH_INITIALIZE) (NOR_FLASH_INSTANCE* Instance);
120
1d5d0ae9 121typedef struct {
122 VENDOR_DEVICE_PATH Vendor;
123 EFI_DEVICE_PATH_PROTOCOL End;
124} NOR_FLASH_DEVICE_PATH;
125
126struct _NOR_FLASH_INSTANCE {
127 UINT32 Signature;
128 EFI_HANDLE Handle;
129
130 BOOLEAN Initialized;
131 NOR_FLASH_INITIALIZE Initialize;
132
133 UINTN BaseAddress;
134 UINTN Size;
d5e12da4 135 EFI_LBA StartLba;
1d5d0ae9 136
137 EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;
138 EFI_BLOCK_IO_MEDIA Media;
139
140 BOOLEAN SupportFvb;
141 EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;
142
143 NOR_FLASH_DEVICE_PATH DevicePath;
144};
145
d5e12da4 146EFI_STATUS
147EFIAPI
148NorFlashGetDriverName (
149 IN EFI_COMPONENT_NAME_PROTOCOL *This,
150 IN CHAR8 *Language,
151 OUT CHAR16 **DriverName
152 );
153
154EFI_STATUS
155EFIAPI
156NorFlashGetControllerName (
157 IN EFI_COMPONENT_NAME_PROTOCOL *This,
158 IN EFI_HANDLE ControllerHandle,
159 IN EFI_HANDLE ChildHandle OPTIONAL,
160 IN CHAR8 *Language,
161 OUT CHAR16 **ControllerName
162 );
163
1d5d0ae9 164EFI_STATUS
165EFIAPI
166NorFlashBlkIoInitialize (
167 IN NOR_FLASH_INSTANCE* Instance
168 );
169
170EFI_STATUS
171NorFlashReadCfiData (
172 IN UINTN BaseAddress,
173 IN UINTN CFI_Offset,
174 IN UINT32 NumberOfBytes,
175 OUT UINT32 *Data
176);
177
178EFI_STATUS
179NorFlashWriteBuffer (
180 IN UINTN TargetAddress,
181 IN UINTN BufferSizeInBytes,
182 IN UINT32 *Buffer
183);
184
185
186//
187// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
188//
189EFI_STATUS
190EFIAPI
191NorFlashBlockIoReset (
192 IN EFI_BLOCK_IO_PROTOCOL *This,
193 IN BOOLEAN ExtendedVerification
194 );
195
196//
197// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
198//
199EFI_STATUS
200EFIAPI
201NorFlashBlockIoReadBlocks (
202 IN EFI_BLOCK_IO_PROTOCOL *This,
203 IN UINT32 MediaId,
204 IN EFI_LBA Lba,
205 IN UINTN BufferSizeInBytes,
206 OUT VOID *Buffer
207);
208
209//
210// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
211//
212EFI_STATUS
213EFIAPI
214NorFlashBlockIoWriteBlocks (
215 IN EFI_BLOCK_IO_PROTOCOL *This,
216 IN UINT32 MediaId,
217 IN EFI_LBA Lba,
218 IN UINTN BufferSizeInBytes,
219 IN VOID *Buffer
220);
221
222//
223// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
224//
225EFI_STATUS
226EFIAPI
227NorFlashBlockIoFlushBlocks (
228 IN EFI_BLOCK_IO_PROTOCOL *This
229);
230
231
232//
233// NorFlashFvbDxe.c
234//
235
236EFI_STATUS
237EFIAPI
238NorFlashFvbInitialize (
239 IN NOR_FLASH_INSTANCE* Instance
240);
241
242EFI_STATUS
243EFIAPI
244FvbGetAttributes(
245 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
246 OUT EFI_FVB_ATTRIBUTES_2 *Attributes
247);
248
249EFI_STATUS
250EFIAPI
251FvbSetAttributes(
252 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
253 IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
254);
255
256EFI_STATUS
257EFIAPI
258FvbGetPhysicalAddress(
259 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
260 OUT EFI_PHYSICAL_ADDRESS *Address
261);
262
263EFI_STATUS
264EFIAPI
265FvbGetBlockSize(
266 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
267 IN EFI_LBA Lba,
268 OUT UINTN *BlockSize,
269 OUT UINTN *NumberOfBlocks
270);
271
272EFI_STATUS
273EFIAPI
274FvbRead(
275 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
276 IN EFI_LBA Lba,
277 IN UINTN Offset,
278 IN OUT UINTN *NumBytes,
279 IN OUT UINT8 *Buffer
280);
281
282EFI_STATUS
283EFIAPI
284FvbWrite(
285 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
286 IN EFI_LBA Lba,
287 IN UINTN Offset,
288 IN OUT UINTN *NumBytes,
289 IN UINT8 *Buffer
290);
291
292EFI_STATUS
293EFIAPI
294FvbEraseBlocks(
295 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
296 ...
297);
298
299//
300// NorFlashDxe.c
301//
302
303EFI_STATUS
304NorFlashUnlockAndEraseSingleBlock(
305 IN UINTN BlockAddress
306);
307
308EFI_STATUS
309NorFlashWriteSingleBlock (
310 IN UINTN DeviceBaseAddress,
311 IN EFI_LBA Lba,
312 IN UINT32 *pDataBuffer,
313 IN UINT32 BlockSizeInWords
314);
315
316EFI_STATUS
317NorFlashWriteBlocks (
318 IN NOR_FLASH_INSTANCE *Instance,
319 IN EFI_LBA Lba,
320 IN UINTN BufferSizeInBytes,
321 IN VOID *Buffer
322);
323
324EFI_STATUS
325NorFlashReadBlocks (
326 IN NOR_FLASH_INSTANCE *Instance,
327 IN EFI_LBA Lba,
328 IN UINTN BufferSizeInBytes,
329 OUT VOID *Buffer
330);
331
332EFI_STATUS
333NorFlashReset (
334 IN NOR_FLASH_INSTANCE *Instance
335);
336
337#endif /* __NOR_FLASH_DXE_H__ */