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1d5d0ae9 | 1 | /** @file |
2 | Template for Timer Architecture Protocol driver of the ARM flavor | |
3 | ||
4 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> | |
0db25ccc | 5 | Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR> |
1d5d0ae9 | 6 | |
7 | This program and the accompanying materials | |
8 | are licensed and made available under the terms and conditions of the BSD License | |
9 | which accompanies this distribution. The full text of the license may be found at | |
10 | http://opensource.org/licenses/bsd-license.php | |
11 | ||
12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
14 | ||
15 | **/ | |
16 | ||
17 | ||
18 | #include <PiDxe.h> | |
19 | ||
20 | #include <Library/BaseLib.h> | |
21 | #include <Library/DebugLib.h> | |
22 | #include <Library/BaseMemoryLib.h> | |
23 | #include <Library/UefiBootServicesTableLib.h> | |
24 | #include <Library/UefiLib.h> | |
25 | #include <Library/PcdLib.h> | |
26 | #include <Library/IoLib.h> | |
27 | ||
28 | #include <Protocol/Timer.h> | |
29 | #include <Protocol/HardwareInterrupt.h> | |
30 | ||
31 | #include <Drivers/SP804Timer.h> | |
5cc45b70 | 32 | |
11c20f4e | 33 | #define SP804_TIMER_PERIODIC_BASE ((UINTN)PcdGet32 (PcdSP804TimerPeriodicBase)) |
34 | #define SP804_TIMER_METRONOME_BASE ((UINTN)PcdGet32 (PcdSP804TimerMetronomeBase)) | |
35 | #define SP804_TIMER_PERFORMANCE_BASE ((UINTN)PcdGet32 (PcdSP804TimerPerformanceBase)) | |
1d5d0ae9 | 36 | |
37 | // The notification function to call on every timer interrupt. | |
11c20f4e | 38 | EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL; |
39 | EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; | |
1d5d0ae9 | 40 | |
41 | // The current period of the timer interrupt | |
11c20f4e | 42 | UINT64 mTimerPeriod = 0; |
1d5d0ae9 | 43 | |
44 | // Cached copy of the Hardware Interrupt protocol instance | |
45 | EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL; | |
46 | ||
47 | // Cached interrupt vector | |
48 | UINTN gVector; | |
49 | ||
1d5d0ae9 | 50 | |
51 | /** | |
52 | ||
53 | C Interrupt Handler called in the interrupt context when Source interrupt is active. | |
54 | ||
55 | ||
56 | @param Source Source of the interrupt. Hardware routing off a specific platform defines | |
57 | what source means. | |
58 | ||
59 | @param SystemContext Pointer to system register context. Mostly used by debuggers and will | |
60 | update the system context after the return from the interrupt if | |
61 | modified. Don't change these values unless you know what you are doing | |
62 | ||
63 | **/ | |
64 | VOID | |
65 | EFIAPI | |
66 | TimerInterruptHandler ( | |
67 | IN HARDWARE_INTERRUPT_SOURCE Source, | |
68 | IN EFI_SYSTEM_CONTEXT SystemContext | |
69 | ) | |
70 | { | |
71 | EFI_TPL OriginalTPL; | |
72 | ||
73 | // | |
74 | // DXE core uses this callback for the EFI timer tick. The DXE core uses locks | |
75 | // that raise to TPL_HIGH and then restore back to current level. Thus we need | |
76 | // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick. | |
77 | // | |
78 | OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL); | |
79 | ||
e100fa8c | 80 | // If the interrupt is shared then we must check if this interrupt source is the one associated to this Timer |
5cc45b70 | 81 | if (MmioRead32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_MSK_INT_STS_REG) != 0) { |
11c20f4e | 82 | // Clear the periodic interrupt |
5cc45b70 | 83 | MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_INT_CLR_REG, 0); |
1d5d0ae9 | 84 | |
11c20f4e | 85 | // Signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers |
e100fa8c | 86 | gInterrupt->EndOfInterrupt (gInterrupt, Source); |
1d5d0ae9 | 87 | |
e100fa8c | 88 | if (mTimerNotifyFunction) { |
89 | mTimerNotifyFunction (mTimerPeriod); | |
90 | } | |
1d5d0ae9 | 91 | } |
92 | ||
93 | gBS->RestoreTPL (OriginalTPL); | |
94 | } | |
95 | ||
96 | /** | |
97 | This function registers the handler NotifyFunction so it is called every time | |
98 | the timer interrupt fires. It also passes the amount of time since the last | |
99 | handler call to the NotifyFunction. If NotifyFunction is NULL, then the | |
100 | handler is unregistered. If the handler is registered, then EFI_SUCCESS is | |
101 | returned. If the CPU does not support registering a timer interrupt handler, | |
102 | then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler | |
103 | when a handler is already registered, then EFI_ALREADY_STARTED is returned. | |
104 | If an attempt is made to unregister a handler when a handler is not registered, | |
105 | then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to | |
106 | register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR | |
107 | is returned. | |
108 | ||
109 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. | |
110 | @param NotifyFunction The function to call when a timer interrupt fires. This | |
111 | function executes at TPL_HIGH_LEVEL. The DXE Core will | |
112 | register a handler for the timer interrupt, so it can know | |
113 | how much time has passed. This information is used to | |
114 | signal timer based events. NULL will unregister the handler. | |
115 | @retval EFI_SUCCESS The timer handler was registered. | |
116 | @retval EFI_UNSUPPORTED The platform does not support timer interrupts. | |
117 | @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already | |
118 | registered. | |
119 | @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not | |
120 | previously registered. | |
121 | @retval EFI_DEVICE_ERROR The timer handler could not be registered. | |
122 | ||
123 | **/ | |
124 | EFI_STATUS | |
125 | EFIAPI | |
126 | TimerDriverRegisterHandler ( | |
127 | IN EFI_TIMER_ARCH_PROTOCOL *This, | |
128 | IN EFI_TIMER_NOTIFY NotifyFunction | |
129 | ) | |
130 | { | |
131 | if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) { | |
132 | return EFI_INVALID_PARAMETER; | |
133 | } | |
134 | ||
135 | if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) { | |
136 | return EFI_ALREADY_STARTED; | |
137 | } | |
138 | ||
139 | mTimerNotifyFunction = NotifyFunction; | |
140 | ||
141 | return EFI_SUCCESS; | |
142 | } | |
143 | ||
144 | /** | |
5cc45b70 | 145 | Make sure all Dual Timers are disabled |
1d5d0ae9 | 146 | **/ |
147 | VOID | |
148 | EFIAPI | |
149 | ExitBootServicesEvent ( | |
150 | IN EFI_EVENT Event, | |
151 | IN VOID *Context | |
152 | ) | |
153 | { | |
5cc45b70 | 154 | // Disable 'Periodic Operation' timer if enabled |
155 | if (MmioRead32(SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) { | |
156 | MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, 0); | |
157 | } | |
1d5d0ae9 | 158 | |
5cc45b70 | 159 | // Disable 'Metronome/Delay' timer if enabled |
160 | if (MmioRead32(SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) { | |
161 | MmioAnd32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, 0); | |
162 | } | |
1d5d0ae9 | 163 | |
5cc45b70 | 164 | // Disable 'Performance' timer if enabled |
165 | if (MmioRead32(SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) { | |
166 | MmioAnd32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, 0); | |
167 | } | |
1d5d0ae9 | 168 | } |
169 | ||
170 | /** | |
171 | ||
172 | This function adjusts the period of timer interrupts to the value specified | |
173 | by TimerPeriod. If the timer period is updated, then the selected timer | |
174 | period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If | |
175 | the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. | |
176 | If an error occurs while attempting to update the timer period, then the | |
177 | timer hardware will be put back in its state prior to this call, and | |
178 | EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt | |
179 | is disabled. This is not the same as disabling the CPU's interrupts. | |
180 | Instead, it must either turn off the timer hardware, or it must adjust the | |
181 | interrupt controller so that a CPU interrupt is not generated when the timer | |
182 | interrupt fires. | |
183 | ||
184 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. | |
185 | @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If | |
186 | the timer hardware is not programmable, then EFI_UNSUPPORTED is | |
187 | returned. If the timer is programmable, then the timer period | |
188 | will be rounded up to the nearest timer period that is supported | |
189 | by the timer hardware. If TimerPeriod is set to 0, then the | |
190 | timer interrupts will be disabled. | |
191 | ||
192 | ||
193 | @retval EFI_SUCCESS The timer period was changed. | |
194 | @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt. | |
195 | @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error. | |
196 | ||
197 | **/ | |
198 | EFI_STATUS | |
199 | EFIAPI | |
200 | TimerDriverSetTimerPeriod ( | |
201 | IN EFI_TIMER_ARCH_PROTOCOL *This, | |
202 | IN UINT64 TimerPeriod | |
203 | ) | |
204 | { | |
205 | EFI_STATUS Status; | |
206 | UINT64 TimerTicks; | |
207 | ||
208 | // always disable the timer | |
5cc45b70 | 209 | MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE); |
1d5d0ae9 | 210 | |
211 | if (TimerPeriod == 0) { | |
23792dea | 212 | // Leave timer disabled from above, and... |
1d5d0ae9 | 213 | |
23792dea | 214 | // Disable timer 0/1 interrupt for a TimerPeriod of 0 |
1d5d0ae9 | 215 | Status = gInterrupt->DisableInterruptSource (gInterrupt, gVector); |
216 | } else { | |
11c20f4e | 217 | // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units * 10) |
1d5d0ae9 | 218 | TimerTicks = DivU64x32 (TimerPeriod, 10); |
5cc45b70 | 219 | TimerTicks = MultU64x32 (TimerTicks, PcdGet32(PcdSP804TimerFrequencyInMHz)); |
1d5d0ae9 | 220 | |
221 | // if it's larger than 32-bits, pin to highest value | |
222 | if (TimerTicks > 0xffffffff) { | |
1d5d0ae9 | 223 | TimerTicks = 0xffffffff; |
1d5d0ae9 | 224 | } |
225 | ||
226 | // Program the SP804 timer with the new count value | |
5cc45b70 | 227 | MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_LOAD_REG, TimerTicks); |
1d5d0ae9 | 228 | |
229 | // enable the timer | |
5cc45b70 | 230 | MmioOr32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE); |
1d5d0ae9 | 231 | |
232 | // enable timer 0/1 interrupts | |
233 | Status = gInterrupt->EnableInterruptSource (gInterrupt, gVector); | |
234 | } | |
235 | ||
236 | // Save the new timer period | |
237 | mTimerPeriod = TimerPeriod; | |
238 | return Status; | |
239 | } | |
240 | ||
241 | /** | |
242 | This function retrieves the period of timer interrupts in 100 ns units, | |
243 | returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod | |
244 | is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is | |
245 | returned, then the timer is currently disabled. | |
246 | ||
247 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. | |
248 | @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If | |
249 | 0 is returned, then the timer is currently disabled. | |
250 | ||
251 | ||
252 | @retval EFI_SUCCESS The timer period was returned in TimerPeriod. | |
253 | @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. | |
254 | ||
255 | **/ | |
256 | EFI_STATUS | |
257 | EFIAPI | |
258 | TimerDriverGetTimerPeriod ( | |
259 | IN EFI_TIMER_ARCH_PROTOCOL *This, | |
260 | OUT UINT64 *TimerPeriod | |
261 | ) | |
262 | { | |
263 | if (TimerPeriod == NULL) { | |
264 | return EFI_INVALID_PARAMETER; | |
265 | } | |
266 | ||
267 | *TimerPeriod = mTimerPeriod; | |
268 | return EFI_SUCCESS; | |
269 | } | |
270 | ||
271 | /** | |
272 | This function generates a soft timer interrupt. If the platform does not support soft | |
273 | timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned. | |
274 | If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler() | |
275 | service, then a soft timer interrupt will be generated. If the timer interrupt is | |
276 | enabled when this service is called, then the registered handler will be invoked. The | |
277 | registered handler should not be able to distinguish a hardware-generated timer | |
278 | interrupt from a software-generated timer interrupt. | |
279 | ||
280 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. | |
281 | ||
282 | @retval EFI_SUCCESS The soft timer interrupt was generated. | |
283 | @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts. | |
284 | ||
285 | **/ | |
286 | EFI_STATUS | |
287 | EFIAPI | |
288 | TimerDriverGenerateSoftInterrupt ( | |
289 | IN EFI_TIMER_ARCH_PROTOCOL *This | |
290 | ) | |
291 | { | |
292 | return EFI_UNSUPPORTED; | |
293 | } | |
294 | ||
295 | /** | |
296 | Interface structure for the Timer Architectural Protocol. | |
297 | ||
298 | @par Protocol Description: | |
299 | This protocol provides the services to initialize a periodic timer | |
300 | interrupt, and to register a handler that is called each time the timer | |
301 | interrupt fires. It may also provide a service to adjust the rate of the | |
302 | periodic timer interrupt. When a timer interrupt occurs, the handler is | |
303 | passed the amount of time that has passed since the previous timer | |
304 | interrupt. | |
305 | ||
306 | @param RegisterHandler | |
307 | Registers a handler that will be called each time the | |
308 | timer interrupt fires. TimerPeriod defines the minimum | |
309 | time between timer interrupts, so TimerPeriod will also | |
310 | be the minimum time between calls to the registered | |
311 | handler. | |
312 | ||
313 | @param SetTimerPeriod | |
314 | Sets the period of the timer interrupt in 100 nS units. | |
315 | This function is optional, and may return EFI_UNSUPPORTED. | |
316 | If this function is supported, then the timer period will | |
317 | be rounded up to the nearest supported timer period. | |
318 | ||
319 | ||
320 | @param GetTimerPeriod | |
321 | Retrieves the period of the timer interrupt in 100 nS units. | |
322 | ||
323 | @param GenerateSoftInterrupt | |
324 | Generates a soft timer interrupt that simulates the firing of | |
325 | the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for | |
326 | a period of time. | |
327 | ||
328 | **/ | |
329 | EFI_TIMER_ARCH_PROTOCOL gTimer = { | |
330 | TimerDriverRegisterHandler, | |
331 | TimerDriverSetTimerPeriod, | |
332 | TimerDriverGetTimerPeriod, | |
333 | TimerDriverGenerateSoftInterrupt | |
334 | }; | |
335 | ||
336 | ||
337 | /** | |
338 | Initialize the state information for the Timer Architectural Protocol and | |
339 | the Timer Debug support protocol that allows the debugger to break into a | |
340 | running program. | |
341 | ||
342 | @param ImageHandle of the loaded driver | |
343 | @param SystemTable Pointer to the System Table | |
344 | ||
345 | @retval EFI_SUCCESS Protocol registered | |
346 | @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure | |
347 | @retval EFI_DEVICE_ERROR Hardware problems | |
348 | ||
349 | **/ | |
350 | EFI_STATUS | |
351 | EFIAPI | |
352 | TimerInitialize ( | |
353 | IN EFI_HANDLE ImageHandle, | |
354 | IN EFI_SYSTEM_TABLE *SystemTable | |
355 | ) | |
356 | { | |
357 | EFI_HANDLE Handle = NULL; | |
358 | EFI_STATUS Status; | |
359 | ||
8ddaf471 | 360 | // Set the interrupt timer number |
361 | gVector = PcdGet32(PcdSP804TimerPeriodicInterruptNum); | |
362 | ||
1d5d0ae9 | 363 | // Find the interrupt controller protocol. ASSERT if not found. |
364 | Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt); | |
365 | ASSERT_EFI_ERROR (Status); | |
366 | ||
1d5d0ae9 | 367 | // Disable the timer |
368 | Status = TimerDriverSetTimerPeriod (&gTimer, 0); | |
369 | ASSERT_EFI_ERROR (Status); | |
370 | ||
371 | // Install interrupt handler | |
1d5d0ae9 | 372 | Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler); |
373 | ASSERT_EFI_ERROR (Status); | |
374 | ||
1d5d0ae9 | 375 | // configure timer 0 for periodic operation, 32 bits, no prescaler, and interrupt enabled |
5cc45b70 | 376 | MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE); |
1d5d0ae9 | 377 | |
378 | // Set up default timer | |
379 | Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD | |
380 | ASSERT_EFI_ERROR (Status); | |
381 | ||
382 | // Install the Timer Architectural Protocol onto a new handle | |
383 | Status = gBS->InstallMultipleProtocolInterfaces( | |
384 | &Handle, | |
385 | &gEfiTimerArchProtocolGuid, &gTimer, | |
386 | NULL | |
387 | ); | |
388 | ASSERT_EFI_ERROR(Status); | |
389 | ||
390 | // Register for an ExitBootServicesEvent | |
391 | Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); | |
392 | ASSERT_EFI_ERROR (Status); | |
393 | ||
394 | return Status; | |
395 | } |