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MdePkg: Call CoreInitializeMemoryAttributesTable() in DXE Entrypoint.
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cd872e40 1//\r
5dbacdb2 2// Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
cd872e40 3//\r
4// This program and the accompanying materials\r
5// are licensed and made available under the terms and conditions of the BSD License\r
6// which accompanies this distribution. The full text of the license may be found at\r
7// http://opensource.org/licenses/bsd-license.php\r
8//\r
9// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
11//\r
12//\r
13\r
14#include <AsmMacroIoLib.h>\r
15#include <Base.h>\r
16#include <Library/PcdLib.h>\r
17#include <AutoGen.h>\r
18\r
063ad84e 19#include <Chipset/ArmV7.h>\r
20\r
cd872e40 21.text\r
22.align 3\r
23\r
cd872e40 24GCC_ASM_IMPORT(CEntryPoint)\r
bebda7ce 25GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r
0787bc61 26GCC_ASM_IMPORT(ArmReadMpidr)\r
b5a57223 27GCC_ASM_IMPORT(ArmPlatformPeiBootAction)\r
17839a45 28GCC_ASM_IMPORT(ArmPlatformStackSet)\r
d269095b 29GCC_ASM_EXPORT(_ModuleEntryPoint)\r
5dbacdb2 30GCC_ASM_EXPORT(mSystemMemoryEnd)\r
cd872e40 31\r
5dbacdb2
OM
32StartupAddr: .word CEntryPoint\r
33mSystemMemoryEnd: .8byte 0\r
cd872e40 34\r
cd872e40 35\r
36ASM_PFX(_ModuleEntryPoint):\r
b5a57223 37 // Do early platform specific actions\r
38 bl ASM_PFX(ArmPlatformPeiBootAction)\r
39\r
0787bc61 40 // Get ID of this CPU in Multicore system\r
41 bl ASM_PFX(ArmReadMpidr)\r
bebda7ce 42 // Keep a copy of the MpId register value\r
c2d87a49 43 mov r8, r0\r
cd872e40 44\r
d269095b 45_SetSVCMode:\r
99565b88 46 // Enter SVC mode, Disable FIQ and IRQ\r
063ad84e 47 mov r1, #(CPSR_MODE_SVC | CPSR_IRQ | CPSR_FIQ)\r
d269095b 48 msr CPSR_c, r1\r
49\r
2dbcb8f0 50// Check if we can install the stack at the top of the System Memory or if we need\r
d269095b 51// to install the stacks at the bottom of the Firmware Device (case the FD is located\r
52// at the top of the DRAM)\r
5dbacdb2
OM
53_SystemMemoryEndInit:\r
54 ldr r1, mSystemMemoryEnd\r
55\r
56 // Is mSystemMemoryEnd initialized?\r
57 cmp r1, #0\r
58 bne _SetupStackPosition\r
59\r
60 LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r
61 LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r
2569b068 62 sub r2, r2, #1\r
5dbacdb2
OM
63 add r1, r1, r2\r
64 // Update the global variable\r
65 adr r2, mSystemMemoryEnd\r
66 str r1, [r2]\r
67\r
68_SetupStackPosition:\r
69 // r1 = SystemMemoryTop\r
cd872e40 70\r
d269095b 71 // Calculate Top of the Firmware Device\r
f92b93c9 72 LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r
73 LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r
2569b068 74 sub r3, r3, #1\r
7defe7b3 75 add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
d269095b 76\r
77 // UEFI Memory Size (stacks are allocated in this region)\r
78 LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
79\r
80 //\r
81 // Reserve the memory for the UEFI region (contain stacks on its top)\r
82 //\r
83\r
84 // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r
91c38d4e
RC
85 subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r
86 bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r
87 cmp r0, r4\r
88 bge _SetupStack\r
d269095b 89\r
90 // Case the top of stacks is the FdBaseAddress\r
91c38d4e 91 mov r1, r2\r
cd872e40 92\r
93_SetupStack:\r
2dbcb8f0 94 // r1 contains the top of the stack (and the UEFI Memory)\r
d269095b 95\r
2569b068 96 // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
97 // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
98 // top of the memory space)\r
c2d87a49 99 adds r9, r1, #1\r
2569b068 100 bcs _SetupOverflowStack\r
101\r
102_SetupAlignedStack:\r
c2d87a49 103 mov r1, r9\r
2569b068 104 b _GetBaseUefiMemory\r
105\r
106_SetupOverflowStack:\r
107 // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
108 // aligned (4KB)\r
c2d87a49
OM
109 LoadConstantToReg (EFI_PAGE_MASK, r9)\r
110 and r9, r9, r1\r
111 sub r1, r1, r9\r
2569b068 112\r
113_GetBaseUefiMemory:\r
d269095b 114 // Calculate the Base of the UEFI Memory\r
c2d87a49 115 sub r9, r1, r4\r
cd872e40 116\r
2dbcb8f0 117_GetStackBase:\r
1377db63 118 // r1 = The top of the Mpcore Stacks\r
2dbcb8f0 119 // Stack for the primary core = PrimaryCoreStack\r
120 LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
c2d87a49 121 sub r10, r1, r2\r
17839a45 122\r
123 // Stack for the secondary core = Number of Cores - 1\r
124 LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r
91c38d4e 125 sub r0, r0, #1\r
17839a45 126 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r
127 mul r1, r1, r0\r
c2d87a49 128 sub r10, r10, r1\r
17839a45 129\r
c2d87a49 130 // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
91c38d4e
RC
131 mov r0, r10\r
132 mov r1, r8\r
17839a45 133 //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
1377db63 134 LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
17839a45 135 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
91c38d4e 136 bl ASM_PFX(ArmPlatformStackSet)\r
2dbcb8f0 137\r
138 // Is it the Primary Core ?\r
c2d87a49 139 mov r0, r8\r
bebda7ce 140 bl ASM_PFX(ArmPlatformIsPrimaryCore)\r
141 cmp r0, #1\r
cd872e40 142 bne _PrepareArguments\r
143\r
cd872e40 144_PrepareArguments:\r
c2d87a49
OM
145 mov r0, r8\r
146 mov r1, r9\r
147 mov r2, r10\r
c524ffbb 148 mov r3, sp\r
149\r
cd872e40 150 // Move sec startup address into a data register\r
151 // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
c524ffbb 152 ldr r4, StartupAddr\r
cd872e40 153\r
d269095b 154 // Jump to PrePiCore C code\r
0787bc61 155 // r0 = MpId\r
cd872e40 156 // r1 = UefiMemoryBase\r
c524ffbb 157 // r2 = StacksBase\r
c524ffbb 158 blx r4\r
cd872e40 159\r
2dbcb8f0 160_NeverReturn:\r
161 b _NeverReturn\r
162\r