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1/** @file\r
2*\r
3* Copyright (c) 2014, Linaro Limited. All rights reserved.\r
4*\r
5* This program and the accompanying materials\r
6* are licensed and made available under the terms and conditions of the BSD License\r
7* which accompanies this distribution. The full text of the license may be found at\r
8* http://opensource.org/licenses/bsd-license.php\r
9*\r
10* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12*\r
13**/\r
14\r
15#include <Library/ArmPlatformLib.h>\r
16#include <Library/DebugLib.h>\r
17#include <Library/BaseMemoryLib.h>\r
18#include <Library/PcdLib.h>\r
19#include <Library/IoLib.h>\r
20#include <Library/MemoryAllocationLib.h>\r
21#include <ArmPlatform.h>\r
22\r
23// Number of Virtual Memory Map Descriptors\r
24#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 2\r
25\r
26// DDR attributes\r
27#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
28#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
29\r
30EFI_PHYSICAL_ADDRESS\r
31ArmGetPhysAddrTop (\r
32 VOID\r
33 );\r
34\r
35/**\r
36 Return the Virtual Memory Map of your platform\r
37\r
38 This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU\r
39 on your platform.\r
40\r
41 @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR\r
42 describing a Physical-to-Virtual Memory\r
43 mapping. This array must be ended by a\r
44 zero-filled entry\r
45\r
46**/\r
47VOID\r
48ArmPlatformGetVirtualMemoryMap (\r
49 IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap\r
50 )\r
51{\r
52 ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;\r
53\r
54 ASSERT (VirtualMemoryMap != NULL);\r
55\r
56 VirtualMemoryTable = AllocatePages (\r
57 EFI_SIZE_TO_PAGES (\r
58 sizeof (ARM_MEMORY_REGION_DESCRIPTOR)\r
59 * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS\r
60 )\r
61 );\r
62\r
63 if (VirtualMemoryTable == NULL) {\r
64 DEBUG ((EFI_D_ERROR, "%a: Error: Failed AllocatePages()\n", __FUNCTION__));\r
65 return;\r
66 }\r
67\r
68 //\r
69 // Map the entire physical memory space as cached. The only device\r
70 // we care about is the GIC, which will be stage 2 mapped as a device\r
71 // by the hypervisor, which will override the cached mapping we install\r
72 // here.\r
73 //\r
74 VirtualMemoryTable[0].PhysicalBase = 0x0;\r
75 VirtualMemoryTable[0].VirtualBase = 0x0;\r
76 VirtualMemoryTable[0].Length = ArmGetPhysAddrTop ();\r
77 VirtualMemoryTable[0].Attributes = DDR_ATTRIBUTES_CACHED;\r
78\r
79 // End of Table\r
80 ZeroMem (&VirtualMemoryTable[1], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));\r
81\r
82 *VirtualMemoryMap = VirtualMemoryTable;\r
83}\r