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1 | //\r |
2 | // Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r | |
3 | // Copyright (c) 2015, Linaro Limited. All rights reserved.\r | |
4 | //\r | |
5 | // This program and the accompanying materials\r | |
6 | // are licensed and made available under the terms and conditions of the BSD License\r | |
7 | // which accompanies this distribution. The full text of the license may be found at\r | |
8 | // http://opensource.org/licenses/bsd-license.php\r | |
9 | //\r | |
10 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | //\r | |
13 | //\r | |
14 | \r | |
15 | #include <AsmMacroIoLib.h>\r | |
16 | #include <Base.h>\r | |
17 | #include <Library/PcdLib.h>\r | |
18 | #include <AutoGen.h>\r | |
19 | \r | |
20 | .text\r | |
21 | .align 3\r | |
22 | \r | |
23 | GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r | |
24 | GCC_ASM_IMPORT(ArmReadMpidr)\r | |
25 | GCC_ASM_IMPORT(ArmPlatformPeiBootAction)\r | |
26 | GCC_ASM_IMPORT(ArmPlatformStackSet)\r | |
27 | GCC_ASM_EXPORT(_ModuleEntryPoint)\r | |
28 | ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)\r | |
29 | \r | |
30 | StartupAddr: .long ASM_PFX(CEntryPoint)\r | |
31 | ASM_PFX(mSystemMemoryEnd): .quad 0\r | |
32 | \r | |
33 | __relocs:\r | |
34 | .long __reloc_base - __relocs\r | |
35 | .long __reloc_start - __relocs\r | |
36 | .long __reloc_end - __relocs\r | |
37 | \r | |
38 | ASM_PFX(_ModuleEntryPoint):\r | |
39 | //\r | |
40 | // We are built as a ET_DYN PIE executable, so we need to process all\r | |
41 | // relative relocations if we are executing from a different offset than we\r | |
42 | // were linked at. This is only possible if we are running from RAM.\r | |
43 | //\r | |
44 | \r | |
45 | adr r12, __relocs\r | |
46 | ldrd r4, r5, [r12]\r | |
47 | ldr r6, [r12, #8]\r | |
48 | \r | |
49 | add r4, r4, r12\r | |
50 | add r5, r5, r12\r | |
51 | add r6, r6, r12\r | |
52 | \r | |
53 | .Lreloc_loop:\r | |
54 | cmp r5, r6\r | |
55 | bhs .Lreloc_done\r | |
56 | \r | |
57 | //\r | |
58 | // AArch32 uses the ELF32 REL format, which means each entry in the\r | |
59 | // relocation table consists of\r | |
60 | //\r | |
61 | // UINT32 offset : the relative offset of the value that needs to\r | |
62 | // be relocated\r | |
63 | // UINT32 info : relocation type and symbol index (the latter is\r | |
64 | // not used for R_ARM_RELATIVE relocations)\r | |
65 | //\r | |
66 | ldrd r8, r9, [r5], #8 // read offset into r8 and info into r9\r | |
67 | cmp r9, #23 // check info == R_ARM_RELATIVE?\r | |
68 | bne .Lreloc_loop // not a relative relocation? then skip\r | |
69 | \r | |
70 | ldr r9, [r8, r4] // read addend into r9\r | |
71 | add r9, r9, r1 // add image base to addend to get relocated value\r | |
72 | str r9, [r8, r4] // write relocated value at offset\r | |
73 | b .Lreloc_loop\r | |
74 | .Lreloc_done:\r | |
75 | \r | |
76 | // Do early platform specific actions\r | |
77 | bl ASM_PFX(ArmPlatformPeiBootAction)\r | |
78 | \r | |
79 | // Get ID of this CPU in Multicore system\r | |
80 | bl ASM_PFX(ArmReadMpidr)\r | |
81 | // Keep a copy of the MpId register value\r | |
82 | mov r10, r0\r | |
83 | \r | |
84 | // Check if we can install the stack at the top of the System Memory or if we need\r | |
85 | // to install the stacks at the bottom of the Firmware Device (case the FD is located\r | |
86 | // at the top of the DRAM)\r | |
87 | _SetupStackPosition:\r | |
88 | // Compute Top of System Memory\r | |
89 | ldr r12, =PcdGet64 (PcdSystemMemoryBase)\r | |
90 | ldr r1, [r12]\r | |
91 | ldr r12, =PcdGet64 (PcdSystemMemorySize)\r | |
92 | ldrd r2, r3, [r12]\r | |
93 | \r | |
94 | // calculate the top of memory, and record it in mSystemMemoryEnd\r | |
95 | adds r2, r2, r1\r | |
96 | sub r2, r2, #1\r | |
97 | addcs r3, r3, #1\r | |
98 | adr r12, mSystemMemoryEnd\r | |
99 | strd r2, r3, [r12]\r | |
100 | \r | |
101 | // truncate the memory used by UEFI to 4 GB range\r | |
102 | teq r3, #0\r | |
103 | movne r1, #-1\r | |
104 | moveq r1, r2\r | |
105 | \r | |
106 | // Calculate Top of the Firmware Device\r | |
107 | ldr r12, =PcdGet64 (PcdFdBaseAddress)\r | |
108 | ldr r2, [r12]\r | |
109 | ldr r3, =FixedPcdGet32 (PcdFdSize)\r | |
110 | sub r3, r3, #1\r | |
111 | add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r | |
112 | \r | |
113 | // UEFI Memory Size (stacks are allocated in this region)\r | |
114 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r | |
115 | \r | |
116 | //\r | |
117 | // Reserve the memory for the UEFI region (contain stacks on its top)\r | |
118 | //\r | |
119 | \r | |
120 | // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r | |
121 | subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r | |
122 | bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r | |
123 | cmp r0, r4\r | |
124 | bge _SetupStack\r | |
125 | \r | |
126 | // Case the top of stacks is the FdBaseAddress\r | |
127 | mov r1, r2\r | |
128 | \r | |
129 | _SetupStack:\r | |
130 | // r1 contains the top of the stack (and the UEFI Memory)\r | |
131 | \r | |
132 | // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r | |
133 | // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r | |
134 | // top of the memory space)\r | |
135 | adds r11, r1, #1\r | |
136 | bcs _SetupOverflowStack\r | |
137 | \r | |
138 | _SetupAlignedStack:\r | |
139 | mov r1, r11\r | |
140 | b _GetBaseUefiMemory\r | |
141 | \r | |
142 | _SetupOverflowStack:\r | |
143 | // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r | |
144 | // aligned (4KB)\r | |
145 | LoadConstantToReg (EFI_PAGE_MASK, r11)\r | |
146 | and r11, r11, r1\r | |
147 | sub r1, r1, r11\r | |
148 | \r | |
149 | _GetBaseUefiMemory:\r | |
150 | // Calculate the Base of the UEFI Memory\r | |
151 | sub r11, r1, r4\r | |
152 | \r | |
153 | _GetStackBase:\r | |
154 | // r1 = The top of the Mpcore Stacks\r | |
155 | // Stack for the primary core = PrimaryCoreStack\r | |
156 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
298f8361 | 157 | sub r9, r1, r2\r |
809a639e AB |
158 | \r |
159 | // Stack for the secondary core = Number of Cores - 1\r | |
160 | LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r | |
161 | sub r0, r0, #1\r | |
162 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r | |
163 | mul r1, r1, r0\r | |
298f8361 | 164 | sub r9, r9, r1\r |
809a639e | 165 | \r |
298f8361 AB |
166 | // r9 = The base of the MpCore Stacks (primary stack & secondary stacks)\r |
167 | mov r0, r9\r | |
809a639e AB |
168 | mov r1, r10\r |
169 | //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r | |
170 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
171 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r | |
172 | bl ASM_PFX(ArmPlatformStackSet)\r | |
173 | \r | |
174 | // Is it the Primary Core ?\r | |
175 | mov r0, r10\r | |
176 | bl ASM_PFX(ArmPlatformIsPrimaryCore)\r | |
177 | cmp r0, #1\r | |
178 | bne _PrepareArguments\r | |
179 | \r | |
180 | _PrepareArguments:\r | |
181 | mov r0, r10\r | |
182 | mov r1, r11\r | |
298f8361 | 183 | mov r2, r9\r |
809a639e AB |
184 | \r |
185 | // Move sec startup address into a data register\r | |
186 | // Ensure we're jumping to FV version of the code (not boot remapped alias)\r | |
187 | ldr r4, StartupAddr\r | |
188 | \r | |
189 | // Jump to PrePiCore C code\r | |
190 | // r0 = MpId\r | |
191 | // r1 = UefiMemoryBase\r | |
192 | // r2 = StacksBase\r | |
193 | blx r4\r | |
194 | \r | |
195 | _NeverReturn:\r | |
196 | b _NeverReturn\r |