ArmVirtPkg/PrePi: use correct callee saved regs

Both the ARM and the AARCH64 versions of the PrePi code (shared between
ArmVirtQemuKernel and ArmVirtXen) 'preserve' values across a function
call using registers that are not in fact callee saved. So fix that.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>

diff --git a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
index 68049d5df2bf31ea5d12fda82acb1c41ecbee86e..d6be3454183411e2d0ad4c92ea79e659412c5915 100644 (file)
--- a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
+++ b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
@@ -71,7 +71,7 @@ ASM_PFX(_ModuleEntryPoint):
   // Get ID of this CPU in Multicore system\r
   bl    ASM_PFX(ArmReadMpidr)\r
   // Keep a copy of the MpId register value\r
-  mov   x10, x0\r
+  mov   x20, x0\r
 \r
 // Check if we can install the stack at the top of the System Memory or if we need\r
 // to install the stacks at the bottom of the Firmware Device (case the FD is located\r
@@ -113,40 +113,40 @@ _SetupStack:
   // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
   // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
   // top of the memory space)\r
-  adds  x11, x1, #1\r
+  adds  x21, x1, #1\r
   b.cs  _SetupOverflowStack\r
 \r
 _SetupAlignedStack:\r
-  mov   x1, x11\r
+  mov   x1, x21\r
   b     _GetBaseUefiMemory\r
 \r
 _SetupOverflowStack:\r
   // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
   // aligned (4KB)\r
-  LoadConstantToReg (EFI_PAGE_MASK, x11)\r
-  and   x11, x11, x1\r
-  sub   x1, x1, x11\r
+  LoadConstantToReg (EFI_PAGE_MASK, x21)\r
+  and   x21, x21, x1\r
+  sub   x1, x1, x21\r
 \r
 _GetBaseUefiMemory:\r
   // Calculate the Base of the UEFI Memory\r
-  sub   x11, x1, x4\r
+  sub   x21, x1, x4\r
 \r
 _GetStackBase:\r
   // r1 = The top of the Mpcore Stacks\r
   // Stack for the primary core = PrimaryCoreStack\r
   LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)\r
-  sub   x12, x1, x2\r
+  sub   x22, x1, x2\r
 \r
   // Stack for the secondary core = Number of Cores - 1\r
   LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)\r
   sub   x0, x0, #1\r
   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)\r
   mul   x1, x1, x0\r
-  sub   x12, x12, x1\r
+  sub   x22, x22, x1\r
 \r
-  // x12 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
-  mov   x0, x12\r
-  mov   x1, x10\r
+  // x22 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
+  mov   x0, x22\r
+  mov   x1, x20\r
   //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
   LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)\r
   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x3)\r
@@ -159,9 +159,9 @@ _GetStackBase:
   bne   _PrepareArguments\r
 \r
 _PrepareArguments:\r
-  mov   x0, x10\r
-  mov   x1, x11\r
-  mov   x2, x12\r
+  mov   x0, x20\r
+  mov   x1, x21\r
+  mov   x2, x22\r
 \r
   // Move sec startup address into a data register\r
   // Ensure we're jumping to FV version of the code (not boot remapped alias)\r

diff --git a/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S b/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S
index 441db36857de85cc651a129e2302bff138cac203..3215c7d55876bc9478a9d9c0156c967cb051b67a 100644 (file)
--- a/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S
+++ b/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S
@@ -154,17 +154,17 @@ _GetStackBase:
   // r1 = The top of the Mpcore Stacks\r
   // Stack for the primary core = PrimaryCoreStack\r
   LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
-  sub   r12, r1, r2\r
+  sub   r9, r1, r2\r
 \r
   // Stack for the secondary core = Number of Cores - 1\r
   LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r
   sub   r0, r0, #1\r
   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r
   mul   r1, r1, r0\r
-  sub   r12, r12, r1\r
+  sub   r9, r9, r1\r
 \r
-  // r12 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
-  mov   r0, r12\r
+  // r9 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
+  mov   r0, r9\r
   mov   r1, r10\r
   //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
   LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
@@ -180,7 +180,7 @@ _GetStackBase:
 _PrepareArguments:\r
   mov   r0, r10\r
   mov   r1, r11\r
-  mov   r2, r12\r
+  mov   r2, r9\r
 \r
   // Move sec startup address into a data register\r
   // Ensure we're jumping to FV version of the code (not boot remapped alias)\r