2 // Copyright (c) 2011-2013, ARM Limited. All rights reserved.
3 // Copyright (c) 2015, Linaro Limited. All rights reserved.
5 // This program and the accompanying materials
6 // are licensed and made available under the terms and conditions of the BSD License
7 // which accompanies this distribution. The full text of the license may be found at
8 // http://opensource.org/licenses/bsd-license.php
10 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include <AsmMacroIoLib.h>
17 #include <Library/PcdLib.h>
23 GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
24 GCC_ASM_IMPORT(ArmReadMpidr)
25 GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
26 GCC_ASM_IMPORT(ArmPlatformStackSet)
27 GCC_ASM_EXPORT(_ModuleEntryPoint)
28 ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
30 StartupAddr: .long ASM_PFX(CEntryPoint)
31 ASM_PFX(mSystemMemoryEnd): .quad 0
34 .long __reloc_base - __relocs
35 .long __reloc_start - __relocs
36 .long __reloc_end - __relocs
38 ASM_PFX(_ModuleEntryPoint):
40 // We are built as a ET_DYN PIE executable, so we need to process all
41 // relative relocations if we are executing from a different offset than we
42 // were linked at. This is only possible if we are running from RAM.
58 // AArch32 uses the ELF32 REL format, which means each entry in the
59 // relocation table consists of
61 // UINT32 offset : the relative offset of the value that needs to
63 // UINT32 info : relocation type and symbol index (the latter is
64 // not used for R_ARM_RELATIVE relocations)
66 ldrd r8, r9, [r5], #8 // read offset into r8 and info into r9
67 cmp r9, #23 // check info == R_ARM_RELATIVE?
68 bne .Lreloc_loop // not a relative relocation? then skip
70 ldr r9, [r8, r4] // read addend into r9
71 add r9, r9, r1 // add image base to addend to get relocated value
72 str r9, [r8, r4] // write relocated value at offset
76 // Do early platform specific actions
77 bl ASM_PFX(ArmPlatformPeiBootAction)
79 // Get ID of this CPU in Multicore system
80 bl ASM_PFX(ArmReadMpidr)
81 // Keep a copy of the MpId register value
84 // Check if we can install the stack at the top of the System Memory or if we need
85 // to install the stacks at the bottom of the Firmware Device (case the FD is located
86 // at the top of the DRAM)
88 // Compute Top of System Memory
89 ldr r12, =PcdGet64 (PcdSystemMemoryBase)
91 ldr r12, =PcdGet64 (PcdSystemMemorySize)
94 // calculate the top of memory, and record it in mSystemMemoryEnd
98 adr r12, mSystemMemoryEnd
101 // truncate the memory used by UEFI to 4 GB range
106 // Calculate Top of the Firmware Device
107 ldr r12, =PcdGet64 (PcdFdBaseAddress)
109 ldr r3, =FixedPcdGet32 (PcdFdSize)
111 add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
113 // UEFI Memory Size (stacks are allocated in this region)
114 LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
117 // Reserve the memory for the UEFI region (contain stacks on its top)
120 // Calculate how much space there is between the top of the Firmware and the Top of the System Memory
121 subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
122 bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM
126 // Case the top of stacks is the FdBaseAddress
130 // r1 contains the top of the stack (and the UEFI Memory)
132 // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment
133 // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the
134 // top of the memory space)
136 bcs _SetupOverflowStack
143 // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
145 LoadConstantToReg (EFI_PAGE_MASK, r11)
150 // Calculate the Base of the UEFI Memory
154 // r1 = The top of the Mpcore Stacks
155 // Stack for the primary core = PrimaryCoreStack
156 LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
159 // Stack for the secondary core = Number of Cores - 1
160 LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
162 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
166 // r9 = The base of the MpCore Stacks (primary stack & secondary stacks)
169 //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
170 LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
171 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
172 bl ASM_PFX(ArmPlatformStackSet)
174 // Is it the Primary Core ?
176 bl ASM_PFX(ArmPlatformIsPrimaryCore)
178 bne _PrepareArguments
185 // Move sec startup address into a data register
186 // Ensure we're jumping to FV version of the code (not boot remapped alias)
189 // Jump to PrePiCore C code
191 // r1 = UefiMemoryBase