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1 | /** @file\r |
2 | *\r | |
3 | * Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r | |
4 | *\r | |
9792fb0e | 5 | * SPDX-License-Identifier: BSD-2-Clause-Patent\r |
f9a9d2dc AB |
6 | *\r |
7 | **/\r | |
8 | \r | |
9 | #include <PiPei.h>\r | |
0ae69a2e | 10 | #include <Pi/PiBootMode.h>\r |
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11 | \r |
12 | #include <Library/PrePiLib.h>\r | |
13 | #include <Library/PrintLib.h>\r | |
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14 | #include <Library/PrePiHobListPointerLib.h>\r |
15 | #include <Library/TimerLib.h>\r | |
16 | #include <Library/PerformanceLib.h>\r | |
c9e5618f | 17 | #include <Library/CacheMaintenanceLib.h>\r |
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18 | \r |
19 | #include <Ppi/GuidedSectionExtraction.h>\r | |
20 | #include <Ppi/ArmMpCoreInfo.h>\r | |
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21 | \r |
22 | #include "PrePi.h"\r | |
f9a9d2dc | 23 | \r |
af47c618 | 24 | VOID\r |
f9a9d2dc | 25 | EFIAPI\r |
af47c618 | 26 | ProcessLibraryConstructorList (\r |
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27 | VOID\r |
28 | );\r | |
29 | \r | |
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30 | VOID\r |
31 | PrePiMain (\r | |
32 | IN UINTN UefiMemoryBase,\r | |
33 | IN UINTN StacksBase,\r | |
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34 | IN UINT64 StartTimeStamp\r |
35 | )\r | |
36 | {\r | |
37 | EFI_HOB_HANDOFF_INFO_TABLE* HobList;\r | |
38 | EFI_STATUS Status;\r | |
39 | CHAR8 Buffer[100];\r | |
40 | UINTN CharCount;\r | |
41 | UINTN StacksSize;\r | |
42 | \r | |
43 | // Initialize the architecture specific bits\r | |
44 | ArchInitialize ();\r | |
45 | \r | |
f9a9d2dc AB |
46 | // Declare the PI/UEFI memory region\r |
47 | HobList = HobConstructor (\r | |
48 | (VOID*)UefiMemoryBase,\r | |
49 | FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r | |
50 | (VOID*)UefiMemoryBase,\r | |
51 | (VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks\r | |
52 | );\r | |
53 | PrePeiSetHobList (HobList);\r | |
54 | \r | |
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55 | //\r |
56 | // Ensure that the loaded image is invalidated in the caches, so that any\r | |
57 | // modifications we made with the caches and MMU off (such as the applied\r | |
58 | // relocations) don't become invisible once we turn them on.\r | |
59 | //\r | |
60 | InvalidateDataCacheRange((VOID *)(UINTN)PcdGet64 (PcdFdBaseAddress), PcdGet32 (PcdFdSize));\r | |
61 | \r | |
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62 | // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)\r |
63 | Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r | |
64 | ASSERT_EFI_ERROR (Status);\r | |
65 | \r | |
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66 | // Initialize the Serial Port\r |
67 | SerialPortInitialize ();\r | |
68 | CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",\r | |
69 | (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);\r | |
70 | SerialPortWrite ((UINT8 *) Buffer, CharCount);\r | |
71 | \r | |
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72 | // Create the Stacks HOB (reserve the memory for all stacks)\r |
73 | StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);\r | |
74 | BuildStackHob (StacksBase, StacksSize);\r | |
75 | \r | |
f9a9d2dc | 76 | //TODO: Call CpuPei as a library\r |
ff3c9780 | 77 | BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));\r |
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78 | \r |
79 | // Set the Boot Mode\r | |
0ae69a2e | 80 | SetBootMode (BOOT_WITH_FULL_CONFIGURATION);\r |
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81 | \r |
82 | // Initialize Platform HOBs (CpuHob and FvHob)\r | |
83 | Status = PlatformPeim ();\r | |
84 | ASSERT_EFI_ERROR (Status);\r | |
85 | \r | |
86 | // Now, the HOB List has been initialized, we can register performance information\r | |
87 | PERF_START (NULL, "PEI", NULL, StartTimeStamp);\r | |
88 | \r | |
89 | // SEC phase needs to run library constructors by hand.\r | |
af47c618 | 90 | ProcessLibraryConstructorList ();\r |
f9a9d2dc | 91 | \r |
f9a9d2dc AB |
92 | // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r |
93 | Status = DecompressFirstFv ();\r | |
94 | ASSERT_EFI_ERROR (Status);\r | |
95 | \r | |
96 | // Load the DXE Core and transfer control to it\r | |
97 | Status = LoadDxeCoreFromFv (NULL, 0);\r | |
98 | ASSERT_EFI_ERROR (Status);\r | |
99 | }\r | |
100 | \r | |
101 | VOID\r | |
102 | CEntryPoint (\r | |
103 | IN UINTN MpId,\r | |
104 | IN UINTN UefiMemoryBase,\r | |
5eeba3b7 | 105 | IN UINTN StacksBase\r |
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106 | )\r |
107 | {\r | |
108 | UINT64 StartTimeStamp;\r | |
109 | \r | |
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110 | if (PerformanceMeasurementEnabled ()) {\r |
111 | // Initialize the Timer Library to setup the Timer HW controller\r | |
112 | TimerConstructor ();\r | |
113 | // We cannot call yet the PerformanceLib because the HOB List has not been initialized\r | |
114 | StartTimeStamp = GetPerformanceCounter ();\r | |
115 | } else {\r | |
116 | StartTimeStamp = 0;\r | |
117 | }\r | |
118 | \r | |
119 | // Data Cache enabled on Primary core when MMU is enabled.\r | |
120 | ArmDisableDataCache ();\r | |
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121 | // Invalidate instruction cache\r |
122 | ArmInvalidateInstructionCache ();\r | |
123 | // Enable Instruction Caches on all cores.\r | |
124 | ArmEnableInstructionCache ();\r | |
125 | \r | |
5eeba3b7 | 126 | PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);\r |
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127 | \r |
128 | // DXE Core should always load and never return\r | |
129 | ASSERT (FALSE);\r | |
130 | }\r |