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1//\r
2// Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
3//\r
4// This program and the accompanying materials\r
5// are licensed and made available under the terms and conditions of the BSD License\r
6// which accompanies this distribution. The full text of the license may be found at\r
7// http://opensource.org/licenses/bsd-license.php\r
8//\r
9// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
11//\r
12//\r
13\r
14#include <AutoGen.h>\r
15#include <Chipset/ArmV7.h>\r
16\r
17 INCLUDE AsmMacroIoLib.inc\r
18\r
19 IMPORT CEntryPoint\r
20 IMPORT ArmPlatformIsPrimaryCore\r
21 IMPORT ArmReadMpidr\r
22 IMPORT ArmPlatformPeiBootAction\r
23 IMPORT ArmPlatformStackSet\r
24 IMPORT mSystemMemoryEnd\r
25\r
26 EXPORT _ModuleEntryPoint\r
27\r
28 PRESERVE8\r
29 AREA PrePiCoreEntryPoint, CODE, READONLY\r
30\r
31StartupAddr DCD CEntryPoint\r
32\r
33_ModuleEntryPoint\r
34 // Do early platform specific actions\r
35 bl ArmPlatformPeiBootAction\r
36\r
37 // Get ID of this CPU in Multicore system\r
38 bl ArmReadMpidr\r
39 // Keep a copy of the MpId register value\r
40 mov r8, r0\r
41\r
42_SetSVCMode\r
43 // Enter SVC mode, Disable FIQ and IRQ\r
44 mov r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ)\r
45 msr CPSR_c, r1\r
46\r
47// Check if we can install the stack at the top of the System Memory or if we need\r
48// to install the stacks at the bottom of the Firmware Device (case the FD is located\r
49// at the top of the DRAM)\r
50_SystemMemoryEndInit\r
51 adrll r1, mSystemMemoryEnd\r
52 ldrd r2, r3, [r1]\r
53 teq r3, #0\r
54 moveq r1, r2\r
55 mvnne r1, #0\r
56\r
57_SetupStackPosition\r
58 // r1 = SystemMemoryTop\r
59\r
60 // Calculate Top of the Firmware Device\r
61 mov32 r2, FixedPcdGet32(PcdFdBaseAddress)\r
62 mov32 r3, FixedPcdGet32(PcdFdSize)\r
63 sub r3, r3, #1\r
64 add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
65\r
66 // UEFI Memory Size (stacks are allocated in this region)\r
67 mov32 r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize)\r
68\r
69 //\r
70 // Reserve the memory for the UEFI region (contain stacks on its top)\r
71 //\r
72\r
73 // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r
74 subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r
75 bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r
76 cmp r0, r4\r
77 bge _SetupStack\r
78\r
79 // Case the top of stacks is the FdBaseAddress\r
80 mov r1, r2\r
81\r
82_SetupStack\r
83 // r1 contains the top of the stack (and the UEFI Memory)\r
84\r
85 // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
86 // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
87 // top of the memory space)\r
88 adds r9, r1, #1\r
89 bcs _SetupOverflowStack\r
90\r
91_SetupAlignedStack\r
92 mov r1, r9\r
93 b _GetBaseUefiMemory\r
94\r
95_SetupOverflowStack\r
96 // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
97 // aligned (4KB)\r
98 mov32 r9, EFI_PAGE_MASK\r
99 and r9, r9, r1\r
100 sub r1, r1, r9\r
101\r
102_GetBaseUefiMemory\r
103 // Calculate the Base of the UEFI Memory\r
104 sub r9, r1, r4\r
105\r
106_GetStackBase\r
107 // r1 = The top of the Mpcore Stacks\r
108 // Stack for the primary core = PrimaryCoreStack\r
109 mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r
110 sub r10, r1, r2\r
111\r
112 // Stack for the secondary core = Number of Cores - 1\r
113 mov32 r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r
114 sub r10, r10, r1\r
115\r
116 // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
117 mov r0, r10\r
118 mov r1, r8\r
119 //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
120 mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r
121 mov32 r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r
122 bl ArmPlatformStackSet\r
123\r
124 // Is it the Primary Core ?\r
125 mov r0, r8\r
126 bl ArmPlatformIsPrimaryCore\r
127 cmp r0, #1\r
128 bne _PrepareArguments\r
129\r
130_PrepareArguments\r
131 mov r0, r8\r
132 mov r1, r9\r
133 mov r2, r10\r
134\r
135 // Move sec startup address into a data register\r
136 // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
137 ldr r4, StartupAddr\r
138\r
139 // Jump to PrePiCore C code\r
140 // r0 = MpId\r
141 // r1 = UefiMemoryBase\r
142 // r2 = StacksBase\r
143 blx r4\r
144\r
145_NeverReturn\r
146 b _NeverReturn\r
147\r
148 END\r