]>
Commit | Line | Data |
---|---|---|
917c5627 AB |
1 | /** @file\r |
2 | *\r | |
3 | * Copyright (c) 2011-2017, ARM Limited. All rights reserved.\r | |
4 | * Copyright (c) 2017, Linaro, Ltd. All rights reserved.\r | |
5 | *\r | |
6 | * This program and the accompanying materials\r | |
7 | * are licensed and made available under the terms and conditions of the BSD License\r | |
8 | * which accompanies this distribution. The full text of the license may be found at\r | |
9 | * http://opensource.org/licenses/bsd-license.php\r | |
10 | *\r | |
11 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | *\r | |
14 | **/\r | |
15 | \r | |
16 | #include <PiPei.h>\r | |
17 | \r | |
18 | #include <Library/DebugAgentLib.h>\r | |
19 | #include <Library/PrePiLib.h>\r | |
20 | #include <Library/PrintLib.h>\r | |
21 | #include <Library/PeCoffGetEntryPointLib.h>\r | |
22 | #include <Library/PrePiHobListPointerLib.h>\r | |
23 | #include <Library/TimerLib.h>\r | |
24 | #include <Library/PerformanceLib.h>\r | |
25 | \r | |
26 | #include <Ppi/GuidedSectionExtraction.h>\r | |
27 | #include <Ppi/ArmMpCoreInfo.h>\r | |
28 | #include <Ppi/SecPerformance.h>\r | |
29 | #include <Guid/LzmaDecompress.h>\r | |
30 | \r | |
31 | #include "PrePi.h"\r | |
32 | #include "LzmaDecompress.h"\r | |
33 | \r | |
34 | #define IS_XIP() (((UINT64)FixedPcdGet64 (PcdFdBaseAddress) > mSystemMemoryEnd) || \\r | |
35 | ((FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet64 (PcdSystemMemoryBase)))\r | |
36 | \r | |
37 | UINT64 mSystemMemoryEnd = FixedPcdGet64(PcdSystemMemoryBase) +\r | |
38 | FixedPcdGet64(PcdSystemMemorySize) - 1;\r | |
39 | \r | |
40 | EFI_STATUS\r | |
41 | GetPlatformPpi (\r | |
42 | IN EFI_GUID *PpiGuid,\r | |
43 | OUT VOID **Ppi\r | |
44 | )\r | |
45 | {\r | |
46 | UINTN PpiListSize;\r | |
47 | UINTN PpiListCount;\r | |
48 | EFI_PEI_PPI_DESCRIPTOR *PpiList;\r | |
49 | UINTN Index;\r | |
50 | \r | |
51 | PpiListSize = 0;\r | |
52 | ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);\r | |
53 | PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);\r | |
54 | for (Index = 0; Index < PpiListCount; Index++, PpiList++) {\r | |
55 | if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {\r | |
56 | *Ppi = PpiList->Ppi;\r | |
57 | return EFI_SUCCESS;\r | |
58 | }\r | |
59 | }\r | |
60 | \r | |
61 | return EFI_NOT_FOUND;\r | |
62 | }\r | |
63 | \r | |
64 | VOID\r | |
65 | PrePiMain (\r | |
66 | IN UINTN UefiMemoryBase,\r | |
67 | IN UINTN StacksBase,\r | |
68 | IN UINT64 StartTimeStamp\r | |
69 | )\r | |
70 | {\r | |
71 | EFI_HOB_HANDOFF_INFO_TABLE* HobList;\r | |
72 | EFI_STATUS Status;\r | |
73 | CHAR8 Buffer[100];\r | |
74 | UINTN CharCount;\r | |
75 | UINTN StacksSize;\r | |
76 | FIRMWARE_SEC_PERFORMANCE Performance;\r | |
77 | \r | |
78 | // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)\r | |
79 | ASSERT (IS_XIP() ||\r | |
80 | ((FixedPcdGet64 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&\r | |
81 | ((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd)));\r | |
82 | \r | |
83 | // Initialize the architecture specific bits\r | |
84 | ArchInitialize ();\r | |
85 | \r | |
86 | // Initialize the Serial Port\r | |
87 | SerialPortInitialize ();\r | |
88 | CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",\r | |
89 | (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);\r | |
90 | SerialPortWrite ((UINT8 *) Buffer, CharCount);\r | |
91 | \r | |
92 | // Initialize the Debug Agent for Source Level Debugging\r | |
93 | InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r | |
94 | SaveAndSetDebugTimerInterrupt (TRUE);\r | |
95 | \r | |
96 | // Declare the PI/UEFI memory region\r | |
97 | HobList = HobConstructor (\r | |
98 | (VOID*)UefiMemoryBase,\r | |
99 | FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r | |
100 | (VOID*)UefiMemoryBase,\r | |
101 | (VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks\r | |
102 | );\r | |
103 | PrePeiSetHobList (HobList);\r | |
104 | \r | |
105 | // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)\r | |
106 | Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r | |
107 | ASSERT_EFI_ERROR (Status);\r | |
108 | \r | |
109 | StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);\r | |
110 | BuildStackHob (StacksBase, StacksSize);\r | |
111 | \r | |
112 | //TODO: Call CpuPei as a library\r | |
113 | BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));\r | |
114 | \r | |
115 | // Store timer value logged at the beginning of firmware image execution\r | |
116 | Performance.ResetEnd = GetTimeInNanoSecond (StartTimeStamp);\r | |
117 | \r | |
118 | // Build SEC Performance Data Hob\r | |
119 | BuildGuidDataHob (&gEfiFirmwarePerformanceGuid, &Performance, sizeof (Performance));\r | |
120 | \r | |
121 | // Set the Boot Mode\r | |
122 | SetBootMode (ArmPlatformGetBootMode ());\r | |
123 | \r | |
124 | // Initialize Platform HOBs (CpuHob and FvHob)\r | |
125 | Status = PlatformPeim ();\r | |
126 | ASSERT_EFI_ERROR (Status);\r | |
127 | \r | |
128 | // Now, the HOB List has been initialized, we can register performance information\r | |
129 | PERF_START (NULL, "PEI", NULL, StartTimeStamp);\r | |
130 | \r | |
131 | // SEC phase needs to run library constructors by hand.\r | |
132 | ProcessLibraryConstructorList ();\r | |
133 | \r | |
134 | // Build HOBs to pass up our version of stuff the DXE Core needs to save space\r | |
135 | BuildPeCoffLoaderHob ();\r | |
136 | BuildExtractSectionHob (\r | |
137 | &gLzmaCustomDecompressGuid,\r | |
138 | LzmaGuidedSectionGetInfo,\r | |
139 | LzmaGuidedSectionExtraction\r | |
140 | );\r | |
141 | \r | |
142 | // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r | |
143 | Status = DecompressFirstFv ();\r | |
144 | ASSERT_EFI_ERROR (Status);\r | |
145 | \r | |
146 | // Load the DXE Core and transfer control to it\r | |
147 | Status = LoadDxeCoreFromFv (NULL, 0);\r | |
148 | ASSERT_EFI_ERROR (Status);\r | |
149 | }\r | |
150 | \r | |
151 | VOID\r | |
152 | CEntryPoint (\r | |
153 | IN UINTN MpId,\r | |
154 | IN UINTN UefiMemoryBase,\r | |
155 | IN UINTN StacksBase\r | |
156 | )\r | |
157 | {\r | |
158 | UINT64 StartTimeStamp;\r | |
159 | \r | |
160 | // Initialize the platform specific controllers\r | |
161 | ArmPlatformInitialize (MpId);\r | |
162 | \r | |
163 | if (PerformanceMeasurementEnabled ()) {\r | |
164 | // Initialize the Timer Library to setup the Timer HW controller\r | |
165 | TimerConstructor ();\r | |
166 | // We cannot call yet the PerformanceLib because the HOB List has not been initialized\r | |
167 | StartTimeStamp = GetPerformanceCounter ();\r | |
168 | } else {\r | |
169 | StartTimeStamp = 0;\r | |
170 | }\r | |
171 | \r | |
172 | // Data Cache enabled on Primary core when MMU is enabled.\r | |
173 | ArmDisableDataCache ();\r | |
174 | // Invalidate Data cache\r | |
175 | ArmInvalidateDataCache ();\r | |
176 | // Invalidate instruction cache\r | |
177 | ArmInvalidateInstructionCache ();\r | |
178 | // Enable Instruction Caches on all cores.\r | |
179 | ArmEnableInstructionCache ();\r | |
180 | \r | |
181 | PrimaryMain (UefiMemoryBase, StacksBase, StartTimeStamp);\r | |
182 | \r | |
183 | // DXE Core should always load and never return\r | |
184 | ASSERT (FALSE);\r | |
185 | }\r |