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2ef2b01e A |
1 | /** @file\r |
2 | C Entry point for the SEC. First C code after the reset vector.\r | |
3 | \r | |
4 | Copyright (c) 2008-2009, Apple Inc. All rights reserved.\r | |
5 | \r | |
6 | All rights reserved. This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #include <PiPei.h>\r | |
17 | \r | |
18 | #include <Library/DebugLib.h>\r | |
19 | #include <Library/PrePiLib.h>\r | |
20 | #include <Library/PcdLib.h>\r | |
21 | #include <Library/IoLib.h>\r | |
22 | #include <Library/OmapLib.h>\r | |
23 | #include <Library/ArmLib.h>\r | |
225290eb | 24 | #include <Library/PeCoffGetEntryPointLib.h>\r |
2ef2b01e A |
25 | \r |
26 | #include <Ppi/GuidedSectionExtraction.h>\r | |
ca3ad58b | 27 | #include <Guid/LzmaDecompress.h>\r |
2ef2b01e A |
28 | #include <Omap3530/Omap3530.h>\r |
29 | \r | |
ca3ad58b | 30 | #include "LzmaDecompress.h"\r |
31 | \r | |
225290eb A |
32 | VOID\r |
33 | EFIAPI \r | |
34 | _ModuleEntryPoint(\r | |
35 | VOID\r | |
36 | );\r | |
37 | \r | |
38 | CHAR8 *\r | |
39 | DeCygwinPathIfNeeded (\r | |
40 | IN CHAR8 *Name\r | |
41 | );\r | |
42 | \r | |
2ef2b01e A |
43 | VOID\r |
44 | PadConfiguration (\r | |
45 | VOID\r | |
46 | );\r | |
47 | \r | |
48 | VOID\r | |
49 | ClockInit (\r | |
50 | VOID\r | |
51 | );\r | |
52 | \r | |
53 | VOID\r | |
54 | TimerInit (\r | |
55 | VOID\r | |
56 | )\r | |
57 | {\r | |
58 | UINTN Timer = FixedPcdGet32(PcdBeagleFreeTimer);\r | |
59 | UINT32 TimerBaseAddress = TimerBase(Timer);\r | |
60 | \r | |
61 | // Set source clock for GPT3 & GPT4 to SYS_CLK\r | |
62 | MmioOr32(CM_CLKSEL_PER, CM_CLKSEL_PER_CLKSEL_GPT3_SYS \r | |
63 | | CM_CLKSEL_PER_CLKSEL_GPT4_SYS);\r | |
64 | \r | |
65 | // Set count & reload registers\r | |
026e30c4 | 66 | MmioWrite32 (TimerBaseAddress + GPTIMER_TCRR, 0x00000000);\r |
67 | MmioWrite32 (TimerBaseAddress + GPTIMER_TLDR, 0x00000000);\r | |
2ef2b01e A |
68 | \r |
69 | // Disable interrupts\r | |
026e30c4 | 70 | MmioWrite32 (TimerBaseAddress + GPTIMER_TIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_DISABLE | TIER_MAT_IT_DISABLE);\r |
2ef2b01e A |
71 | \r |
72 | // Start Timer\r | |
026e30c4 | 73 | MmioWrite32 (TimerBaseAddress + GPTIMER_TCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);\r |
2ef2b01e A |
74 | \r |
75 | //Disable OMAP Watchdog timer (WDT2)\r | |
026e30c4 | 76 | MmioWrite32 (WDTIMER2_BASE + WSPR, 0xAAAA);\r |
2ef2b01e | 77 | DEBUG ((EFI_D_ERROR, "Magic delay to disable watchdog timers properly.\n"));\r |
026e30c4 | 78 | MmioWrite32 (WDTIMER2_BASE + WSPR, 0x5555);\r |
2ef2b01e A |
79 | }\r |
80 | \r | |
81 | VOID\r | |
82 | UartInit (\r | |
83 | VOID\r | |
84 | )\r | |
85 | {\r | |
86 | UINTN Uart = FixedPcdGet32(PcdBeagleConsoleUart);\r | |
87 | UINT32 UartBaseAddress = UartBase(Uart);\r | |
88 | \r | |
89 | // Set MODE_SELECT=DISABLE before trying to initialize or modify DLL, DLH registers.\r | |
026e30c4 | 90 | MmioWrite32 (UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_DISABLE);\r |
2ef2b01e A |
91 | \r |
92 | // Put device in configuration mode.\r | |
026e30c4 | 93 | MmioWrite32 (UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_ENABLE);\r |
2ef2b01e A |
94 | \r |
95 | // Programmable divisor N = 48Mhz/16/115200 = 26\r | |
026e30c4 | 96 | MmioWrite32 (UartBaseAddress + UART_DLL_REG, 3000000/FixedPcdGet64 (PcdUartDefaultBaudRate)); // low divisor\r |
97 | MmioWrite32 (UartBaseAddress + UART_DLH_REG, 0); // high divisor\r | |
2ef2b01e A |
98 | \r |
99 | // Enter into UART operational mode.\r | |
026e30c4 | 100 | MmioWrite32 (UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_DISABLE | UART_LCR_CHAR_LENGTH_8);\r |
2ef2b01e A |
101 | \r |
102 | // Force DTR and RTS output to active\r | |
026e30c4 | 103 | MmioWrite32 (UartBaseAddress + UART_MCR_REG, UART_MCR_RTS_FORCE_ACTIVE | UART_MCR_DTR_FORCE_ACTIVE);\r |
2ef2b01e A |
104 | \r |
105 | // Clear & enable fifos\r | |
026e30c4 | 106 | MmioWrite32 (UartBaseAddress + UART_FCR_REG, UART_FCR_TX_FIFO_CLEAR | UART_FCR_RX_FIFO_CLEAR | UART_FCR_FIFO_ENABLE); \r |
2ef2b01e A |
107 | \r |
108 | // Restore MODE_SELECT \r | |
026e30c4 | 109 | MmioWrite32 (UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_UART_16X);\r |
2ef2b01e A |
110 | }\r |
111 | \r | |
112 | VOID\r | |
113 | InitCache (\r | |
114 | IN UINT32 MemoryBase,\r | |
115 | IN UINT32 MemoryLength\r | |
116 | );\r | |
117 | \r | |
118 | EFI_STATUS\r | |
119 | EFIAPI\r | |
120 | ExtractGuidedSectionLibConstructor (\r | |
121 | VOID\r | |
122 | );\r | |
123 | \r | |
124 | EFI_STATUS\r | |
125 | EFIAPI\r | |
126 | LzmaDecompressLibConstructor (\r | |
127 | VOID\r | |
128 | );\r | |
129 | \r | |
225290eb A |
130 | /**\r |
131 | If the build is done on cygwin the paths are cygpaths. \r | |
132 | /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert\r | |
133 | them to work with RVD commands\r | |
134 | \r | |
135 | This is just code to help print out RVD symbol load command.\r | |
136 | If you build with cygwin paths aren't compatible with RVD.\r | |
137 | \r | |
138 | @param Name Path to convert if needed\r | |
139 | \r | |
140 | **/\r | |
141 | CHAR8 *\r | |
142 | SecDeCygwinPathIfNeeded (\r | |
143 | IN CHAR8 *Name\r | |
144 | )\r | |
145 | {\r | |
146 | CHAR8 *Ptr;\r | |
147 | UINTN Index;\r | |
148 | UINTN Len;\r | |
149 | \r | |
150 | Ptr = AsciiStrStr (Name, "/cygdrive/");\r | |
151 | if (Ptr == NULL) {\r | |
152 | return Name;\r | |
153 | }\r | |
154 | \r | |
155 | Len = AsciiStrLen (Ptr);\r | |
156 | \r | |
157 | // convert "/cygdrive" to spaces\r | |
158 | for (Index = 0; Index < 9; Index++) {\r | |
159 | Ptr[Index] = ' ';\r | |
160 | }\r | |
161 | \r | |
162 | // convert /c to c:\r | |
163 | Ptr[9] = Ptr[10];\r | |
164 | Ptr[10] = ':';\r | |
165 | \r | |
166 | // switch path seperators\r | |
167 | for (Index = 11; Index < Len; Index++) {\r | |
168 | if (Ptr[Index] == '/') {\r | |
169 | Ptr[Index] = '\\' ;\r | |
170 | }\r | |
171 | }\r | |
172 | \r | |
173 | return Name;\r | |
174 | }\r | |
175 | \r | |
176 | \r | |
2ef2b01e A |
177 | VOID\r |
178 | CEntryPoint (\r | |
179 | IN VOID *MemoryBase,\r | |
180 | IN UINTN MemorySize,\r | |
181 | IN VOID *StackBase,\r | |
182 | IN UINTN StackSize\r | |
183 | )\r | |
184 | {\r | |
185 | VOID *HobBase;\r | |
186 | \r | |
14e00c13 | 187 | // Build a basic HOB list\r |
188 | HobBase = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));\r | |
189 | CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);\r | |
190 | \r | |
2ef2b01e | 191 | //Set up Pin muxing.\r |
026e30c4 | 192 | PadConfiguration ();\r |
2ef2b01e A |
193 | \r |
194 | // Set up system clocking\r | |
026e30c4 | 195 | ClockInit ();\r |
2ef2b01e | 196 | \r |
2ef2b01e A |
197 | \r |
198 | // Enable program flow prediction, if supported.\r | |
026e30c4 | 199 | ArmEnableBranchPrediction ();\r |
2ef2b01e A |
200 | \r |
201 | // Initialize CPU cache\r | |
026e30c4 | 202 | InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);\r |
2ef2b01e A |
203 | \r |
204 | // Add memory allocation hob for relocated FD\r | |
026e30c4 | 205 | BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);\r |
2ef2b01e A |
206 | \r |
207 | // Add the FVs to the hob list\r | |
026e30c4 | 208 | BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));\r |
2ef2b01e A |
209 | \r |
210 | // Start talking\r | |
026e30c4 | 211 | UartInit ();\r |
212 | DEBUG ((EFI_D_ERROR, "UART Enabled\n"));\r | |
225290eb A |
213 | \r |
214 | DEBUG_CODE_BEGIN ();\r | |
215 | //\r | |
216 | // On a debug build print out information about the SEC. This is really info about\r | |
217 | // the PE/COFF file we are currently running from. Useful for loading symbols in a\r | |
218 | // debugger. Remember our image is really part of the FV.\r | |
219 | //\r | |
220 | RETURN_STATUS Status;\r | |
221 | EFI_PEI_FV_HANDLE VolumeHandle;\r | |
222 | EFI_PEI_FILE_HANDLE FileHandle;\r | |
223 | VOID *PeCoffImage;\r | |
224 | UINT32 Offset;\r | |
225 | CHAR8 *FilePath;\r | |
14e00c13 | 226 | FfsAnyFvFindFirstFile (EFI_FV_FILETYPE_SECURITY_CORE, &VolumeHandle, &FileHandle);\r |
227 | Status = FfsFindSectionData (EFI_SECTION_TE, FileHandle, &PeCoffImage);\r | |
228 | if (EFI_ERROR (Status)) {\r | |
229 | // Usually is a TE (PI striped down PE/COFF), but could be a full PE/COFF\r | |
230 | Status = FfsFindSectionData (EFI_SECTION_PE32, FileHandle, &PeCoffImage);\r | |
231 | }\r | |
232 | if (!EFI_ERROR (Status)) {\r | |
225290eb | 233 | Offset = PeCoffGetSizeOfHeaders (PeCoffImage);\r |
14e00c13 | 234 | FilePath = PeCoffLoaderGetPdbPointer (PeCoffImage);\r |
235 | if (FilePath != NULL) {\r | |
236 | \r | |
237 | // \r | |
238 | // In general you should never have to use #ifdef __CC_ARM in the code. It\r | |
239 | // is hidden in the away in the MdePkg. But here we would like to print differnt things\r | |
240 | // for different toolchains. \r | |
241 | //\r | |
242 | #ifdef __CC_ARM\r | |
243 | // Print out the command for the RVD debugger to load symbols for this image\r | |
244 | DEBUG ((EFI_D_ERROR, "load /a /ni /np %a &0x%08x\n", SecDeCygwinPathIfNeeded (FilePath), (CHAR8 *)PeCoffImage + Offset));\r | |
225290eb | 245 | #elif __GNUC__\r |
14e00c13 | 246 | // This may not work correctly if you generate PE/COFF directlyas then the Offset would not be required\r |
247 | DEBUG ((EFI_D_ERROR, "add-symbol-file %a 0x%08x\n", FilePath, PeCoffImage + Offset));\r | |
225290eb | 248 | #else\r |
14e00c13 | 249 | DEBUG ((EFI_D_ERROR, "SEC starts at 0x%08x with an entry point at 0x%08x %a\n", PeCoffImage, _ModuleEntryPoint, FilePath));\r |
225290eb A |
250 | #endif\r |
251 | }\r | |
14e00c13 | 252 | }\r |
253 | \r | |
026e30c4 | 254 | \r |
255 | DEBUG_CODE_END ();\r | |
225290eb A |
256 | \r |
257 | \r | |
2ef2b01e A |
258 | \r |
259 | // Start up a free running time so that the timer lib will work\r | |
026e30c4 | 260 | TimerInit ();\r |
2ef2b01e A |
261 | \r |
262 | // SEC phase needs to run library constructors by hand.\r | |
026e30c4 | 263 | ExtractGuidedSectionLibConstructor ();\r |
264 | LzmaDecompressLibConstructor ();\r | |
2ef2b01e | 265 | \r |
ca3ad58b | 266 | // Build HOBs to pass up our version of stuff the DXE Core needs to save space\r |
ca3ad58b | 267 | BuildPeCoffLoaderHob ();\r |
268 | BuildExtractSectionHob (\r | |
269 | &gLzmaCustomDecompressGuid,\r | |
270 | LzmaGuidedSectionGetInfo,\r | |
271 | LzmaGuidedSectionExtraction\r | |
272 | );\r | |
ca3ad58b | 273 | \r |
14e00c13 | 274 | // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r |
8c3f387b | 275 | DecompressFirstFv ();\r |
276 | \r | |
2ef2b01e | 277 | // Load the DXE Core and transfer control to it\r |
026e30c4 | 278 | LoadDxeCoreFromFv (NULL, 0);\r |
2ef2b01e A |
279 | \r |
280 | // DXE Core should always load and never return\r | |
026e30c4 | 281 | ASSERT (FALSE);\r |
2ef2b01e A |
282 | }\r |
283 | \r |