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3dbba770 | 1 | /** @file\r |
8e8227d1 | 2 | Internal library declaration for PCI Bus module.\r |
ead42efc | 3 | \r |
8e8227d1 | 4 | Copyright (c) 2006 - 2009, Intel Corporation\r |
ead42efc | 5 | All rights reserved. This program and the accompanying materials\r |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
3dbba770 | 13 | **/\r |
ead42efc | 14 | \r |
eeefcb9d | 15 | #ifndef _EFI_PCI_LIB_H_\r |
16 | #define _EFI_PCI_LIB_H_\r | |
ead42efc | 17 | \r |
ead42efc | 18 | \r |
a43264f4 | 19 | typedef struct {\r |
20 | EFI_HANDLE Handle;\r | |
21 | } EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;\r | |
22 | \r | |
23 | typedef struct {\r | |
24 | UINT32 Bar;\r | |
25 | UINT16 DevicePathSize;\r | |
26 | UINT16 ReqResSize;\r | |
27 | UINT16 AllocResSize;\r | |
28 | UINT8 *DevicePath;\r | |
29 | UINT8 *ReqRes;\r | |
30 | UINT8 *AllocRes;\r | |
31 | } EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;\r | |
32 | \r | |
ead42efc | 33 | \r |
57076f45 | 34 | /**\r |
8e8227d1 | 35 | Retrieve the PCI Card device BAR information via PciIo interface.\r |
36 | \r | |
37 | @param PciIoDevice PCI Card device instance.\r | |
38 | \r | |
57076f45 | 39 | **/\r |
ead42efc | 40 | VOID\r |
41 | GetBackPcCardBar (\r | |
42 | IN PCI_IO_DEVICE *PciIoDevice\r | |
ed66e1bc | 43 | );\r |
ead42efc | 44 | \r |
57076f45 | 45 | /**\r |
46 | Remove rejected pci device from specific root bridge\r | |
47 | handle.\r | |
8e8227d1 | 48 | \r |
49 | @param RootBridgeHandle Specific parent root bridge handle.\r | |
eeefcb9d | 50 | @param Bridge Bridge device instance.\r |
8e8227d1 | 51 | \r |
57076f45 | 52 | **/\r |
8e8227d1 | 53 | VOID\r |
ead42efc | 54 | RemoveRejectedPciDevices (\r |
8e8227d1 | 55 | IN EFI_HANDLE RootBridgeHandle,\r |
56 | IN PCI_IO_DEVICE *Bridge\r | |
ed66e1bc | 57 | );\r |
ead42efc | 58 | \r |
57076f45 | 59 | /**\r |
8e8227d1 | 60 | Submits the I/O and memory resource requirements for the specified PCI Host Bridge.\r |
61 | \r | |
62 | @param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r | |
63 | \r | |
64 | @retval EFI_SUCCESS Successfully finished resource allocation.\r | |
65 | @retval EFI_NOT_FOUND Cannot get root bridge instance.\r | |
66 | @retval EFI_OUT_OF_RESOURCES Platform failed to program the resources if no hot plug supported.\r | |
67 | @retval other Some error occurred when allocating resources for the PCI Host Bridge.\r | |
68 | \r | |
69 | @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.\r | |
70 | \r | |
57076f45 | 71 | **/\r |
ead42efc | 72 | EFI_STATUS\r |
73 | PciHostBridgeResourceAllocator (\r | |
74 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r | |
ed66e1bc | 75 | );\r |
ead42efc | 76 | \r |
eeefcb9d | 77 | /**\r |
8e8227d1 | 78 | Scan pci bus and assign bus number to the given PCI bus system.\r |
ead42efc | 79 | \r |
8e8227d1 | 80 | @param Bridge Bridge device instance.\r |
81 | @param StartBusNumber start point.\r | |
82 | @param SubBusNumber Point to sub bus number.\r | |
83 | @param PaddedBusRange Customized bus number.\r | |
84 | \r | |
85 | @retval EFI_SUCCESS Successfully scanned and assigned bus number.\r | |
86 | @retval other Some error occurred when scanning pci bus.\r | |
87 | \r | |
88 | @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.\r | |
ead42efc | 89 | \r |
57076f45 | 90 | **/\r |
ead42efc | 91 | EFI_STATUS\r |
92 | PciScanBus (\r | |
93 | IN PCI_IO_DEVICE *Bridge,\r | |
94 | IN UINT8 StartBusNumber,\r | |
95 | OUT UINT8 *SubBusNumber,\r | |
96 | OUT UINT8 *PaddedBusRange\r | |
ed66e1bc | 97 | );\r |
ead42efc | 98 | \r |
eeefcb9d | 99 | /**\r |
8e8227d1 | 100 | Process Option Rom on the specified root bridge.\r |
ead42efc | 101 | \r |
8e8227d1 | 102 | @param Bridge Pci root bridge device instance.\r |
103 | \r | |
104 | @retval EFI_SUCCESS Success process.\r | |
105 | @retval other Some error occurred when processing Option Rom on the root bridge.\r | |
ead42efc | 106 | \r |
57076f45 | 107 | **/\r |
ead42efc | 108 | EFI_STATUS\r |
109 | PciRootBridgeP2CProcess (\r | |
110 | IN PCI_IO_DEVICE *Bridge\r | |
ed66e1bc | 111 | );\r |
ead42efc | 112 | \r |
57076f45 | 113 | /**\r |
8e8227d1 | 114 | Process Option Rom on the specified host bridge.\r |
115 | \r | |
116 | @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r | |
117 | \r | |
eeefcb9d | 118 | @retval EFI_SUCCESS Success process.\r |
8e8227d1 | 119 | @retval EFI_NOT_FOUND Can not find the root bridge instance.\r |
120 | @retval other Some error occurred when processing Option Rom on the host bridge.\r | |
121 | \r | |
57076f45 | 122 | **/\r |
ead42efc | 123 | EFI_STATUS\r |
124 | PciHostBridgeP2CProcess (\r | |
125 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r | |
ed66e1bc | 126 | );\r |
ead42efc | 127 | \r |
57076f45 | 128 | /**\r |
129 | This function is used to enumerate the entire host bridge\r | |
eeefcb9d | 130 | in a given platform.\r |
ead42efc | 131 | \r |
8e8227d1 | 132 | @param PciResAlloc A pointer to the PCI Host Resource Allocation protocol.\r |
ead42efc | 133 | \r |
8e8227d1 | 134 | @retval EFI_SUCCESS Successfully enumerated the host bridge.\r |
135 | @retval EFI_OUT_OF_RESOURCES No enough memory available.\r | |
136 | @retval other Some error occurred when enumerating the host bridge.\r | |
ead42efc | 137 | \r |
bcd70414 | 138 | **/\r |
ead42efc | 139 | EFI_STATUS\r |
140 | PciHostBridgeEnumerator (\r | |
9eb130ff | 141 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r |
ead42efc | 142 | );\r |
ae358cb2 | 143 | \r |
ead42efc | 144 | #endif\r |