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79964ac8 | 1 | /** @file\r |
9f6f9534 | 2 | Include file for definitions in the Intel Platform Innovation Framework for EFI\r |
d5e821ad | 3 | System Management Mode Core Interface Specification (SMM CIS) version 0.91.\r |
79964ac8 | 4 | \r |
2b3687db | 5 | Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r |
f22f941e | 6 | This program and the accompanying materials are licensed and made available under \r |
7 | the terms and conditions of the BSD License that accompanies this distribution. \r | |
8 | The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php. \r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
79964ac8 | 13 | \r |
79964ac8 | 14 | **/\r |
15 | \r | |
108854b2 LG |
16 | #ifndef _SMM_CIS_H_\r |
17 | #define _SMM_CIS_H_\r | |
79964ac8 | 18 | \r |
a2bb197e | 19 | //\r |
20 | // Share some common definitions with PI SMM\r | |
21 | //\r | |
22 | #include <Pi/PiSmmCis.h>\r | |
23 | #include <Protocol/SmmCpuIo.h>\r | |
24 | \r | |
79964ac8 | 25 | typedef struct _EFI_SMM_SYSTEM_TABLE EFI_SMM_SYSTEM_TABLE;\r |
79964ac8 | 26 | \r |
79964ac8 | 27 | //\r |
28 | // SMM Base specification constant and types\r | |
29 | //\r | |
79964ac8 | 30 | #define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)\r |
31 | \r | |
79964ac8 | 32 | /**\r |
f22f941e | 33 | Allocates pool memory from SMRAM for IA-32, or runtime memory for\r |
79964ac8 | 34 | the Itanium processor family.\r |
35 | \r | |
f22f941e | 36 | @param PoolType The type of pool to allocate. The only supported type \r |
37 | is EfiRuntimeServicesData.\r | |
79964ac8 | 38 | @param Size The number of bytes to allocate from the pool.\r |
f22f941e | 39 | @param Buffer A pointer to a pointer to the allocated buffer if the \r |
40 | call succeeds. Otherwise, undefined.\r | |
79964ac8 | 41 | \r |
42 | @retval EFI_SUCCESS The requested number of bytes was allocated.\r | |
43 | @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.\r | |
44 | @retval EFI_UNSUPPORTED In runtime.\r | |
77a72512 | 45 | @note Inconsistent with specification here:\r |
27d9ad06 | 46 | In Framework Spec, this definition is named EFI_SMM_ALLOCATE_POOL. \r |
47 | To avoid a naming conflict, the definition is renamed.\r | |
79964ac8 | 48 | **/\r |
49 | typedef\r | |
50 | EFI_STATUS\r | |
69686d56 | 51 | (EFIAPI *EFI_SMMCORE_ALLOCATE_POOL)(\r |
79964ac8 | 52 | IN EFI_MEMORY_TYPE PoolType,\r |
53 | IN UINTN Size,\r | |
54 | OUT VOID **Buffer\r | |
55 | );\r | |
56 | \r | |
57 | /**\r | |
58 | Returns pool memory to the system.\r | |
59 | \r | |
f22f941e | 60 | @param Buffer The pointer to the buffer to free.\r |
79964ac8 | 61 | \r |
62 | @retval EFI_SUCCESS The memory was returned to the system.\r | |
63 | @retval EFI_INVALID_PARAMETER Buffer was invalid.\r | |
64 | @retval EFI_UNSUPPORTED In runtime.\r | |
77a72512 | 65 | @note Inconsistent with specification here:\r |
27d9ad06 | 66 | In Framework Spec, this definition is named EFI_SMM_FREE_POOL. \r |
67 | To avoid a naming conflict, the definition is renamed. \r | |
79964ac8 | 68 | **/\r |
69 | typedef\r | |
70 | EFI_STATUS\r | |
69686d56 | 71 | (EFIAPI *EFI_SMMCORE_FREE_POOL)(\r |
79964ac8 | 72 | IN VOID *Buffer\r |
73 | );\r | |
74 | \r | |
75 | /**\r | |
76 | Allocates memory pages from the system.\r | |
77 | \r | |
78 | @param Type The type of allocation to perform.\r | |
f22f941e | 79 | @param MemoryType The only supported type is EfiRuntimeServicesData.\r |
80 | @param NumberofPages The number of contiguous 4 KB pages to allocate.\r | |
79964ac8 | 81 | @param Memory Pointer to a physical address. On input, the way in which\r |
82 | the address is used depends on the value of Type. On output, the address\r | |
83 | is set to the base of the page range that was allocated.\r | |
84 | \r | |
85 | @retval EFI_SUCCESS The requested pages were allocated.\r | |
86 | @retval EFI_OUT_OF_RESOURCES The pages requested could not be allocated.\r | |
87 | @retval EFI_NOT_FOUND The requested pages could not be found.\r | |
88 | @retval EFI_INVALID_PARAMETER Type is not AllocateAnyPages or AllocateMaxAddress\r | |
f22f941e | 89 | or AllocateAddress. Or, MemoryType is in the range EfiMaxMemoryType..0x7FFFFFFF.\r |
77a72512 | 90 | @note Inconsistent with specification here:\r |
5259c97d | 91 | In the Framework Spec, this definition is named EFI_SMM_ALLOCATE_PAGES. \r |
92 | To avoid a naming conflict, the definition here is renamed.\r | |
79964ac8 | 93 | **/\r |
94 | typedef\r | |
95 | EFI_STATUS\r | |
69686d56 | 96 | (EFIAPI *EFI_SMMCORE_ALLOCATE_PAGES)(\r |
79964ac8 | 97 | IN EFI_ALLOCATE_TYPE Type,\r |
98 | IN EFI_MEMORY_TYPE MemoryType,\r | |
99 | IN UINTN NumberOfPages,\r | |
100 | OUT EFI_PHYSICAL_ADDRESS *Memory\r | |
101 | );\r | |
102 | \r | |
103 | /**\r | |
104 | Frees memory pages for the system.\r | |
105 | \r | |
f22f941e | 106 | @param Memory The base physical address of the pages to be freed.\r |
79964ac8 | 107 | @param NumberOfPages The number of contiguous 4 KB pages to free.\r |
108 | \r | |
109 | @retval EFI_SUCCESS The requested memory pages were freed.\r | |
110 | @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or NumberOfPages is invalid.\r | |
111 | @retval EFI_NOT_FOUND The requested memory pages were not allocated with SmmAllocatePages().\r | |
18d7ae2e | 112 | \r |
77a72512 | 113 | @note Inconsistent with specification here:\r |
5259c97d | 114 | In the Framework Spec, this definition is named EFI_SMM_FREE_PAGES. \r |
115 | To avoid a naming conflict, the definition here is renamed.\r | |
79964ac8 | 116 | **/\r |
117 | typedef\r | |
118 | EFI_STATUS\r | |
69686d56 | 119 | (EFIAPI *EFI_SMMCORE_FREE_PAGES)(\r |
79964ac8 | 120 | IN EFI_PHYSICAL_ADDRESS Memory,\r |
121 | IN UINTN NumberOfPages\r | |
122 | );\r | |
b6d47a83 | 123 | \r |
470d0b27 | 124 | ///\r |
125 | /// The processor save-state information for IA-32 processors. This information is important in that the\r | |
126 | /// SMM drivers may need to ascertain the state of the processor before invoking the SMI.\r | |
127 | ///\r | |
79964ac8 | 128 | typedef struct {\r |
470d0b27 | 129 | ///\r |
130 | /// Reserved for future processors. As such, software should not attempt to interpret or\r | |
131 | /// write to this region.\r | |
132 | ///\r | |
79964ac8 | 133 | UINT8 Reserved1[248];\r |
470d0b27 | 134 | ///\r |
135 | /// The location of the processor SMBASE, which is the location where the processor\r | |
136 | /// will pass control upon receipt of an SMI.\r | |
137 | ///\r | |
79964ac8 | 138 | UINT32 SMBASE;\r |
470d0b27 | 139 | ///\r |
140 | /// The revision of the SMM save state. This value is set by the processor.\r | |
141 | ///\r | |
79964ac8 | 142 | UINT32 SMMRevId;\r |
470d0b27 | 143 | ///\r |
144 | /// The value of the I/O restart field. Allows for restarting an in-process I/O instruction.\r | |
145 | ///\r | |
79964ac8 | 146 | UINT16 IORestart;\r |
470d0b27 | 147 | ///\r |
148 | /// Describes behavior that should be commenced in response to a halt instruction.\r | |
149 | ///\r | |
79964ac8 | 150 | UINT16 AutoHALTRestart;\r |
470d0b27 | 151 | ///\r |
152 | /// Reserved for future processors. As such, software should not attempt to interpret or\r | |
153 | /// write to this region.\r | |
154 | ///\r | |
79964ac8 | 155 | UINT8 Reserved2[164];\r |
470d0b27 | 156 | \r |
157 | //\r | |
158 | // Registers in IA-32 processors. \r | |
159 | //\r | |
79964ac8 | 160 | UINT32 ES;\r |
161 | UINT32 CS;\r | |
162 | UINT32 SS;\r | |
163 | UINT32 DS;\r | |
164 | UINT32 FS;\r | |
165 | UINT32 GS;\r | |
166 | UINT32 LDTBase;\r | |
167 | UINT32 TR;\r | |
168 | UINT32 DR7;\r | |
169 | UINT32 DR6;\r | |
170 | UINT32 EAX;\r | |
171 | UINT32 ECX;\r | |
172 | UINT32 EDX;\r | |
173 | UINT32 EBX;\r | |
174 | UINT32 ESP;\r | |
175 | UINT32 EBP;\r | |
176 | UINT32 ESI;\r | |
177 | UINT32 EDI;\r | |
178 | UINT32 EIP;\r | |
179 | UINT32 EFLAGS;\r | |
180 | UINT32 CR3;\r | |
181 | UINT32 CR0;\r | |
182 | } EFI_SMI_CPU_SAVE_STATE;\r | |
183 | \r | |
470d0b27 | 184 | ///\r |
185 | /// The processor save-state information for the Itanium processor family. This information is\r | |
186 | /// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r | |
187 | /// the PMI. This structure is mandatory and must be 512 byte aligned.\r | |
188 | /// \r | |
79964ac8 | 189 | typedef struct {\r |
190 | UINT64 reserved;\r | |
191 | UINT64 r1;\r | |
192 | UINT64 r2;\r | |
193 | UINT64 r3;\r | |
194 | UINT64 r4;\r | |
195 | UINT64 r5;\r | |
196 | UINT64 r6;\r | |
197 | UINT64 r7;\r | |
198 | UINT64 r8;\r | |
199 | UINT64 r9;\r | |
200 | UINT64 r10;\r | |
201 | UINT64 r11;\r | |
202 | UINT64 r12;\r | |
203 | UINT64 r13;\r | |
204 | UINT64 r14;\r | |
205 | UINT64 r15;\r | |
206 | UINT64 r16;\r | |
207 | UINT64 r17;\r | |
208 | UINT64 r18;\r | |
209 | UINT64 r19;\r | |
210 | UINT64 r20;\r | |
211 | UINT64 r21;\r | |
212 | UINT64 r22;\r | |
213 | UINT64 r23;\r | |
214 | UINT64 r24;\r | |
215 | UINT64 r25;\r | |
216 | UINT64 r26;\r | |
217 | UINT64 r27;\r | |
218 | UINT64 r28;\r | |
219 | UINT64 r29;\r | |
220 | UINT64 r30;\r | |
221 | UINT64 r31;\r | |
222 | \r | |
223 | UINT64 pr;\r | |
224 | \r | |
225 | UINT64 b0;\r | |
226 | UINT64 b1;\r | |
227 | UINT64 b2;\r | |
228 | UINT64 b3;\r | |
229 | UINT64 b4;\r | |
230 | UINT64 b5;\r | |
231 | UINT64 b6;\r | |
232 | UINT64 b7;\r | |
233 | \r | |
234 | // application registers\r | |
235 | UINT64 ar_rsc;\r | |
236 | UINT64 ar_bsp;\r | |
237 | UINT64 ar_bspstore;\r | |
238 | UINT64 ar_rnat;\r | |
239 | \r | |
240 | UINT64 ar_fcr;\r | |
241 | \r | |
242 | UINT64 ar_eflag;\r | |
243 | UINT64 ar_csd;\r | |
244 | UINT64 ar_ssd;\r | |
245 | UINT64 ar_cflg;\r | |
246 | UINT64 ar_fsr;\r | |
247 | UINT64 ar_fir;\r | |
248 | UINT64 ar_fdr;\r | |
249 | \r | |
250 | UINT64 ar_ccv;\r | |
251 | \r | |
252 | UINT64 ar_unat;\r | |
253 | \r | |
254 | UINT64 ar_fpsr;\r | |
255 | \r | |
256 | UINT64 ar_pfs;\r | |
257 | UINT64 ar_lc;\r | |
258 | UINT64 ar_ec;\r | |
259 | \r | |
260 | // control registers\r | |
261 | UINT64 cr_dcr;\r | |
262 | UINT64 cr_itm;\r | |
263 | UINT64 cr_iva;\r | |
264 | UINT64 cr_pta;\r | |
265 | UINT64 cr_ipsr;\r | |
266 | UINT64 cr_isr;\r | |
267 | UINT64 cr_iip;\r | |
268 | UINT64 cr_ifa;\r | |
269 | UINT64 cr_itir;\r | |
270 | UINT64 cr_iipa;\r | |
271 | UINT64 cr_ifs;\r | |
272 | UINT64 cr_iim;\r | |
273 | UINT64 cr_iha;\r | |
274 | \r | |
275 | // debug registers\r | |
276 | UINT64 dbr0;\r | |
277 | UINT64 dbr1;\r | |
278 | UINT64 dbr2;\r | |
279 | UINT64 dbr3;\r | |
280 | UINT64 dbr4;\r | |
281 | UINT64 dbr5;\r | |
282 | UINT64 dbr6;\r | |
283 | UINT64 dbr7;\r | |
284 | \r | |
285 | UINT64 ibr0;\r | |
286 | UINT64 ibr1;\r | |
287 | UINT64 ibr2;\r | |
288 | UINT64 ibr3;\r | |
289 | UINT64 ibr4;\r | |
290 | UINT64 ibr5;\r | |
291 | UINT64 ibr6;\r | |
292 | UINT64 ibr7;\r | |
293 | \r | |
294 | // virtual registers\r | |
295 | UINT64 int_nat; // nat bits for R1-R31\r | |
296 | \r | |
297 | } EFI_PMI_SYSTEM_CONTEXT;\r | |
298 | \r | |
470d0b27 | 299 | ///\r |
300 | /// The processor save-state information for IA-32 and Itanium processors. This information is\r | |
301 | /// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r | |
302 | /// the SMI or PMI.\r | |
303 | ///\r | |
79964ac8 | 304 | typedef union {\r |
470d0b27 | 305 | ///\r |
306 | /// The processor save-state information for IA-32 processors. \r | |
307 | ///\r | |
79964ac8 | 308 | EFI_SMI_CPU_SAVE_STATE Ia32SaveState;\r |
470d0b27 | 309 | ///\r |
6ac6f987 | 310 | /// Note: Inconsistency with the Framework SMM CIS spec - Itanium save state not included.\r |
311 | ///\r | |
470d0b27 | 312 | /// The processor save-state information for Itanium processors.\r |
313 | ///\r | |
6ac6f987 | 314 | /// EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;\r |
79964ac8 | 315 | } EFI_SMM_CPU_SAVE_STATE;\r |
316 | \r | |
470d0b27 | 317 | ///\r |
318 | /// The optional floating point save-state information for IA-32 processors. If the optional floating\r | |
319 | /// point save is indicated for any handler, the following data structure must be preserved.\r | |
320 | ///\r | |
79964ac8 | 321 | typedef struct {\r |
322 | UINT16 Fcw;\r | |
323 | UINT16 Fsw;\r | |
324 | UINT16 Ftw;\r | |
325 | UINT16 Opcode;\r | |
326 | UINT32 Eip;\r | |
327 | UINT16 Cs;\r | |
328 | UINT16 Rsvd1;\r | |
329 | UINT32 DataOffset;\r | |
330 | UINT16 Ds;\r | |
331 | UINT8 Rsvd2[10];\r | |
332 | UINT8 St0Mm0[10], Rsvd3[6];\r | |
333 | UINT8 St0Mm1[10], Rsvd4[6];\r | |
334 | UINT8 St0Mm2[10], Rsvd5[6];\r | |
335 | UINT8 St0Mm3[10], Rsvd6[6];\r | |
336 | UINT8 St0Mm4[10], Rsvd7[6];\r | |
337 | UINT8 St0Mm5[10], Rsvd8[6];\r | |
338 | UINT8 St0Mm6[10], Rsvd9[6];\r | |
339 | UINT8 St0Mm7[10], Rsvd10[6];\r | |
340 | UINT8 Rsvd11[22*16];\r | |
341 | } EFI_SMI_OPTIONAL_FPSAVE_STATE;\r | |
342 | \r | |
470d0b27 | 343 | ///\r |
344 | /// The optional floating point save-state information for the Itanium processor family. If the optional\r | |
345 | /// floating point save is indicated for any handler, then this data structure must be preserved. \r | |
346 | /// \r | |
79964ac8 | 347 | typedef struct {\r |
348 | UINT64 f2[2];\r | |
349 | UINT64 f3[2];\r | |
350 | UINT64 f4[2];\r | |
351 | UINT64 f5[2];\r | |
352 | UINT64 f6[2];\r | |
353 | UINT64 f7[2];\r | |
354 | UINT64 f8[2];\r | |
355 | UINT64 f9[2];\r | |
356 | UINT64 f10[2];\r | |
357 | UINT64 f11[2];\r | |
358 | UINT64 f12[2];\r | |
359 | UINT64 f13[2];\r | |
360 | UINT64 f14[2];\r | |
361 | UINT64 f15[2];\r | |
362 | UINT64 f16[2];\r | |
363 | UINT64 f17[2];\r | |
364 | UINT64 f18[2];\r | |
365 | UINT64 f19[2];\r | |
366 | UINT64 f20[2];\r | |
367 | UINT64 f21[2];\r | |
368 | UINT64 f22[2];\r | |
369 | UINT64 f23[2];\r | |
370 | UINT64 f24[2];\r | |
371 | UINT64 f25[2];\r | |
372 | UINT64 f26[2];\r | |
373 | UINT64 f27[2];\r | |
374 | UINT64 f28[2];\r | |
375 | UINT64 f29[2];\r | |
376 | UINT64 f30[2];\r | |
377 | UINT64 f31[2];\r | |
378 | } EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;\r | |
379 | \r | |
470d0b27 | 380 | ///\r |
381 | /// The processor save-state information for IA-32 and Itanium processors. If the optional floating\r | |
382 | /// point save is indicated for any handler, then this data structure must be preserved.\r | |
383 | ///\r | |
79964ac8 | 384 | typedef union {\r |
470d0b27 | 385 | /// \r |
386 | /// The optional floating point save-state information for IA-32 processors. \r | |
387 | ///\r | |
79964ac8 | 388 | EFI_SMI_OPTIONAL_FPSAVE_STATE Ia32FpSave;\r |
470d0b27 | 389 | ///\r |
390 | /// The optional floating point save-state information for Itanium processors. \r | |
391 | ///\r | |
79964ac8 | 392 | EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT ItaniumFpSave;\r |
393 | } EFI_SMM_FLOATING_POINT_SAVE_STATE;\r | |
394 | \r | |
395 | /**\r | |
396 | This function is the main entry point for an SMM handler dispatch\r | |
397 | or communicate-based callback.\r | |
398 | \r | |
399 | @param SmmImageHandle A unique value returned by the SMM infrastructure\r | |
400 | in response to registration for a communicate-based callback or dispatch.\r | |
401 | @param CommunicationBuffer\r | |
402 | An optional buffer that will be populated\r | |
403 | by the SMM infrastructure in response to a non-SMM agent (preboot or runtime)\r | |
404 | invoking the EFI_SMM_BASE_PROTOCOL.Communicate() service.\r | |
405 | @param SourceSize If CommunicationBuffer is non-NULL, this field\r | |
406 | indicates the size of the data payload in this buffer.\r | |
407 | \r | |
408 | @return Status Code\r | |
409 | \r | |
410 | **/\r | |
411 | typedef\r | |
412 | EFI_STATUS\r | |
69686d56 | 413 | (EFIAPI *EFI_SMM_HANDLER_ENTRY_POINT)(\r |
79964ac8 | 414 | IN EFI_HANDLE SmmImageHandle,\r |
415 | IN OUT VOID *CommunicationBuffer OPTIONAL,\r | |
416 | IN OUT UINTN *SourceSize OPTIONAL\r | |
417 | );\r | |
418 | \r | |
419 | /**\r | |
420 | The SmmInstallConfigurationTable() function is used to maintain the list\r | |
421 | of configuration tables that are stored in the System Management System\r | |
422 | Table. The list is stored as an array of (GUID, Pointer) pairs. The list\r | |
423 | must be allocated from pool memory with PoolType set to EfiRuntimeServicesData.\r | |
424 | \r | |
425 | @param SystemTable A pointer to the SMM System Table.\r | |
426 | @param Guid A pointer to the GUID for the entry to add, update, or remove.\r | |
427 | @param Table A pointer to the buffer of the table to add.\r | |
428 | @param TableSize The size of the table to install.\r | |
429 | \r | |
430 | @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.\r | |
431 | @retval EFI_INVALID_PARAMETER Guid is not valid.\r | |
432 | @retval EFI_NOT_FOUND An attempt was made to delete a non-existent entry.\r | |
433 | @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.\r | |
434 | \r | |
435 | **/\r | |
436 | typedef\r | |
437 | EFI_STATUS\r | |
69686d56 | 438 | (EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE)(\r |
79964ac8 | 439 | IN EFI_SMM_SYSTEM_TABLE *SystemTable,\r |
440 | IN EFI_GUID *Guid,\r | |
441 | IN VOID *Table,\r | |
442 | IN UINTN TableSize\r | |
443 | );\r | |
444 | \r | |
445 | //\r | |
446 | // System Management System Table (SMST)\r | |
447 | //\r | |
448 | struct _EFI_SMM_SYSTEM_TABLE {\r | |
470d0b27 | 449 | ///\r |
450 | /// The table header for the System Management System Table (SMST). \r | |
451 | ///\r | |
79964ac8 | 452 | EFI_TABLE_HEADER Hdr;\r |
453 | \r | |
470d0b27 | 454 | ///\r |
455 | /// A pointer to a NULL-terminated Unicode string containing the vendor name. It is\r | |
456 | /// permissible for this pointer to be NULL.\r | |
457 | ///\r | |
79964ac8 | 458 | CHAR16 *SmmFirmwareVendor;\r |
470d0b27 | 459 | ///\r |
460 | /// The particular revision of the firmware.\r | |
461 | ///\r | |
79964ac8 | 462 | UINT32 SmmFirmwareRevision;\r |
463 | \r | |
470d0b27 | 464 | ///\r |
465 | /// Adds, updates, or removes a configuration table entry from the SMST. \r | |
466 | ///\r | |
79964ac8 | 467 | EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;\r |
468 | \r | |
469 | //\r | |
470 | // I/O Services\r | |
471 | //\r | |
470d0b27 | 472 | ///\r |
473 | /// A GUID that designates the particular CPU I/O services. \r | |
474 | ///\r | |
79964ac8 | 475 | EFI_GUID EfiSmmCpuIoGuid;\r |
470d0b27 | 476 | ///\r |
477 | /// Provides the basic memory and I/O interfaces that are used to abstract accesses to\r | |
478 | /// devices.\r | |
479 | ///\r | |
79964ac8 | 480 | EFI_SMM_CPU_IO_INTERFACE SmmIo;\r |
481 | \r | |
482 | //\r | |
483 | // Runtime memory service\r | |
484 | //\r | |
470d0b27 | 485 | ///\r |
18d7ae2e | 486 | ///\r |
470d0b27 | 487 | /// Allocates pool memory from SMRAM for IA-32 or runtime memory for the\r |
488 | /// Itanium processor family.\r | |
489 | ///\r | |
79964ac8 | 490 | EFI_SMMCORE_ALLOCATE_POOL SmmAllocatePool;\r |
470d0b27 | 491 | ///\r |
492 | /// Returns pool memory to the system. \r | |
493 | ///\r | |
79964ac8 | 494 | EFI_SMMCORE_FREE_POOL SmmFreePool;\r |
470d0b27 | 495 | ///\r |
496 | /// Allocates memory pages from the system. \r | |
497 | ///\r | |
79964ac8 | 498 | EFI_SMMCORE_ALLOCATE_PAGES SmmAllocatePages;\r |
470d0b27 | 499 | ///\r |
500 | /// Frees memory pages for the system.\r | |
501 | ///\r | |
79964ac8 | 502 | EFI_SMMCORE_FREE_PAGES SmmFreePages;\r |
503 | \r | |
504 | //\r | |
505 | // MP service\r | |
506 | //\r | |
18d7ae2e | 507 | \r |
f22f941e | 508 | /// Inconsistent with specification here:\r |
509 | /// In Framework Spec, this definition does not exist. This method is introduced in PI1.1 specification for \r | |
510 | /// the implementation needed.\r | |
79964ac8 | 511 | EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;\r |
512 | \r | |
513 | //\r | |
514 | // CPU information records\r | |
515 | //\r | |
470d0b27 | 516 | ///\r |
517 | /// A 1-relative number between 1 and the NumberOfCpus field. This field designates\r | |
518 | /// which processor is executing the SMM infrastructure. This number also serves as an\r | |
519 | /// index into the CpuSaveState and CpuOptionalFloatingPointState\r | |
520 | /// fields.\r | |
521 | ///\r | |
79964ac8 | 522 | UINTN CurrentlyExecutingCpu;\r |
470d0b27 | 523 | ///\r |
524 | /// The number of EFI Configuration Tables in the buffer\r | |
525 | /// SmmConfigurationTable.\r | |
526 | ///\r | |
79964ac8 | 527 | UINTN NumberOfCpus;\r |
470d0b27 | 528 | ///\r |
529 | /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r | |
530 | /// NumberOfTableEntries.\r | |
531 | ///\r | |
79964ac8 | 532 | EFI_SMM_CPU_SAVE_STATE *CpuSaveState;\r |
470d0b27 | 533 | ///\r |
534 | /// A pointer to a catenation of the EFI_SMM_FLOATING_POINT_SAVE_STATE.\r | |
535 | /// The size of this entire table is NumberOfCpus* size of the\r | |
536 | /// EFI_SMM_FLOATING_POINT_SAVE_STATE. These fields are populated only if\r | |
537 | /// there is at least one SMM driver that has registered for a callback with the\r | |
538 | /// FloatingPointSave field in EFI_SMM_BASE_PROTOCOL.RegisterCallback() set to TRUE.\r | |
539 | ///\r | |
79964ac8 | 540 | EFI_SMM_FLOATING_POINT_SAVE_STATE *CpuOptionalFloatingPointState;\r |
541 | \r | |
542 | //\r | |
543 | // Extensibility table\r | |
544 | //\r | |
470d0b27 | 545 | ///\r |
546 | /// The number of EFI Configuration Tables in the buffer\r | |
547 | /// SmmConfigurationTable.\r | |
548 | ///\r | |
79964ac8 | 549 | UINTN NumberOfTableEntries;\r |
470d0b27 | 550 | ///\r |
551 | /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r | |
552 | /// NumberOfTableEntries.\r | |
553 | ///\r | |
79964ac8 | 554 | EFI_CONFIGURATION_TABLE *SmmConfigurationTable;\r |
555 | };\r | |
556 | \r | |
557 | #endif\r |