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79964ac8 | 1 | /** @file\r |
2 | I/O Library.\r | |
1c2f052d | 3 | The implementation of I/O operation for this library instance\r |
c4fa3eac | 4 | are based on EFI_CPU_IO_PROTOCOL.\r |
1c2f052d LG |
5 | \r |
6 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
29ddc5f7 LD |
7 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
8 | \r | |
2b3687db | 9 | This program and the accompanying materials\r |
79964ac8 | 10 | are licensed and made available under the terms and conditions of the BSD License\r |
11 | which accompanies this distribution. The full text of the license may be found at\r | |
12 | http://opensource.org/licenses/bsd-license.php\r | |
13 | \r | |
14 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
15 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
16 | \r | |
17 | Module Name: IoLib.c\r | |
18 | \r | |
19 | **/\r | |
20 | \r | |
694363f8 | 21 | \r |
79964ac8 | 22 | #include "DxeCpuIoLibInternal.h"\r |
23 | \r | |
24 | //\r | |
25 | // Globle varible to cache pointer to CpuIo protocol.\r | |
26 | //\r | |
33338afe | 27 | EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;\r |
79964ac8 | 28 | \r |
29 | /**\r | |
30 | The constructor function caches the pointer to CpuIo protocol.\r | |
31 | \r | |
32 | The constructor function locates CpuIo protocol from protocol database.\r | |
33 | It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.\r | |
34 | \r | |
35 | @param ImageHandle The firmware allocated handle for the EFI image.\r | |
36 | @param SystemTable A pointer to the EFI System Table.\r | |
37 | \r | |
38 | @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r | |
39 | \r | |
40 | **/\r | |
41 | EFI_STATUS\r | |
42 | EFIAPI\r | |
43 | IoLibConstructor (\r | |
44 | IN EFI_HANDLE ImageHandle,\r | |
45 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
46 | )\r | |
47 | {\r | |
33338afe | 48 | EFI_STATUS Status;\r |
79964ac8 | 49 | \r |
33338afe | 50 | Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);\r |
79964ac8 | 51 | ASSERT_EFI_ERROR (Status);\r |
52 | \r | |
53 | return Status;\r | |
54 | }\r | |
55 | \r | |
56 | /**\r | |
57 | Reads registers in the EFI CPU I/O space.\r | |
58 | \r | |
59 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
60 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
61 | This function must guarantee that all I/O read and write operations are serialized.\r | |
62 | \r | |
63 | @param Port The base address of the I/O operation.\r | |
64 | The caller is responsible for aligning the Address if required.\r | |
65 | @param Width The width of the I/O operation.\r | |
66 | \r | |
67 | @return Data read from registers in the EFI CPU I/O space.\r | |
68 | \r | |
69 | **/\r | |
70 | UINT64\r | |
71 | EFIAPI\r | |
72 | IoReadWorker (\r | |
33338afe | 73 | IN UINTN Port,\r |
74 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
79964ac8 | 75 | )\r |
76 | {\r | |
77 | EFI_STATUS Status;\r | |
78 | UINT64 Data;\r | |
79 | \r | |
33338afe | 80 | Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r |
79964ac8 | 81 | ASSERT_EFI_ERROR (Status);\r |
82 | \r | |
83 | return Data;\r | |
84 | }\r | |
85 | \r | |
86 | /**\r | |
87 | Writes registers in the EFI CPU I/O space.\r | |
88 | \r | |
89 | Writes the I/O port specified by Port with registers width and value specified by Width\r | |
90 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
91 | This function must guarantee that all I/O read and write operations are serialized.\r | |
92 | \r | |
93 | @param Port The base address of the I/O operation.\r | |
94 | The caller is responsible for aligning the Address if required.\r | |
95 | @param Width The width of the I/O operation.\r | |
96 | @param Data The value to write to the I/O port.\r | |
97 | \r | |
d6a1c70d | 98 | @return The parameter of Data.\r |
79964ac8 | 99 | \r |
100 | **/\r | |
101 | UINT64\r | |
102 | EFIAPI\r | |
103 | IoWriteWorker (\r | |
33338afe | 104 | IN UINTN Port,\r |
105 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
106 | IN UINT64 Data\r | |
79964ac8 | 107 | )\r |
108 | {\r | |
33338afe | 109 | EFI_STATUS Status;\r |
79964ac8 | 110 | \r |
33338afe | 111 | Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r |
79964ac8 | 112 | ASSERT_EFI_ERROR (Status);\r |
113 | \r | |
114 | return Data;\r | |
115 | }\r | |
116 | \r | |
29ddc5f7 LD |
117 | /**\r |
118 | Reads registers in the EFI CPU I/O space.\r | |
119 | \r | |
120 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
121 | The port is read Count times, and the read data is stored in the provided Buffer.\r | |
122 | \r | |
123 | This function must guarantee that all I/O read and write operations are serialized.\r | |
124 | If such operations are not supported, then ASSERT().\r | |
125 | \r | |
126 | @param Port The base address of the I/O operation.\r | |
127 | The caller is responsible for aligning the Address if required.\r | |
128 | @param Width The width of the I/O operation.\r | |
129 | @param Count The number of times to read I/O port.\r | |
130 | @param Buffer The buffer to store the read data into.\r | |
131 | \r | |
132 | **/\r | |
133 | VOID\r | |
134 | EFIAPI\r | |
135 | IoReadFifoWorker (\r | |
136 | IN UINTN Port,\r | |
137 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
138 | IN UINTN Count,\r | |
139 | IN VOID *Buffer\r | |
140 | )\r | |
141 | {\r | |
142 | EFI_STATUS Status;\r | |
143 | \r | |
144 | Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);\r | |
145 | ASSERT_EFI_ERROR (Status);\r | |
146 | }\r | |
147 | \r | |
148 | /**\r | |
149 | Writes registers in the EFI CPU I/O space.\r | |
150 | \r | |
151 | Writes the I/O port specified by Port with registers width specified by Width.\r | |
152 | The port is written Count times, and the write data is retrieved from the provided Buffer.\r | |
153 | \r | |
154 | This function must guarantee that all I/O read and write operations are serialized.\r | |
155 | If such operations are not supported, then ASSERT().\r | |
156 | \r | |
157 | @param Port The base address of the I/O operation.\r | |
158 | The caller is responsible for aligning the Address if required.\r | |
159 | @param Width The width of the I/O operation.\r | |
160 | @param Count The number of times to write I/O port.\r | |
161 | @param Buffer The buffer to store the read data into.\r | |
162 | \r | |
163 | **/\r | |
164 | VOID\r | |
165 | EFIAPI\r | |
166 | IoWriteFifoWorker (\r | |
167 | IN UINTN Port,\r | |
168 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
169 | IN UINTN Count,\r | |
170 | IN VOID *Buffer\r | |
171 | )\r | |
172 | {\r | |
173 | EFI_STATUS Status;\r | |
174 | \r | |
175 | Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);\r | |
176 | ASSERT_EFI_ERROR (Status);\r | |
177 | }\r | |
178 | \r | |
79964ac8 | 179 | /**\r |
180 | Reads memory-mapped registers in the EFI system memory space.\r | |
181 | \r | |
182 | Reads the MMIO registers specified by Address with registers width specified by Width.\r | |
183 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
184 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
185 | \r | |
186 | @param Address The MMIO register to read.\r | |
187 | The caller is responsible for aligning the Address if required.\r | |
188 | @param Width The width of the I/O operation.\r | |
189 | \r | |
190 | @return Data read from registers in the EFI system memory space.\r | |
191 | \r | |
192 | **/\r | |
193 | UINT64\r | |
194 | EFIAPI\r | |
195 | MmioReadWorker (\r | |
33338afe | 196 | IN UINTN Address,\r |
197 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
79964ac8 | 198 | )\r |
199 | {\r | |
33338afe | 200 | EFI_STATUS Status;\r |
201 | UINT64 Data;\r | |
79964ac8 | 202 | \r |
33338afe | 203 | Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r |
79964ac8 | 204 | ASSERT_EFI_ERROR (Status);\r |
205 | \r | |
206 | return Data;\r | |
207 | }\r | |
208 | \r | |
209 | /**\r | |
210 | Writes memory-mapped registers in the EFI system memory space.\r | |
211 | \r | |
212 | Writes the MMIO registers specified by Address with registers width and value specified by Width\r | |
213 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
214 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
215 | \r | |
216 | @param Address The MMIO register to read.\r | |
217 | The caller is responsible for aligning the Address if required.\r | |
218 | @param Width The width of the I/O operation.\r | |
7459094d | 219 | @param Data The value to write to the I/O port.\r |
1c2f052d | 220 | \r |
79964ac8 | 221 | @return Data read from registers in the EFI system memory space.\r |
222 | \r | |
223 | **/\r | |
224 | UINT64\r | |
225 | EFIAPI\r | |
226 | MmioWriteWorker (\r | |
33338afe | 227 | IN UINTN Address,\r |
228 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
229 | IN UINT64 Data\r | |
79964ac8 | 230 | )\r |
231 | {\r | |
33338afe | 232 | EFI_STATUS Status;\r |
79964ac8 | 233 | \r |
33338afe | 234 | Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r |
79964ac8 | 235 | ASSERT_EFI_ERROR (Status);\r |
236 | \r | |
237 | return Data;\r | |
238 | }\r | |
239 | \r | |
240 | /**\r | |
241 | Reads an 8-bit I/O port.\r | |
242 | \r | |
243 | Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r | |
244 | This function must guarantee that all I/O read and write operations are\r | |
245 | serialized.\r | |
246 | \r | |
247 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
248 | \r | |
249 | @param Port The I/O port to read.\r | |
250 | \r | |
251 | @return The value read.\r | |
252 | \r | |
253 | **/\r | |
254 | UINT8\r | |
255 | EFIAPI\r | |
256 | IoRead8 (\r | |
257 | IN UINTN Port\r | |
258 | )\r | |
259 | {\r | |
260 | return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r | |
261 | }\r | |
262 | \r | |
263 | /**\r | |
264 | Writes an 8-bit I/O port.\r | |
265 | \r | |
266 | Writes the 8-bit I/O port specified by Port with the value specified by Value\r | |
267 | and returns Value. This function must guarantee that all I/O read and write\r | |
268 | operations are serialized.\r | |
269 | \r | |
270 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
271 | \r | |
272 | @param Port The I/O port to write.\r | |
273 | @param Value The value to write to the I/O port.\r | |
274 | \r | |
275 | @return The value written the I/O port.\r | |
276 | \r | |
277 | **/\r | |
278 | UINT8\r | |
279 | EFIAPI\r | |
280 | IoWrite8 (\r | |
281 | IN UINTN Port,\r | |
282 | IN UINT8 Value\r | |
283 | )\r | |
284 | {\r | |
285 | return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r | |
286 | }\r | |
287 | \r | |
288 | /**\r | |
289 | Reads a 16-bit I/O port.\r | |
290 | \r | |
291 | Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r | |
292 | This function must guarantee that all I/O read and write operations are\r | |
293 | serialized.\r | |
294 | \r | |
596cecff | 295 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
1c2f052d | 296 | \r |
79964ac8 | 297 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
298 | \r | |
299 | @param Port The I/O port to read.\r | |
300 | \r | |
301 | @return The value read.\r | |
302 | \r | |
303 | **/\r | |
304 | UINT16\r | |
305 | EFIAPI\r | |
306 | IoRead16 (\r | |
307 | IN UINTN Port\r | |
308 | )\r | |
309 | {\r | |
310 | //\r | |
311 | // Make sure Port is aligned on a 16-bit boundary.\r | |
312 | //\r | |
313 | ASSERT ((Port & 1) == 0);\r | |
314 | return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r | |
315 | }\r | |
316 | \r | |
317 | /**\r | |
318 | Writes a 16-bit I/O port.\r | |
319 | \r | |
320 | Writes the 16-bit I/O port specified by Port with the value specified by Value\r | |
321 | and returns Value. This function must guarantee that all I/O read and write\r | |
322 | operations are serialized.\r | |
323 | \r | |
596cecff | 324 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
325 | \r | |
79964ac8 | 326 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
327 | \r | |
328 | @param Port The I/O port to write.\r | |
329 | @param Value The value to write to the I/O port.\r | |
330 | \r | |
331 | @return The value written the I/O port.\r | |
332 | \r | |
333 | **/\r | |
334 | UINT16\r | |
335 | EFIAPI\r | |
336 | IoWrite16 (\r | |
337 | IN UINTN Port,\r | |
338 | IN UINT16 Value\r | |
339 | )\r | |
340 | {\r | |
341 | //\r | |
342 | // Make sure Port is aligned on a 16-bit boundary.\r | |
343 | //\r | |
344 | ASSERT ((Port & 1) == 0);\r | |
345 | return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r | |
346 | }\r | |
347 | \r | |
348 | /**\r | |
349 | Reads a 32-bit I/O port.\r | |
350 | \r | |
351 | Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r | |
352 | This function must guarantee that all I/O read and write operations are\r | |
353 | serialized.\r | |
1c2f052d | 354 | \r |
596cecff | 355 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
79964ac8 | 356 | \r |
357 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
358 | \r | |
359 | @param Port The I/O port to read.\r | |
360 | \r | |
361 | @return The value read.\r | |
362 | \r | |
363 | **/\r | |
364 | UINT32\r | |
365 | EFIAPI\r | |
366 | IoRead32 (\r | |
367 | IN UINTN Port\r | |
368 | )\r | |
369 | {\r | |
370 | //\r | |
371 | // Make sure Port is aligned on a 32-bit boundary.\r | |
372 | //\r | |
373 | ASSERT ((Port & 3) == 0);\r | |
374 | return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r | |
375 | }\r | |
376 | \r | |
377 | /**\r | |
378 | Writes a 32-bit I/O port.\r | |
379 | \r | |
380 | Writes the 32-bit I/O port specified by Port with the value specified by Value\r | |
381 | and returns Value. This function must guarantee that all I/O read and write\r | |
382 | operations are serialized.\r | |
383 | \r | |
596cecff | 384 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
385 | \r | |
79964ac8 | 386 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
387 | \r | |
388 | @param Port The I/O port to write.\r | |
389 | @param Value The value to write to the I/O port.\r | |
390 | \r | |
391 | @return The value written the I/O port.\r | |
392 | \r | |
393 | **/\r | |
394 | UINT32\r | |
395 | EFIAPI\r | |
396 | IoWrite32 (\r | |
397 | IN UINTN Port,\r | |
398 | IN UINT32 Value\r | |
399 | )\r | |
400 | {\r | |
401 | //\r | |
402 | // Make sure Port is aligned on a 32-bit boundary.\r | |
403 | //\r | |
404 | ASSERT ((Port & 3) == 0);\r | |
405 | return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r | |
406 | }\r | |
407 | \r | |
408 | /**\r | |
409 | Reads a 64-bit I/O port.\r | |
410 | \r | |
411 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r | |
412 | This function must guarantee that all I/O read and write operations are\r | |
413 | serialized.\r | |
414 | \r | |
596cecff | 415 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
416 | \r | |
79964ac8 | 417 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
418 | \r | |
419 | @param Port The I/O port to read.\r | |
420 | \r | |
421 | @return The value read.\r | |
422 | \r | |
423 | **/\r | |
424 | UINT64\r | |
425 | EFIAPI\r | |
426 | IoRead64 (\r | |
427 | IN UINTN Port\r | |
428 | )\r | |
429 | {\r | |
430 | //\r | |
431 | // Make sure Port is aligned on a 64-bit boundary.\r | |
432 | //\r | |
433 | ASSERT ((Port & 7) == 0);\r | |
434 | return IoReadWorker (Port, EfiCpuIoWidthUint64);\r | |
435 | }\r | |
436 | \r | |
437 | /**\r | |
438 | Writes a 64-bit I/O port.\r | |
439 | \r | |
440 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r | |
441 | and returns Value. This function must guarantee that all I/O read and write\r | |
442 | operations are serialized.\r | |
443 | \r | |
596cecff | 444 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
1c2f052d | 445 | \r |
79964ac8 | 446 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
447 | \r | |
448 | @param Port The I/O port to write.\r | |
449 | @param Value The value to write to the I/O port.\r | |
450 | \r | |
451 | @return The value written the I/O port.\r | |
452 | \r | |
453 | **/\r | |
454 | UINT64\r | |
455 | EFIAPI\r | |
456 | IoWrite64 (\r | |
457 | IN UINTN Port,\r | |
458 | IN UINT64 Value\r | |
459 | )\r | |
460 | {\r | |
461 | //\r | |
462 | // Make sure Port is aligned on a 64-bit boundary.\r | |
463 | //\r | |
464 | ASSERT ((Port & 7) == 0);\r | |
465 | return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r | |
466 | }\r | |
467 | \r | |
29ddc5f7 LD |
468 | /**\r |
469 | Reads an 8-bit I/O port fifo into a block of memory.\r | |
470 | \r | |
471 | Reads the 8-bit I/O fifo port specified by Port.\r | |
472 | The port is read Count times, and the read data is\r | |
473 | stored in the provided Buffer.\r | |
474 | \r | |
475 | This function must guarantee that all I/O read and write operations are\r | |
476 | serialized.\r | |
477 | \r | |
478 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
479 | \r | |
480 | @param Port The I/O port to read.\r | |
481 | @param Count The number of times to read I/O port.\r | |
482 | @param Buffer The buffer to store the read data into.\r | |
483 | \r | |
484 | **/\r | |
485 | VOID\r | |
486 | EFIAPI\r | |
487 | IoReadFifo8 (\r | |
488 | IN UINTN Port,\r | |
489 | IN UINTN Count,\r | |
490 | OUT VOID *Buffer\r | |
491 | )\r | |
492 | {\r | |
493 | IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r | |
494 | }\r | |
495 | \r | |
496 | /**\r | |
497 | Writes a block of memory into an 8-bit I/O port fifo.\r | |
498 | \r | |
499 | Writes the 8-bit I/O fifo port specified by Port.\r | |
500 | The port is written Count times, and the write data is\r | |
501 | retrieved from the provided Buffer.\r | |
502 | \r | |
503 | This function must guarantee that all I/O write and write operations are\r | |
504 | serialized.\r | |
505 | \r | |
506 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
507 | \r | |
508 | @param Port The I/O port to write.\r | |
509 | @param Count The number of times to write I/O port.\r | |
510 | @param Buffer The buffer to retrieve the write data from.\r | |
511 | \r | |
512 | **/\r | |
513 | VOID\r | |
514 | EFIAPI\r | |
515 | IoWriteFifo8 (\r | |
516 | IN UINTN Port,\r | |
517 | IN UINTN Count,\r | |
518 | IN VOID *Buffer\r | |
519 | )\r | |
520 | {\r | |
521 | IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r | |
522 | }\r | |
523 | \r | |
524 | /**\r | |
525 | Reads a 16-bit I/O port fifo into a block of memory.\r | |
526 | \r | |
527 | Reads the 16-bit I/O fifo port specified by Port.\r | |
528 | The port is read Count times, and the read data is\r | |
529 | stored in the provided Buffer.\r | |
530 | \r | |
531 | This function must guarantee that all I/O read and write operations are\r | |
532 | serialized.\r | |
533 | \r | |
534 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
535 | \r | |
536 | @param Port The I/O port to read.\r | |
537 | @param Count The number of times to read I/O port.\r | |
538 | @param Buffer The buffer to store the read data into.\r | |
539 | \r | |
540 | **/\r | |
541 | VOID\r | |
542 | EFIAPI\r | |
543 | IoReadFifo16 (\r | |
544 | IN UINTN Port,\r | |
545 | IN UINTN Count,\r | |
546 | OUT VOID *Buffer\r | |
547 | )\r | |
548 | {\r | |
549 | //\r | |
550 | // Make sure Port is aligned on a 16-bit boundary.\r | |
551 | //\r | |
552 | ASSERT ((Port & 1) == 0);\r | |
553 | IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r | |
554 | }\r | |
555 | \r | |
556 | /**\r | |
557 | Writes a block of memory into a 16-bit I/O port fifo.\r | |
558 | \r | |
559 | Writes the 16-bit I/O fifo port specified by Port.\r | |
560 | The port is written Count times, and the write data is\r | |
561 | retrieved from the provided Buffer.\r | |
562 | \r | |
563 | This function must guarantee that all I/O write and write operations are\r | |
564 | serialized.\r | |
565 | \r | |
566 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
567 | \r | |
568 | @param Port The I/O port to write.\r | |
569 | @param Count The number of times to write I/O port.\r | |
570 | @param Buffer The buffer to retrieve the write data from.\r | |
571 | \r | |
572 | **/\r | |
573 | VOID\r | |
574 | EFIAPI\r | |
575 | IoWriteFifo16 (\r | |
576 | IN UINTN Port,\r | |
577 | IN UINTN Count,\r | |
578 | IN VOID *Buffer\r | |
579 | )\r | |
580 | {\r | |
581 | //\r | |
582 | // Make sure Port is aligned on a 16-bit boundary.\r | |
583 | //\r | |
584 | ASSERT ((Port & 1) == 0);\r | |
585 | IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r | |
586 | }\r | |
587 | \r | |
588 | /**\r | |
589 | Reads a 32-bit I/O port fifo into a block of memory.\r | |
590 | \r | |
591 | Reads the 32-bit I/O fifo port specified by Port.\r | |
592 | The port is read Count times, and the read data is\r | |
593 | stored in the provided Buffer.\r | |
594 | \r | |
595 | This function must guarantee that all I/O read and write operations are\r | |
596 | serialized.\r | |
597 | \r | |
598 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
599 | \r | |
600 | @param Port The I/O port to read.\r | |
601 | @param Count The number of times to read I/O port.\r | |
602 | @param Buffer The buffer to store the read data into.\r | |
603 | \r | |
604 | **/\r | |
605 | VOID\r | |
606 | EFIAPI\r | |
607 | IoReadFifo32 (\r | |
608 | IN UINTN Port,\r | |
609 | IN UINTN Count,\r | |
610 | OUT VOID *Buffer\r | |
611 | )\r | |
612 | {\r | |
613 | //\r | |
614 | // Make sure Port is aligned on a 32-bit boundary.\r | |
615 | //\r | |
616 | ASSERT ((Port & 3) == 0);\r | |
617 | IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r | |
618 | }\r | |
619 | \r | |
620 | /**\r | |
621 | Writes a block of memory into a 32-bit I/O port fifo.\r | |
622 | \r | |
623 | Writes the 32-bit I/O fifo port specified by Port.\r | |
624 | The port is written Count times, and the write data is\r | |
625 | retrieved from the provided Buffer.\r | |
626 | \r | |
627 | This function must guarantee that all I/O write and write operations are\r | |
628 | serialized.\r | |
629 | \r | |
630 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
631 | \r | |
632 | @param Port The I/O port to write.\r | |
633 | @param Count The number of times to write I/O port.\r | |
634 | @param Buffer The buffer to retrieve the write data from.\r | |
635 | \r | |
636 | **/\r | |
637 | VOID\r | |
638 | EFIAPI\r | |
639 | IoWriteFifo32 (\r | |
640 | IN UINTN Port,\r | |
641 | IN UINTN Count,\r | |
642 | IN VOID *Buffer\r | |
643 | )\r | |
644 | {\r | |
645 | //\r | |
646 | // Make sure Port is aligned on a 32-bit boundary.\r | |
647 | //\r | |
648 | ASSERT ((Port & 3) == 0);\r | |
649 | IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r | |
650 | }\r | |
651 | \r | |
79964ac8 | 652 | /**\r |
653 | Reads an 8-bit MMIO register.\r | |
654 | \r | |
655 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
656 | returned. This function must guarantee that all MMIO read and write\r | |
657 | operations are serialized.\r | |
658 | \r | |
659 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
660 | \r | |
661 | @param Address The MMIO register to read.\r | |
662 | \r | |
663 | @return The value read.\r | |
664 | \r | |
665 | **/\r | |
666 | UINT8\r | |
667 | EFIAPI\r | |
668 | MmioRead8 (\r | |
669 | IN UINTN Address\r | |
670 | )\r | |
671 | {\r | |
672 | return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r | |
673 | }\r | |
674 | \r | |
675 | /**\r | |
676 | Writes an 8-bit MMIO register.\r | |
677 | \r | |
678 | Writes the 8-bit MMIO register specified by Address with the value specified\r | |
679 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
680 | and write operations are serialized.\r | |
681 | \r | |
682 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
683 | \r | |
684 | @param Address The MMIO register to write.\r | |
685 | @param Value The value to write to the MMIO register.\r | |
686 | \r | |
687 | **/\r | |
688 | UINT8\r | |
689 | EFIAPI\r | |
690 | MmioWrite8 (\r | |
691 | IN UINTN Address,\r | |
692 | IN UINT8 Value\r | |
693 | )\r | |
694 | {\r | |
695 | return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r | |
696 | }\r | |
697 | \r | |
698 | /**\r | |
699 | Reads a 16-bit MMIO register.\r | |
700 | \r | |
701 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
702 | returned. This function must guarantee that all MMIO read and write\r | |
703 | operations are serialized.\r | |
704 | \r | |
596cecff | 705 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
1c2f052d | 706 | \r |
79964ac8 | 707 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
708 | \r | |
709 | @param Address The MMIO register to read.\r | |
710 | \r | |
711 | @return The value read.\r | |
712 | \r | |
713 | **/\r | |
714 | UINT16\r | |
715 | EFIAPI\r | |
716 | MmioRead16 (\r | |
717 | IN UINTN Address\r | |
718 | )\r | |
719 | {\r | |
720 | //\r | |
721 | // Make sure Address is aligned on a 16-bit boundary.\r | |
722 | //\r | |
723 | ASSERT ((Address & 1) == 0);\r | |
724 | return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r | |
725 | }\r | |
726 | \r | |
727 | /**\r | |
728 | Writes a 16-bit MMIO register.\r | |
729 | \r | |
730 | Writes the 16-bit MMIO register specified by Address with the value specified\r | |
731 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
732 | and write operations are serialized.\r | |
733 | \r | |
596cecff | 734 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
1c2f052d | 735 | \r |
79964ac8 | 736 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
737 | \r | |
738 | @param Address The MMIO register to write.\r | |
739 | @param Value The value to write to the MMIO register.\r | |
740 | \r | |
741 | **/\r | |
742 | UINT16\r | |
743 | EFIAPI\r | |
744 | MmioWrite16 (\r | |
745 | IN UINTN Address,\r | |
746 | IN UINT16 Value\r | |
747 | )\r | |
748 | {\r | |
749 | //\r | |
750 | // Make sure Address is aligned on a 16-bit boundary.\r | |
751 | //\r | |
752 | ASSERT ((Address & 1) == 0);\r | |
753 | return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r | |
754 | }\r | |
755 | \r | |
756 | /**\r | |
757 | Reads a 32-bit MMIO register.\r | |
758 | \r | |
759 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
760 | returned. This function must guarantee that all MMIO read and write\r | |
761 | operations are serialized.\r | |
762 | \r | |
596cecff | 763 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
1c2f052d | 764 | \r |
79964ac8 | 765 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
766 | \r | |
767 | @param Address The MMIO register to read.\r | |
768 | \r | |
769 | @return The value read.\r | |
770 | \r | |
771 | **/\r | |
772 | UINT32\r | |
773 | EFIAPI\r | |
774 | MmioRead32 (\r | |
775 | IN UINTN Address\r | |
776 | )\r | |
777 | {\r | |
778 | //\r | |
779 | // Make sure Address is aligned on a 32-bit boundary.\r | |
780 | //\r | |
781 | ASSERT ((Address & 3) == 0);\r | |
782 | return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r | |
783 | }\r | |
784 | \r | |
785 | /**\r | |
786 | Writes a 32-bit MMIO register.\r | |
787 | \r | |
788 | Writes the 32-bit MMIO register specified by Address with the value specified\r | |
789 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
790 | and write operations are serialized.\r | |
791 | \r | |
596cecff | 792 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
1c2f052d | 793 | \r |
79964ac8 | 794 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
795 | \r | |
796 | @param Address The MMIO register to write.\r | |
797 | @param Value The value to write to the MMIO register.\r | |
798 | \r | |
799 | **/\r | |
800 | UINT32\r | |
801 | EFIAPI\r | |
802 | MmioWrite32 (\r | |
803 | IN UINTN Address,\r | |
804 | IN UINT32 Value\r | |
805 | )\r | |
806 | {\r | |
807 | //\r | |
808 | // Make sure Address is aligned on a 32-bit boundary.\r | |
809 | //\r | |
810 | ASSERT ((Address & 3) == 0);\r | |
811 | return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r | |
812 | }\r | |
813 | \r | |
814 | /**\r | |
815 | Reads a 64-bit MMIO register.\r | |
816 | \r | |
817 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
818 | returned. This function must guarantee that all MMIO read and write\r | |
819 | operations are serialized.\r | |
820 | \r | |
596cecff | 821 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
1c2f052d | 822 | \r |
79964ac8 | 823 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
824 | \r | |
825 | @param Address The MMIO register to read.\r | |
826 | \r | |
827 | @return The value read.\r | |
828 | \r | |
829 | **/\r | |
830 | UINT64\r | |
831 | EFIAPI\r | |
832 | MmioRead64 (\r | |
833 | IN UINTN Address\r | |
834 | )\r | |
835 | {\r | |
836 | //\r | |
837 | // Make sure Address is aligned on a 64-bit boundary.\r | |
838 | //\r | |
839 | ASSERT ((Address & 7) == 0);\r | |
840 | return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r | |
841 | }\r | |
842 | \r | |
843 | /**\r | |
844 | Writes a 64-bit MMIO register.\r | |
845 | \r | |
846 | Writes the 64-bit MMIO register specified by Address with the value specified\r | |
847 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
848 | and write operations are serialized.\r | |
849 | \r | |
596cecff | 850 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
1c2f052d | 851 | \r |
79964ac8 | 852 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
853 | \r | |
854 | @param Address The MMIO register to write.\r | |
855 | @param Value The value to write to the MMIO register.\r | |
856 | \r | |
857 | **/\r | |
858 | UINT64\r | |
859 | EFIAPI\r | |
860 | MmioWrite64 (\r | |
861 | IN UINTN Address,\r | |
862 | IN UINT64 Value\r | |
863 | )\r | |
864 | {\r | |
865 | //\r | |
866 | // Make sure Address is aligned on a 64-bit boundary.\r | |
867 | //\r | |
868 | ASSERT ((Address & 7) == 0);\r | |
869 | return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r | |
870 | }\r |