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d987459f SZ |
1 | /** @file\r |
2 | Private Header file for Usb Host Controller PEIM\r | |
3 | \r | |
26b85012 | 4 | Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r |
d987459f | 5 | \r |
9d510e61 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
d987459f SZ |
7 | \r |
8 | **/\r | |
9 | \r | |
10 | #ifndef _RECOVERY_XHC_H_\r | |
11 | #define _RECOVERY_XHC_H_\r | |
12 | \r | |
13 | #include <PiPei.h>\r | |
14 | \r | |
15 | #include <Ppi/UsbController.h>\r | |
16 | #include <Ppi/Usb2HostController.h>\r | |
b575ca32 JY |
17 | #include <Ppi/IoMmu.h>\r |
18 | #include <Ppi/EndOfPeiPhase.h>\r | |
d987459f SZ |
19 | \r |
20 | #include <Library/DebugLib.h>\r | |
21 | #include <Library/PeimEntryPoint.h>\r | |
22 | #include <Library/PeiServicesLib.h>\r | |
23 | #include <Library/BaseMemoryLib.h>\r | |
24 | #include <Library/TimerLib.h>\r | |
25 | #include <Library/IoLib.h>\r | |
26 | #include <Library/MemoryAllocationLib.h>\r | |
27 | \r | |
28 | typedef struct _PEI_XHC_DEV PEI_XHC_DEV;\r | |
29 | typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;\r | |
30 | \r | |
31 | #include "UsbHcMem.h"\r | |
32 | #include "XhciReg.h"\r | |
33 | #include "XhciSched.h"\r | |
34 | \r | |
35 | #define CMD_RING_TRB_NUMBER 0x100\r | |
36 | #define TR_RING_TRB_NUMBER 0x100\r | |
37 | #define ERST_NUMBER 0x01\r | |
38 | #define EVENT_RING_TRB_NUMBER 0x200\r | |
39 | \r | |
40 | #define XHC_1_MICROSECOND 1\r | |
41 | #define XHC_1_MILLISECOND (1000 * XHC_1_MICROSECOND)\r | |
42 | #define XHC_1_SECOND (1000 * XHC_1_MILLISECOND)\r | |
43 | \r | |
44 | //\r | |
45 | // XHC reset timeout experience values.\r | |
26cd2d6d | 46 | // The unit is millisecond, setting it as 1s.\r |
d987459f | 47 | //\r |
26cd2d6d | 48 | #define XHC_RESET_TIMEOUT (1000)\r |
d987459f | 49 | \r |
26b85012 FT |
50 | //\r |
51 | // TRSTRCY delay requirement in usb 2.0 spec chapter 7.1.7.5.\r | |
52 | // The unit is microsecond, setting it as 10ms.\r | |
53 | //\r | |
54 | #define XHC_RESET_RECOVERY_DELAY (10 * 1000)\r | |
55 | \r | |
d987459f SZ |
56 | //\r |
57 | // Wait for root port state stable.\r | |
58 | //\r | |
59 | #define XHC_ROOT_PORT_STATE_STABLE (200 * XHC_1_MILLISECOND)\r | |
60 | \r | |
26cd2d6d FT |
61 | //\r |
62 | // XHC generic timeout experience values.\r | |
63 | // The unit is millisecond, setting it as 10s.\r | |
64 | //\r | |
65 | #define XHC_GENERIC_TIMEOUT (10 * 1000)\r | |
d987459f SZ |
66 | \r |
67 | #define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))\r | |
68 | #define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))\r | |
69 | #define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))\r | |
70 | \r | |
71 | #define XHC_REG_BIT_IS_SET(XHC, Offset, Bit) \\r | |
72 | (XHC_BIT_IS_SET(XhcPeiReadOpReg ((XHC), (Offset)), (Bit)))\r | |
73 | \r | |
74 | #define USB_DESC_TYPE_HUB 0x29\r | |
75 | #define USB_DESC_TYPE_HUB_SUPER_SPEED 0x2a\r | |
76 | \r | |
77 | //\r | |
78 | // The RequestType in EFI_USB_DEVICE_REQUEST is composed of\r | |
79 | // three fields: One bit direction, 2 bit type, and 5 bit\r | |
80 | // target.\r | |
81 | //\r | |
82 | #define USB_REQUEST_TYPE(Dir, Type, Target) \\r | |
83 | ((UINT8)((((Dir) == EfiUsbDataIn ? 0x01 : 0) << 7) | (Type) | (Target)))\r | |
84 | \r | |
85 | struct _USB_DEV_CONTEXT {\r | |
86 | //\r | |
87 | // Whether this entry in UsbDevContext array is used or not.\r | |
88 | //\r | |
89 | BOOLEAN Enabled;\r | |
90 | //\r | |
91 | // The slot id assigned to the new device through XHCI's Enable_Slot cmd.\r | |
92 | //\r | |
93 | UINT8 SlotId;\r | |
94 | //\r | |
95 | // The route string presented an attached usb device.\r | |
96 | //\r | |
97 | USB_DEV_ROUTE RouteString;\r | |
98 | //\r | |
99 | // The route string of parent device if it exists. Otherwise it's zero.\r | |
100 | //\r | |
101 | USB_DEV_ROUTE ParentRouteString;\r | |
102 | //\r | |
103 | // The actual device address assigned by XHCI through Address_Device command.\r | |
104 | //\r | |
105 | UINT8 XhciDevAddr;\r | |
106 | //\r | |
107 | // The requested device address from UsbBus driver through Set_Address standard usb request.\r | |
108 | // As XHCI spec replaces this request with Address_Device command, we have to record the\r | |
109 | // requested device address and establish a mapping relationship with the actual device address.\r | |
110 | // Then UsbBus driver just need to be aware of the requested device address to access usb device\r | |
111 | // through EFI_USB2_HC_PROTOCOL. Xhci driver would be responsible for translating it to actual\r | |
112 | // device address and access the actual device.\r | |
113 | //\r | |
114 | UINT8 BusDevAddr;\r | |
115 | //\r | |
116 | // The pointer to the input device context.\r | |
117 | //\r | |
118 | VOID *InputContext;\r | |
119 | //\r | |
120 | // The pointer to the output device context.\r | |
121 | //\r | |
122 | VOID *OutputContext;\r | |
123 | //\r | |
124 | // The transfer queue for every endpoint.\r | |
125 | //\r | |
126 | VOID *EndpointTransferRing[31];\r | |
127 | //\r | |
128 | // The device descriptor which is stored to support XHCI's Evaluate_Context cmd.\r | |
129 | //\r | |
130 | EFI_USB_DEVICE_DESCRIPTOR DevDesc;\r | |
131 | //\r | |
132 | // As a usb device may include multiple configuration descriptors, we dynamically allocate an array\r | |
133 | // to store them.\r | |
134 | // Note that every configuration descriptor stored here includes those lower level descriptors,\r | |
135 | // such as Interface descriptor, Endpoint descriptor, and so on.\r | |
136 | // These information is used to support XHCI's Config_Endpoint cmd.\r | |
137 | //\r | |
138 | EFI_USB_CONFIG_DESCRIPTOR **ConfDesc;\r | |
139 | };\r | |
140 | \r | |
141 | #define USB_XHC_DEV_SIGNATURE SIGNATURE_32 ('x', 'h', 'c', 'i')\r | |
142 | \r | |
143 | struct _PEI_XHC_DEV {\r | |
144 | UINTN Signature;\r | |
145 | PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi;\r | |
146 | EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;\r | |
147 | UINT32 UsbHostControllerBaseAddress;\r | |
148 | USBHC_MEM_POOL *MemPool;\r | |
149 | \r | |
b575ca32 JY |
150 | //\r |
151 | // EndOfPei callback is used to stop the XHC DMA operation\r | |
152 | // after exit PEI phase.\r | |
153 | //\r | |
154 | EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;\r | |
155 | \r | |
d987459f SZ |
156 | //\r |
157 | // XHCI configuration data\r | |
158 | //\r | |
159 | UINT8 CapLength; ///< Capability Register Length\r | |
160 | XHC_HCSPARAMS1 HcSParams1; ///< Structural Parameters 1\r | |
161 | XHC_HCSPARAMS2 HcSParams2; ///< Structural Parameters 2\r | |
162 | XHC_HCCPARAMS HcCParams; ///< Capability Parameters\r | |
163 | UINT32 DBOff; ///< Doorbell Offset\r | |
164 | UINT32 RTSOff; ///< Runtime Register Space Offset\r | |
165 | UINT32 PageSize;\r | |
166 | UINT32 MaxScratchpadBufs;\r | |
167 | UINT64 *ScratchBuf;\r | |
b575ca32 | 168 | VOID *ScratchMap;\r |
d987459f | 169 | UINT64 *ScratchEntry;\r |
b575ca32 | 170 | UINTN *ScratchEntryMap;\r |
d987459f SZ |
171 | UINT64 *DCBAA;\r |
172 | UINT32 MaxSlotsEn;\r | |
173 | //\r | |
174 | // Cmd Transfer Ring\r | |
175 | //\r | |
176 | TRANSFER_RING CmdRing;\r | |
177 | //\r | |
178 | // EventRing\r | |
179 | //\r | |
180 | EVENT_RING EventRing;\r | |
181 | \r | |
182 | //\r | |
183 | // Store device contexts managed by XHCI device\r | |
184 | // The array supports up to 255 devices, entry 0 is reserved and should not be used.\r | |
185 | //\r | |
186 | USB_DEV_CONTEXT UsbDevContext[256];\r | |
187 | };\r | |
188 | \r | |
189 | #define PEI_RECOVERY_USB_XHC_DEV_FROM_THIS(a) CR (a, PEI_XHC_DEV, Usb2HostControllerPpi, USB_XHC_DEV_SIGNATURE)\r | |
b575ca32 | 190 | #define PEI_RECOVERY_USB_XHC_DEV_FROM_THIS_NOTIFY(a) CR (a, PEI_XHC_DEV, EndOfPeiNotifyList, USB_XHC_DEV_SIGNATURE)\r |
d987459f SZ |
191 | \r |
192 | /**\r | |
193 | Initialize the memory management pool for the host controller.\r | |
194 | \r | |
195 | @return Pointer to the allocated memory pool or NULL if failed.\r | |
196 | \r | |
197 | **/\r | |
198 | USBHC_MEM_POOL *\r | |
199 | UsbHcInitMemPool (\r | |
200 | VOID\r | |
201 | )\r | |
202 | ;\r | |
203 | \r | |
204 | /**\r | |
205 | Release the memory management pool.\r | |
206 | \r | |
207 | @param Pool The USB memory pool to free.\r | |
208 | \r | |
209 | **/\r | |
210 | VOID\r | |
211 | UsbHcFreeMemPool (\r | |
212 | IN USBHC_MEM_POOL *Pool\r | |
213 | )\r | |
214 | ;\r | |
215 | \r | |
216 | /**\r | |
217 | Allocate some memory from the host controller's memory pool\r | |
218 | which can be used to communicate with host controller.\r | |
219 | \r | |
220 | @param Pool The host controller's memory pool.\r | |
221 | @param Size Size of the memory to allocate.\r | |
222 | \r | |
223 | @return The allocated memory or NULL.\r | |
224 | \r | |
225 | **/\r | |
226 | VOID *\r | |
227 | UsbHcAllocateMem (\r | |
228 | IN USBHC_MEM_POOL *Pool,\r | |
229 | IN UINTN Size\r | |
230 | )\r | |
231 | ;\r | |
232 | \r | |
233 | /**\r | |
234 | Free the allocated memory back to the memory pool.\r | |
235 | \r | |
236 | @param Pool The memory pool of the host controller.\r | |
237 | @param Mem The memory to free.\r | |
238 | @param Size The size of the memory to free.\r | |
239 | \r | |
240 | **/\r | |
241 | VOID\r | |
242 | UsbHcFreeMem (\r | |
243 | IN USBHC_MEM_POOL *Pool,\r | |
244 | IN VOID *Mem,\r | |
245 | IN UINTN Size\r | |
246 | )\r | |
247 | ;\r | |
248 | \r | |
b575ca32 JY |
249 | \r |
250 | /**\r | |
251 | Initialize IOMMU.\r | |
252 | **/\r | |
253 | VOID\r | |
254 | IoMmuInit (\r | |
255 | VOID\r | |
256 | );\r | |
257 | \r | |
258 | /**\r | |
259 | Provides the controller-specific addresses required to access system memory from a\r | |
260 | DMA bus master.\r | |
261 | \r | |
262 | @param Operation Indicates if the bus master is going to read or write to system memory.\r | |
263 | @param HostAddress The system memory address to map to the PCI controller.\r | |
264 | @param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r | |
265 | that were mapped.\r | |
266 | @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r | |
267 | access the hosts HostAddress.\r | |
268 | @param Mapping A resulting value to pass to Unmap().\r | |
269 | \r | |
270 | @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r | |
271 | @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.\r | |
272 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r | |
273 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
274 | @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r | |
275 | \r | |
276 | **/\r | |
277 | EFI_STATUS\r | |
278 | IoMmuMap (\r | |
279 | IN EDKII_IOMMU_OPERATION Operation,\r | |
280 | IN VOID *HostAddress,\r | |
281 | IN OUT UINTN *NumberOfBytes,\r | |
282 | OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r | |
283 | OUT VOID **Mapping\r | |
284 | );\r | |
285 | \r | |
286 | /**\r | |
287 | Completes the Map() operation and releases any corresponding resources.\r | |
288 | \r | |
289 | @param Mapping The mapping value returned from Map().\r | |
290 | \r | |
291 | @retval EFI_SUCCESS The range was unmapped.\r | |
292 | @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r | |
293 | @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r | |
294 | **/\r | |
295 | EFI_STATUS\r | |
296 | IoMmuUnmap (\r | |
297 | IN VOID *Mapping\r | |
298 | );\r | |
299 | \r | |
300 | /**\r | |
301 | Allocates pages that are suitable for an OperationBusMasterCommonBuffer or\r | |
302 | OperationBusMasterCommonBuffer64 mapping.\r | |
303 | \r | |
304 | @param Pages The number of pages to allocate.\r | |
305 | @param HostAddress A pointer to store the base system memory address of the\r | |
306 | allocated range.\r | |
307 | @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r | |
308 | access the hosts HostAddress.\r | |
309 | @param Mapping A resulting value to pass to Unmap().\r | |
310 | \r | |
311 | @retval EFI_SUCCESS The requested memory pages were allocated.\r | |
312 | @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r | |
313 | MEMORY_WRITE_COMBINE and MEMORY_CACHED.\r | |
314 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r | |
315 | @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r | |
316 | \r | |
317 | **/\r | |
318 | EFI_STATUS\r | |
319 | IoMmuAllocateBuffer (\r | |
320 | IN UINTN Pages,\r | |
321 | OUT VOID **HostAddress,\r | |
322 | OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r | |
323 | OUT VOID **Mapping\r | |
324 | );\r | |
325 | \r | |
326 | /**\r | |
327 | Frees memory that was allocated with AllocateBuffer().\r | |
328 | \r | |
329 | @param Pages The number of pages to free.\r | |
330 | @param HostAddress The base system memory address of the allocated range.\r | |
331 | @param Mapping The mapping value returned from Map().\r | |
332 | \r | |
333 | @retval EFI_SUCCESS The requested memory pages were freed.\r | |
334 | @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r | |
335 | was not allocated with AllocateBuffer().\r | |
336 | \r | |
337 | **/\r | |
338 | EFI_STATUS\r | |
339 | IoMmuFreeBuffer (\r | |
340 | IN UINTN Pages,\r | |
341 | IN VOID *HostAddress,\r | |
342 | IN VOID *Mapping\r | |
343 | );\r | |
344 | \r | |
2bbbdeee AS |
345 | /**\r |
346 | Allocates aligned pages that are suitable for an OperationBusMasterCommonBuffer or\r | |
347 | OperationBusMasterCommonBuffer64 mapping.\r | |
348 | \r | |
349 | @param Pages The number of pages to allocate.\r | |
350 | @param Alignment The requested alignment of the allocation. Must be a power of two.\r | |
351 | @param HostAddress A pointer to store the base system memory address of the\r | |
352 | allocated range.\r | |
353 | @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r | |
354 | access the hosts HostAddress.\r | |
355 | @param Mapping A resulting value to pass to Unmap().\r | |
356 | \r | |
357 | @retval EFI_SUCCESS The requested memory pages were allocated.\r | |
358 | @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r | |
359 | MEMORY_WRITE_COMBINE and MEMORY_CACHED.\r | |
360 | @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r | |
361 | @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r | |
362 | \r | |
363 | **/\r | |
364 | EFI_STATUS\r | |
365 | IoMmuAllocateAlignedBuffer (\r | |
366 | IN UINTN Pages,\r | |
367 | IN UINTN Alignment,\r | |
368 | OUT VOID **HostAddress,\r | |
369 | OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r | |
370 | OUT VOID **Mapping\r | |
371 | );\r | |
372 | \r | |
d987459f | 373 | #endif\r |