IntelSiliconPkg/dsc: Add PlatformVTdInfoSamplePei.

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / XhciPei / XhcPeim.h

/** @file\r
Private Header file for Usb Host Controller PEIM\r
\r
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
of the BSD License which accompanies this distribution.  The\r
full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#ifndef _RECOVERY_XHC_H_\r
#define _RECOVERY_XHC_H_\r
\r
#include <PiPei.h>\r
\r
#include <Ppi/UsbController.h>\r
#include <Ppi/Usb2HostController.h>\r
\r
#include <Library/DebugLib.h>\r
#include <Library/PeimEntryPoint.h>\r
#include <Library/PeiServicesLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/TimerLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
\r
typedef struct _PEI_XHC_DEV PEI_XHC_DEV;\r
typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;\r
\r
#include "UsbHcMem.h"\r
#include "XhciReg.h"\r
#include "XhciSched.h"\r
\r
#define CMD_RING_TRB_NUMBER         0x100\r
#define TR_RING_TRB_NUMBER          0x100\r
#define ERST_NUMBER                 0x01\r
#define EVENT_RING_TRB_NUMBER       0x200\r
\r
#define XHC_1_MICROSECOND           1\r
#define XHC_1_MILLISECOND           (1000 * XHC_1_MICROSECOND)\r
#define XHC_1_SECOND                (1000 * XHC_1_MILLISECOND)\r
\r
//\r
// XHC reset timeout experience values.\r
// The unit is millisecond, setting it as 1s.\r
//\r
#define XHC_RESET_TIMEOUT           (1000)\r
\r
//\r
// TRSTRCY delay requirement in usb 2.0 spec chapter 7.1.7.5.\r
// The unit is microsecond, setting it as 10ms.\r
//\r
#define XHC_RESET_RECOVERY_DELAY     (10 * 1000)\r
\r
//\r
// Wait for root port state stable.\r
//\r
#define XHC_ROOT_PORT_STATE_STABLE  (200 * XHC_1_MILLISECOND)\r
\r
//\r
// XHC generic timeout experience values.\r
// The unit is millisecond, setting it as 10s.\r
//\r
#define XHC_GENERIC_TIMEOUT         (10 * 1000)\r
\r
#define XHC_LOW_32BIT(Addr64)       ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))\r
#define XHC_HIGH_32BIT(Addr64)      ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))\r
#define XHC_BIT_IS_SET(Data, Bit)   ((BOOLEAN)(((Data) & (Bit)) == (Bit)))\r
\r
#define XHC_REG_BIT_IS_SET(XHC, Offset, Bit) \\r
          (XHC_BIT_IS_SET(XhcPeiReadOpReg ((XHC), (Offset)), (Bit)))\r
\r
#define USB_DESC_TYPE_HUB              0x29\r
#define USB_DESC_TYPE_HUB_SUPER_SPEED  0x2a\r
\r
//\r
// The RequestType in EFI_USB_DEVICE_REQUEST is composed of\r
// three fields: One bit direction, 2 bit type, and 5 bit\r
// target.\r
//\r
#define USB_REQUEST_TYPE(Dir, Type, Target) \\r
          ((UINT8)((((Dir) == EfiUsbDataIn ? 0x01 : 0) << 7) | (Type) | (Target)))\r
\r
struct _USB_DEV_CONTEXT {\r
  //\r
  // Whether this entry in UsbDevContext array is used or not.\r
  //\r
  BOOLEAN                           Enabled;\r
  //\r
  // The slot id assigned to the new device through XHCI's Enable_Slot cmd.\r
  //\r
  UINT8                             SlotId;\r
  //\r
  // The route string presented an attached usb device.\r
  //\r
  USB_DEV_ROUTE                     RouteString;\r
  //\r
  // The route string of parent device if it exists. Otherwise it's zero.\r
  //\r
  USB_DEV_ROUTE                     ParentRouteString;\r
  //\r
  // The actual device address assigned by XHCI through Address_Device command.\r
  //\r
  UINT8                             XhciDevAddr;\r
  //\r
  // The requested device address from UsbBus driver through Set_Address standard usb request.\r
  // As XHCI spec replaces this request with Address_Device command, we have to record the\r
  // requested device address and establish a mapping relationship with the actual device address.\r
  // Then UsbBus driver just need to be aware of the requested device address to access usb device\r
  // through EFI_USB2_HC_PROTOCOL. Xhci driver would be responsible for translating it to actual\r
  // device address and access the actual device.\r
  //\r
  UINT8                             BusDevAddr;\r
  //\r
  // The pointer to the input device context.\r
  //\r
  VOID                              *InputContext;\r
  //\r
  // The pointer to the output device context.\r
  //\r
  VOID                              *OutputContext;\r
  //\r
  // The transfer queue for every endpoint.\r
  //\r
  VOID                              *EndpointTransferRing[31];\r
  //\r
  // The device descriptor which is stored to support XHCI's Evaluate_Context cmd.\r
  //\r
  EFI_USB_DEVICE_DESCRIPTOR         DevDesc;\r
  //\r
  // As a usb device may include multiple configuration descriptors, we dynamically allocate an array\r
  // to store them.\r
  // Note that every configuration descriptor stored here includes those lower level descriptors,\r
  // such as Interface descriptor, Endpoint descriptor, and so on.\r
  // These information is used to support XHCI's Config_Endpoint cmd.\r
  //\r
  EFI_USB_CONFIG_DESCRIPTOR         **ConfDesc;\r
};\r
\r
#define USB_XHC_DEV_SIGNATURE       SIGNATURE_32 ('x', 'h', 'c', 'i')\r
\r
struct _PEI_XHC_DEV {\r
  UINTN                             Signature;\r
  PEI_USB2_HOST_CONTROLLER_PPI      Usb2HostControllerPpi;\r
  EFI_PEI_PPI_DESCRIPTOR            PpiDescriptor;\r
  UINT32                            UsbHostControllerBaseAddress;\r
  USBHC_MEM_POOL                    *MemPool;\r
\r
  //\r
  // XHCI configuration data\r
  //\r
  UINT8                             CapLength;    ///< Capability Register Length\r
  XHC_HCSPARAMS1                    HcSParams1;   ///< Structural Parameters 1\r
  XHC_HCSPARAMS2                    HcSParams2;   ///< Structural Parameters 2\r
  XHC_HCCPARAMS                     HcCParams;    ///< Capability Parameters\r
  UINT32                            DBOff;        ///< Doorbell Offset\r
  UINT32                            RTSOff;       ///< Runtime Register Space Offset\r
  UINT32                            PageSize;\r
  UINT32                            MaxScratchpadBufs;\r
  UINT64                            *ScratchBuf;\r
  UINT64                            *ScratchEntry;\r
  UINT64                            *DCBAA;\r
  UINT32                            MaxSlotsEn;\r
  //\r
  // Cmd Transfer Ring\r
  //\r
  TRANSFER_RING                     CmdRing;\r
  //\r
  // EventRing\r
  //\r
  EVENT_RING                        EventRing;\r
\r
  //\r
  // Store device contexts managed by XHCI device\r
  // The array supports up to 255 devices, entry 0 is reserved and should not be used.\r
  //\r
  USB_DEV_CONTEXT                   UsbDevContext[256];\r
};\r
\r
#define PEI_RECOVERY_USB_XHC_DEV_FROM_THIS(a) CR (a, PEI_XHC_DEV, Usb2HostControllerPpi, USB_XHC_DEV_SIGNATURE)\r
\r
/**\r
  Initialize the memory management pool for the host controller.\r
\r
  @return Pointer to the allocated memory pool or NULL if failed.\r
\r
**/\r
USBHC_MEM_POOL *\r
UsbHcInitMemPool (\r
  VOID\r
  )\r
;\r
\r
/**\r
  Release the memory management pool.\r
\r
  @param  Pool          The USB memory pool to free.\r
\r
**/\r
VOID\r
UsbHcFreeMemPool (\r
  IN USBHC_MEM_POOL     *Pool\r
  )\r
;\r
\r
/**\r
  Allocate some memory from the host controller's memory pool\r
  which can be used to communicate with host controller.\r
\r
  @param  Pool          The host controller's memory pool.\r
  @param  Size          Size of the memory to allocate.\r
\r
  @return The allocated memory or NULL.\r
\r
**/\r
VOID *\r
UsbHcAllocateMem (\r
  IN USBHC_MEM_POOL     *Pool,\r
  IN UINTN              Size\r
  )\r
;\r
\r
/**\r
  Free the allocated memory back to the memory pool.\r
\r
  @param  Pool          The memory pool of the host controller.\r
  @param  Mem           The memory to free.\r
  @param  Size          The size of the memory to free.\r
\r
**/\r
VOID\r
UsbHcFreeMem (\r
  IN USBHC_MEM_POOL     *Pool,\r
  IN VOID               *Mem,\r
  IN UINTN              Size\r
  )\r
;\r
\r
#endif\r