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a47c681f | 1 | /** @file\r |
8679b1c2 | 2 | Defives data structures per MultiProcessor Specification Ver 1.4.\r |
9095d37b LG |
3 | \r |
4 | The MultiProcessor Specification defines an enhancement to the standard\r | |
8679b1c2 LG |
5 | to which PC manufacturers design DOS-compatible systems.\r |
6 | \r | |
9095d37b | 7 | Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r |
9344f092 | 8 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
8679b1c2 | 9 | \r |
a47c681f | 10 | **/\r |
8679b1c2 LG |
11 | \r |
12 | #ifndef _LEGACY_BIOS_MPTABLE_H_\r | |
13 | #define _LEGACY_BIOS_MPTABLE_H_\r | |
14 | \r | |
15 | #define EFI_LEGACY_MP_TABLE_REV_1_4 0x04\r | |
16 | \r | |
17 | //\r | |
18 | // Define MP table structures. All are packed.\r | |
19 | //\r | |
20 | #pragma pack(1)\r | |
21 | \r | |
22 | #define EFI_LEGACY_MP_TABLE_FLOATING_POINTER_SIGNATURE SIGNATURE_32 ('_', 'M', 'P', '_')\r | |
a47c681f ED |
23 | typedef struct {\r |
24 | UINT32 Reserved1 : 6;\r | |
25 | UINT32 MutipleClk : 1;\r | |
26 | UINT32 Imcr : 1;\r | |
27 | UINT32 Reserved2 : 24;\r | |
bf579d35 | 28 | } FEATUREBYTE2_5;\r |
a47c681f | 29 | \r |
8679b1c2 LG |
30 | typedef struct {\r |
31 | UINT32 Signature;\r | |
32 | UINT32 PhysicalAddress;\r | |
33 | UINT8 Length;\r | |
34 | UINT8 SpecRev;\r | |
35 | UINT8 Checksum;\r | |
36 | UINT8 FeatureByte1;\r | |
bf579d35 | 37 | FEATUREBYTE2_5 FeatureByte2_5;\r |
8679b1c2 LG |
38 | } EFI_LEGACY_MP_TABLE_FLOATING_POINTER;\r |
39 | \r | |
40 | #define EFI_LEGACY_MP_TABLE_HEADER_SIGNATURE SIGNATURE_32 ('P', 'C', 'M', 'P')\r | |
41 | typedef struct {\r | |
42 | UINT32 Signature;\r | |
43 | UINT16 BaseTableLength;\r | |
44 | UINT8 SpecRev;\r | |
45 | UINT8 Checksum;\r | |
46 | CHAR8 OemId[8];\r | |
47 | CHAR8 OemProductId[12];\r | |
48 | UINT32 OemTablePointer;\r | |
49 | UINT16 OemTableSize;\r | |
50 | UINT16 EntryCount;\r | |
51 | UINT32 LocalApicAddress;\r | |
52 | UINT16 ExtendedTableLength;\r | |
53 | UINT8 ExtendedChecksum;\r | |
54 | UINT8 Reserved;\r | |
55 | } EFI_LEGACY_MP_TABLE_HEADER;\r | |
56 | \r | |
57 | typedef struct {\r | |
58 | UINT8 EntryType;\r | |
59 | } EFI_LEGACY_MP_TABLE_ENTRY_TYPE;\r | |
60 | \r | |
61 | //\r | |
62 | // Entry Type 0: Processor.\r | |
63 | //\r | |
64 | #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_PROCESSOR 0x00\r | |
a47c681f ED |
65 | typedef struct {\r |
66 | UINT8 Enabled : 1;\r | |
67 | UINT8 Bsp : 1;\r | |
68 | UINT8 Reserved : 6;\r | |
69 | } EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR_FLAGS;\r | |
70 | \r | |
71 | typedef struct {\r | |
72 | UINT32 Stepping : 4;\r | |
73 | UINT32 Model : 4;\r | |
74 | UINT32 Family : 4;\r | |
75 | UINT32 Reserved : 20;\r | |
76 | } EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR_SIGNATURE;\r | |
77 | \r | |
78 | typedef struct {\r | |
79 | UINT32 Fpu : 1;\r | |
80 | UINT32 Reserved1 : 6;\r | |
81 | UINT32 Mce : 1;\r | |
82 | UINT32 Cx8 : 1;\r | |
83 | UINT32 Apic : 1;\r | |
84 | UINT32 Reserved2 : 22;\r | |
85 | } EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR_FEATURES;\r | |
86 | \r | |
8679b1c2 LG |
87 | typedef struct {\r |
88 | UINT8 EntryType;\r | |
89 | UINT8 Id;\r | |
90 | UINT8 Ver;\r | |
a47c681f ED |
91 | EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR_FLAGS Flags;\r |
92 | EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR_SIGNATURE Signature;\r | |
93 | EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR_FEATURES Features;\r | |
8679b1c2 LG |
94 | UINT32 Reserved1;\r |
95 | UINT32 Reserved2;\r | |
96 | } EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR;\r | |
97 | \r | |
98 | //\r | |
99 | // Entry Type 1: Bus.\r | |
100 | //\r | |
101 | #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_BUS 0x01\r | |
102 | typedef struct {\r | |
103 | UINT8 EntryType;\r | |
104 | UINT8 Id;\r | |
105 | CHAR8 TypeString[6];\r | |
106 | } EFI_LEGACY_MP_TABLE_ENTRY_BUS;\r | |
107 | \r | |
108 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUS "CBUS " // Corollary CBus\r | |
109 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUSII "CBUSII" // Corollary CBUS II\r | |
110 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_EISA "EISA " // Extended ISA\r | |
111 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_FUTURE "FUTURE" // IEEE FutureBus\r | |
112 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_INTERN "INTERN" // Internal bus\r | |
113 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_ISA "ISA " // Industry Standard Architecture\r | |
114 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBI "MBI " // Multibus I\r | |
115 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBII "MBII " // Multibus II\r | |
116 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MCA "MCA " // Micro Channel Architecture\r | |
117 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPI "MPI " // MPI\r | |
118 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPSA "MPSA " // MPSA\r | |
119 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_NUBUS "NUBUS " // Apple Macintosh NuBus\r | |
120 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCI "PCI " // Peripheral Component Interconnect\r | |
121 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCMCIA "PCMCIA" // PC Memory Card International Assoc.\r | |
122 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_TC "TC " // DEC TurboChannel\r | |
123 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VL "VL " // VESA Local Bus\r | |
124 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VME "VME " // VMEbus\r | |
125 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_XPRESS "XPRESS" // Express System Bus\r | |
126 | //\r | |
127 | // Entry Type 2: I/O APIC.\r | |
128 | //\r | |
129 | #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IOAPIC 0x02\r | |
a47c681f ED |
130 | typedef struct {\r |
131 | UINT8 Enabled : 1;\r | |
132 | UINT8 Reserved : 7;\r | |
133 | } EFI_LEGACY_MP_TABLE_ENTRY_IOAPIC_FLAGS;\r | |
134 | \r | |
8679b1c2 LG |
135 | typedef struct {\r |
136 | UINT8 EntryType;\r | |
137 | UINT8 Id;\r | |
138 | UINT8 Ver;\r | |
a47c681f | 139 | EFI_LEGACY_MP_TABLE_ENTRY_IOAPIC_FLAGS Flags;\r |
8679b1c2 LG |
140 | UINT32 Address;\r |
141 | } EFI_LEGACY_MP_TABLE_ENTRY_IOAPIC;\r | |
142 | \r | |
143 | //\r | |
144 | // Entry Type 3: I/O Interrupt Assignment.\r | |
145 | //\r | |
146 | #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IO_INT 0x03\r | |
a47c681f ED |
147 | typedef struct {\r |
148 | UINT16 Polarity : 2;\r | |
149 | UINT16 Trigger : 2;\r | |
150 | UINT16 Reserved : 12;\r | |
151 | } EFI_LEGACY_MP_TABLE_ENTRY_INT_FLAGS;\r | |
152 | \r | |
153 | typedef struct {\r | |
154 | UINT8 IntNo : 2;\r | |
155 | UINT8 Dev : 5;\r | |
156 | UINT8 Reserved : 1;\r | |
157 | } EFI_LEGACY_MP_TABLE_ENTRY_INT_FIELDS;\r | |
158 | \r | |
159 | typedef union {\r | |
160 | EFI_LEGACY_MP_TABLE_ENTRY_INT_FIELDS fields;\r | |
161 | UINT8 byte;\r | |
162 | } EFI_LEGACY_MP_TABLE_ENTRY_INT_SOURCE_BUS_IRQ;\r | |
163 | \r | |
8679b1c2 LG |
164 | typedef struct {\r |
165 | UINT8 EntryType;\r | |
166 | UINT8 IntType;\r | |
a47c681f | 167 | EFI_LEGACY_MP_TABLE_ENTRY_INT_FLAGS Flags;\r |
8679b1c2 | 168 | UINT8 SourceBusId;\r |
a47c681f | 169 | EFI_LEGACY_MP_TABLE_ENTRY_INT_SOURCE_BUS_IRQ SourceBusIrq;\r |
8679b1c2 LG |
170 | UINT8 DestApicId;\r |
171 | UINT8 DestApicIntIn;\r | |
172 | } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT;\r | |
173 | \r | |
174 | typedef enum {\r | |
175 | EfiLegacyMpTableEntryIoIntTypeInt = 0,\r | |
176 | EfiLegacyMpTableEntryIoIntTypeNmi = 1,\r | |
177 | EfiLegacyMpTableEntryIoIntTypeSmi = 2,\r | |
178 | EfiLegacyMpTableEntryIoIntTypeExtInt= 3,\r | |
179 | } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_TYPE;\r | |
180 | \r | |
181 | typedef enum {\r | |
182 | EfiLegacyMpTableEntryIoIntFlagsPolaritySpec = 0x0,\r | |
183 | EfiLegacyMpTableEntryIoIntFlagsPolarityActiveHigh = 0x1,\r | |
184 | EfiLegacyMpTableEntryIoIntFlagsPolarityReserved = 0x2,\r | |
185 | EfiLegacyMpTableEntryIoIntFlagsPolarityActiveLow = 0x3,\r | |
186 | } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_POLARITY;\r | |
187 | \r | |
188 | typedef enum {\r | |
189 | EfiLegacyMpTableEntryIoIntFlagsTriggerSpec = 0x0,\r | |
190 | EfiLegacyMpTableEntryIoIntFlagsTriggerEdge = 0x1,\r | |
191 | EfiLegacyMpTableEntryIoIntFlagsTriggerReserved = 0x2,\r | |
192 | EfiLegacyMpTableEntryIoIntFlagsTriggerLevel = 0x3,\r | |
193 | } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_TRIGGER;\r | |
194 | \r | |
195 | //\r | |
196 | // Entry Type 4: Local Interrupt Assignment.\r | |
197 | //\r | |
198 | #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_LOCAL_INT 0x04\r | |
199 | typedef struct {\r | |
200 | UINT8 EntryType;\r | |
201 | UINT8 IntType;\r | |
a47c681f | 202 | EFI_LEGACY_MP_TABLE_ENTRY_INT_FLAGS Flags;\r |
8679b1c2 | 203 | UINT8 SourceBusId;\r |
a47c681f | 204 | EFI_LEGACY_MP_TABLE_ENTRY_INT_SOURCE_BUS_IRQ SourceBusIrq;\r |
8679b1c2 LG |
205 | UINT8 DestApicId;\r |
206 | UINT8 DestApicIntIn;\r | |
207 | } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT;\r | |
208 | \r | |
209 | typedef enum {\r | |
210 | EfiLegacyMpTableEntryLocalIntTypeInt = 0,\r | |
211 | EfiLegacyMpTableEntryLocalIntTypeNmi = 1,\r | |
212 | EfiLegacyMpTableEntryLocalIntTypeSmi = 2,\r | |
213 | EfiLegacyMpTableEntryLocalIntTypeExtInt = 3,\r | |
214 | } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_TYPE;\r | |
215 | \r | |
216 | typedef enum {\r | |
217 | EfiLegacyMpTableEntryLocalIntFlagsPolaritySpec = 0x0,\r | |
218 | EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveHigh= 0x1,\r | |
219 | EfiLegacyMpTableEntryLocalIntFlagsPolarityReserved = 0x2,\r | |
220 | EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveLow = 0x3,\r | |
221 | } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_POLARITY;\r | |
222 | \r | |
223 | typedef enum {\r | |
224 | EfiLegacyMpTableEntryLocalIntFlagsTriggerSpec = 0x0,\r | |
225 | EfiLegacyMpTableEntryLocalIntFlagsTriggerEdge = 0x1,\r | |
226 | EfiLegacyMpTableEntryLocalIntFlagsTriggerReserved = 0x2,\r | |
227 | EfiLegacyMpTableEntryLocalIntFlagsTriggerLevel = 0x3,\r | |
228 | } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_TRIGGER;\r | |
229 | \r | |
230 | //\r | |
231 | // Entry Type 128: System Address Space Mapping.\r | |
232 | //\r | |
233 | #define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_SYS_ADDR_SPACE_MAPPING 0x80\r | |
234 | typedef struct {\r | |
235 | UINT8 EntryType;\r | |
236 | UINT8 Length;\r | |
237 | UINT8 BusId;\r | |
238 | UINT8 AddressType;\r | |
239 | UINT64 AddressBase;\r | |
240 | UINT64 AddressLength;\r | |
241 | } EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING;\r | |
242 | \r | |
243 | typedef enum {\r | |
244 | EfiLegacyMpTableEntryExtSysAddrSpaceMappingIo = 0,\r | |
245 | EfiLegacyMpTableEntryExtSysAddrSpaceMappingMemory = 1,\r | |
246 | EfiLegacyMpTableEntryExtSysAddrSpaceMappingPrefetch = 2,\r | |
247 | } EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING_TYPE;\r | |
248 | \r | |
249 | //\r | |
250 | // Entry Type 129: Bus Hierarchy.\r | |
251 | //\r | |
252 | #define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_BUS_HIERARCHY 0x81\r | |
a47c681f ED |
253 | typedef struct {\r |
254 | UINT8 SubtractiveDecode : 1;\r | |
255 | UINT8 Reserved : 7;\r | |
256 | } EFI_LEGACY_MP_TABLE_ENTRY_EXT_BUS_HIERARCHY_BUSINFO;\r | |
257 | \r | |
8679b1c2 LG |
258 | typedef struct {\r |
259 | UINT8 EntryType;\r | |
260 | UINT8 Length;\r | |
261 | UINT8 BusId;\r | |
a47c681f | 262 | EFI_LEGACY_MP_TABLE_ENTRY_EXT_BUS_HIERARCHY_BUSINFO BusInfo;\r |
8679b1c2 LG |
263 | UINT8 ParentBus;\r |
264 | UINT8 Reserved1;\r | |
265 | UINT8 Reserved2;\r | |
266 | UINT8 Reserved3;\r | |
267 | } EFI_LEGACY_MP_TABLE_ENTRY_EXT_BUS_HIERARCHY;\r | |
268 | \r | |
269 | //\r | |
270 | // Entry Type 130: Compatibility Bus Address Space Modifier.\r | |
271 | //\r | |
272 | #define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_COMPAT_BUS_ADDR_SPACE_MODIFIER 0x82\r | |
a47c681f ED |
273 | typedef struct {\r |
274 | UINT8 RangeMode : 1;\r | |
275 | UINT8 Reserved : 7;\r | |
276 | } EFI_LEGACY_MP_TABLE_ENTRY_EXT_COMPAT_BUS_ADDR_SPACE_MODIFIER_ADDR_MODE;\r | |
277 | \r | |
8679b1c2 LG |
278 | typedef struct {\r |
279 | UINT8 EntryType;\r | |
280 | UINT8 Length;\r | |
281 | UINT8 BusId;\r | |
a47c681f | 282 | EFI_LEGACY_MP_TABLE_ENTRY_EXT_COMPAT_BUS_ADDR_SPACE_MODIFIER_ADDR_MODE AddrMode;\r |
8679b1c2 LG |
283 | UINT32 PredefinedRangeList;\r |
284 | } EFI_LEGACY_MP_TABLE_ENTRY_EXT_COMPAT_BUS_ADDR_SPACE_MODIFIER;\r | |
285 | \r | |
286 | #pragma pack()\r | |
287 | \r | |
288 | #endif\r |