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a7ed1e2e | 1 | /** @file\r |
6cd35c62 | 2 | Industry Standard Definitions of SMBIOS Table Specification v3.0.0.\r |
a7ed1e2e | 3 | \r |
6cd35c62 | 4 | Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r |
af2dc6a7 | 5 | This program and the accompanying materials are licensed and made available under \r |
6 | the terms and conditions of the BSD License that accompanies this distribution. \r | |
7 | The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php. \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
a7ed1e2e | 12 | \r |
a7ed1e2e | 13 | **/\r |
14 | \r | |
15 | #ifndef __SMBIOS_STANDARD_H__\r | |
16 | #define __SMBIOS_STANDARD_H__\r | |
98cb9ae8 | 17 | \r |
f2d0889f | 18 | ///\r |
19 | /// Reference SMBIOS 2.6, chapter 3.1.2.\r | |
20 | /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r | |
21 | /// use by this specification.\r | |
22 | ///\r | |
23 | #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r | |
24 | \r | |
7ddba202 SZ |
25 | ///\r |
26 | /// Reference SMBIOS 2.7, chapter 6.1.2.\r | |
27 | /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r | |
28 | /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r | |
29 | /// This number is not used for any other purpose by the SMBIOS specification.\r | |
30 | ///\r | |
31 | #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r | |
32 | \r | |
f2d0889f | 33 | ///\r |
af2dc6a7 | 34 | /// Reference SMBIOS 2.6, chapter 3.1.3.\r |
35 | /// Each text string is limited to 64 significant characters due to system MIF limitations.\r | |
7ddba202 SZ |
36 | /// Reference SMBIOS 2.7, chapter 6.1.3.\r |
37 | /// It will have no limit on the length of each individual text string.\r | |
f2d0889f | 38 | ///\r |
39 | #define SMBIOS_STRING_MAX_LENGTH 64\r | |
40 | \r | |
7254d134 JY |
41 | //\r |
42 | // The length of the entire structure table (including all strings) must be reported\r | |
43 | // in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r | |
44 | // which is a WORD field limited to 65,535 bytes.\r | |
45 | //\r | |
46 | #define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r | |
47 | \r | |
48 | //\r | |
49 | // For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r | |
50 | //\r | |
51 | #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r | |
52 | \r | |
f2d0889f | 53 | ///\r |
54 | /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r | |
55 | /// Upper-level software that interprets the SMBIOS structure-table should bypass an \r | |
56 | /// Inactive structure just like a structure type that the software does not recognize.\r | |
57 | ///\r | |
58 | #define SMBIOS_TYPE_INACTIVE 0x007E \r | |
59 | \r | |
60 | ///\r | |
61 | /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r | |
62 | /// The end-of-table indicator is used in the last physical structure in a table\r | |
63 | ///\r | |
64 | #define SMBIOS_TYPE_END_OF_TABLE 0x007F\r | |
65 | \r | |
4135253b | 66 | ///\r |
af2dc6a7 | 67 | /// Smbios Table Entry Point Structure.\r |
4135253b | 68 | ///\r |
766f4bc1 | 69 | #pragma pack(1)\r |
a7ed1e2e | 70 | typedef struct {\r |
71 | UINT8 AnchorString[4];\r | |
72 | UINT8 EntryPointStructureChecksum;\r | |
73 | UINT8 EntryPointLength;\r | |
74 | UINT8 MajorVersion;\r | |
75 | UINT8 MinorVersion;\r | |
76 | UINT16 MaxStructureSize;\r | |
77 | UINT8 EntryPointRevision;\r | |
78 | UINT8 FormattedArea[5];\r | |
79 | UINT8 IntermediateAnchorString[5];\r | |
80 | UINT8 IntermediateChecksum;\r | |
81 | UINT16 TableLength;\r | |
82 | UINT32 TableAddress;\r | |
83 | UINT16 NumberOfSmbiosStructures;\r | |
84 | UINT8 SmbiosBcdRevision;\r | |
85 | } SMBIOS_TABLE_ENTRY_POINT;\r | |
86 | \r | |
6cd35c62 EL |
87 | typedef struct {\r |
88 | UINT8 AnchorString[5];\r | |
89 | UINT8 EntryPointStructureChecksum;\r | |
90 | UINT8 EntryPointLength;\r | |
91 | UINT8 MajorVersion;\r | |
92 | UINT8 MinorVersion;\r | |
93 | UINT8 DocRev;\r | |
94 | UINT8 EntryPointRevision;\r | |
95 | UINT8 Reserved;\r | |
96 | UINT32 TableMaximumSize;\r | |
97 | UINT64 TableAddress;\r | |
98 | } SMBIOS_TABLE_3_0_ENTRY_POINT;\r | |
99 | \r | |
ec8432e5 | 100 | ///\r |
af2dc6a7 | 101 | /// The Smbios structure header.\r |
ec8432e5 | 102 | ///\r |
a7ed1e2e | 103 | typedef struct {\r |
104 | UINT8 Type;\r | |
105 | UINT8 Length;\r | |
106 | UINT16 Handle;\r | |
107 | } SMBIOS_STRUCTURE;\r | |
108 | \r | |
bf7ea009 | 109 | ///\r |
110 | /// String Number for a Null terminated string, 00h stands for no string available.\r | |
111 | ///\r | |
61ce5861 | 112 | typedef UINT8 SMBIOS_TABLE_STRING;\r |
113 | \r | |
98cb9ae8 | 114 | ///\r |
7ddba202 SZ |
115 | /// BIOS Characteristics\r |
116 | /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r | |
98cb9ae8 | 117 | ///\r |
118 | typedef struct {\r | |
af2dc6a7 | 119 | UINT32 Reserved :2; ///< Bits 0-1.\r |
7ddba202 SZ |
120 | UINT32 Unknown :1;\r |
121 | UINT32 BiosCharacteristicsNotSupported :1;\r | |
122 | UINT32 IsaIsSupported :1;\r | |
98cb9ae8 | 123 | UINT32 McaIsSupported :1;\r |
124 | UINT32 EisaIsSupported :1;\r | |
125 | UINT32 PciIsSupported :1;\r | |
126 | UINT32 PcmciaIsSupported :1;\r | |
127 | UINT32 PlugAndPlayIsSupported :1;\r | |
128 | UINT32 ApmIsSupported :1;\r | |
129 | UINT32 BiosIsUpgradable :1;\r | |
130 | UINT32 BiosShadowingAllowed :1;\r | |
131 | UINT32 VlVesaIsSupported :1;\r | |
132 | UINT32 EscdSupportIsAvailable :1;\r | |
133 | UINT32 BootFromCdIsSupported :1;\r | |
134 | UINT32 SelectableBootIsSupported :1;\r | |
135 | UINT32 RomBiosIsSocketed :1;\r | |
136 | UINT32 BootFromPcmciaIsSupported :1;\r | |
137 | UINT32 EDDSpecificationIsSupported :1;\r | |
138 | UINT32 JapaneseNecFloppyIsSupported :1;\r | |
139 | UINT32 JapaneseToshibaFloppyIsSupported :1;\r | |
140 | UINT32 Floppy525_360IsSupported :1;\r | |
141 | UINT32 Floppy525_12IsSupported :1;\r | |
142 | UINT32 Floppy35_720IsSupported :1;\r | |
143 | UINT32 Floppy35_288IsSupported :1;\r | |
144 | UINT32 PrintScreenIsSupported :1;\r | |
145 | UINT32 Keyboard8042IsSupported :1;\r | |
146 | UINT32 SerialIsSupported :1;\r | |
147 | UINT32 PrinterIsSupported :1;\r | |
148 | UINT32 CgaMonoIsSupported :1;\r | |
149 | UINT32 NecPc98 :1;\r | |
6800ac83 | 150 | UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r |
151 | ///< and bits 48-63 reserved for System Vendor. \r | |
98cb9ae8 | 152 | } MISC_BIOS_CHARACTERISTICS;\r |
153 | \r | |
154 | ///\r | |
7ddba202 SZ |
155 | /// BIOS Characteristics Extension Byte 1.\r |
156 | /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r | |
157 | /// within the BIOS Information structure.\r | |
98cb9ae8 | 158 | ///\r |
159 | typedef struct {\r | |
160 | UINT8 AcpiIsSupported :1;\r | |
7ddba202 SZ |
161 | UINT8 UsbLegacyIsSupported :1;\r |
162 | UINT8 AgpIsSupported :1;\r | |
119c1688 | 163 | UINT8 I2OBootIsSupported :1;\r |
98cb9ae8 | 164 | UINT8 Ls120BootIsSupported :1;\r |
165 | UINT8 AtapiZipDriveBootIsSupported :1;\r | |
166 | UINT8 Boot1394IsSupported :1;\r | |
167 | UINT8 SmartBatteryIsSupported :1;\r | |
168 | } MBCE_BIOS_RESERVED;\r | |
169 | \r | |
170 | ///\r | |
af2dc6a7 | 171 | /// BIOS Characteristics Extension Byte 2.\r |
7ddba202 | 172 | /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r |
98cb9ae8 | 173 | /// within the BIOS Information structure.\r |
174 | ///\r | |
175 | typedef struct {\r | |
176 | UINT8 BiosBootSpecIsSupported :1;\r | |
7ddba202 SZ |
177 | UINT8 FunctionKeyNetworkBootIsSupported :1;\r |
178 | UINT8 TargetContentDistributionEnabled :1;\r | |
179 | UINT8 UefiSpecificationSupported :1;\r | |
180 | UINT8 VirtualMachineSupported :1;\r | |
181 | UINT8 ExtensionByte2Reserved :3;\r | |
98cb9ae8 | 182 | } MBCE_SYSTEM_RESERVED;\r |
183 | \r | |
184 | ///\r | |
af2dc6a7 | 185 | /// BIOS Characteristics Extension Bytes.\r |
98cb9ae8 | 186 | ///\r |
187 | typedef struct {\r | |
188 | MBCE_BIOS_RESERVED BiosReserved;\r | |
189 | MBCE_SYSTEM_RESERVED SystemReserved;\r | |
98cb9ae8 | 190 | } MISC_BIOS_CHARACTERISTICS_EXTENSION;\r |
191 | \r | |
4135253b | 192 | ///\r |
af2dc6a7 | 193 | /// BIOS Information (Type 0).\r |
4135253b | 194 | ///\r |
61ce5861 | 195 | typedef struct {\r |
98cb9ae8 | 196 | SMBIOS_STRUCTURE Hdr;\r |
197 | SMBIOS_TABLE_STRING Vendor;\r | |
198 | SMBIOS_TABLE_STRING BiosVersion;\r | |
199 | UINT16 BiosSegment;\r | |
200 | SMBIOS_TABLE_STRING BiosReleaseDate;\r | |
201 | UINT8 BiosSize;\r | |
202 | MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r | |
203 | UINT8 BIOSCharacteristicsExtensionBytes[2];\r | |
204 | UINT8 SystemBiosMajorRelease;\r | |
205 | UINT8 SystemBiosMinorRelease;\r | |
206 | UINT8 EmbeddedControllerFirmwareMajorRelease;\r | |
207 | UINT8 EmbeddedControllerFirmwareMinorRelease;\r | |
61ce5861 | 208 | } SMBIOS_TABLE_TYPE0;\r |
209 | \r | |
98cb9ae8 | 210 | ///\r |
af2dc6a7 | 211 | /// System Wake-up Type.\r |
98cb9ae8 | 212 | ///\r |
213 | typedef enum { \r | |
214 | SystemWakeupTypeReserved = 0x00,\r | |
215 | SystemWakeupTypeOther = 0x01,\r | |
216 | SystemWakeupTypeUnknown = 0x02,\r | |
217 | SystemWakeupTypeApmTimer = 0x03,\r | |
218 | SystemWakeupTypeModemRing = 0x04,\r | |
219 | SystemWakeupTypeLanRemote = 0x05,\r | |
220 | SystemWakeupTypePowerSwitch = 0x06,\r | |
221 | SystemWakeupTypePciPme = 0x07,\r | |
222 | SystemWakeupTypeAcPowerRestored = 0x08\r | |
223 | } MISC_SYSTEM_WAKEUP_TYPE;\r | |
224 | \r | |
4135253b | 225 | ///\r |
af2dc6a7 | 226 | /// System Information (Type 1).\r |
98cb9ae8 | 227 | /// \r |
228 | /// The information in this structure defines attributes of the overall system and is \r | |
229 | /// intended to be associated with the Component ID group of the system's MIF.\r | |
230 | /// An SMBIOS implementation is associated with a single system instance and contains \r | |
231 | /// one and only one System Information (Type 1) structure.\r | |
4135253b | 232 | ///\r |
61ce5861 | 233 | typedef struct {\r |
98cb9ae8 | 234 | SMBIOS_STRUCTURE Hdr;\r |
235 | SMBIOS_TABLE_STRING Manufacturer;\r | |
236 | SMBIOS_TABLE_STRING ProductName;\r | |
237 | SMBIOS_TABLE_STRING Version;\r | |
238 | SMBIOS_TABLE_STRING SerialNumber;\r | |
239 | GUID Uuid;\r | |
af2dc6a7 | 240 | UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r |
98cb9ae8 | 241 | SMBIOS_TABLE_STRING SKUNumber;\r |
242 | SMBIOS_TABLE_STRING Family;\r | |
61ce5861 | 243 | } SMBIOS_TABLE_TYPE1;\r |
244 | \r | |
98cb9ae8 | 245 | ///\r |
af2dc6a7 | 246 | /// Base Board - Feature Flags. \r |
98cb9ae8 | 247 | ///\r |
248 | typedef struct {\r | |
249 | UINT8 Motherboard :1;\r | |
250 | UINT8 RequiresDaughterCard :1;\r | |
251 | UINT8 Removable :1;\r | |
252 | UINT8 Replaceable :1;\r | |
253 | UINT8 HotSwappable :1;\r | |
254 | UINT8 Reserved :3;\r | |
255 | } BASE_BOARD_FEATURE_FLAGS;\r | |
256 | \r | |
257 | ///\r | |
af2dc6a7 | 258 | /// Base Board - Board Type.\r |
98cb9ae8 | 259 | ///\r |
260 | typedef enum { \r | |
261 | BaseBoardTypeUnknown = 0x1,\r | |
262 | BaseBoardTypeOther = 0x2,\r | |
263 | BaseBoardTypeServerBlade = 0x3,\r | |
264 | BaseBoardTypeConnectivitySwitch = 0x4,\r | |
265 | BaseBoardTypeSystemManagementModule = 0x5,\r | |
266 | BaseBoardTypeProcessorModule = 0x6,\r | |
267 | BaseBoardTypeIOModule = 0x7,\r | |
268 | BaseBoardTypeMemoryModule = 0x8,\r | |
269 | BaseBoardTypeDaughterBoard = 0x9,\r | |
270 | BaseBoardTypeMotherBoard = 0xA,\r | |
271 | BaseBoardTypeProcessorMemoryModule = 0xB,\r | |
272 | BaseBoardTypeProcessorIOModule = 0xC,\r | |
273 | BaseBoardTypeInterconnectBoard = 0xD\r | |
274 | } BASE_BOARD_TYPE;\r | |
275 | \r | |
4135253b | 276 | ///\r |
af2dc6a7 | 277 | /// Base Board (or Module) Information (Type 2).\r |
4135253b | 278 | ///\r |
1f9f8414 | 279 | /// The information in this structure defines attributes of a system baseboard - \r |
98cb9ae8 | 280 | /// for example a motherboard, planar, or server blade or other standard system module.\r |
281 | ///\r | |
61ce5861 | 282 | typedef struct {\r |
98cb9ae8 | 283 | SMBIOS_STRUCTURE Hdr;\r |
284 | SMBIOS_TABLE_STRING Manufacturer;\r | |
285 | SMBIOS_TABLE_STRING ProductName;\r | |
286 | SMBIOS_TABLE_STRING Version;\r | |
287 | SMBIOS_TABLE_STRING SerialNumber;\r | |
288 | SMBIOS_TABLE_STRING AssetTag;\r | |
289 | BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r | |
290 | SMBIOS_TABLE_STRING LocationInChassis;\r | |
291 | UINT16 ChassisHandle;\r | |
af2dc6a7 | 292 | UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r |
98cb9ae8 | 293 | UINT8 NumberOfContainedObjectHandles;\r |
294 | UINT16 ContainedObjectHandles[1];\r | |
61ce5861 | 295 | } SMBIOS_TABLE_TYPE2;\r |
296 | \r | |
98cb9ae8 | 297 | ///\r |
298 | /// System Enclosure or Chassis Types\r | |
299 | ///\r | |
300 | typedef enum { \r | |
301 | MiscChassisTypeOther = 0x01,\r | |
302 | MiscChassisTypeUnknown = 0x02,\r | |
303 | MiscChassisTypeDeskTop = 0x03,\r | |
304 | MiscChassisTypeLowProfileDesktop = 0x04,\r | |
305 | MiscChassisTypePizzaBox = 0x05,\r | |
306 | MiscChassisTypeMiniTower = 0x06,\r | |
307 | MiscChassisTypeTower = 0x07,\r | |
308 | MiscChassisTypePortable = 0x08,\r | |
309 | MiscChassisTypeLapTop = 0x09,\r | |
310 | MiscChassisTypeNotebook = 0x0A,\r | |
311 | MiscChassisTypeHandHeld = 0x0B,\r | |
312 | MiscChassisTypeDockingStation = 0x0C,\r | |
313 | MiscChassisTypeAllInOne = 0x0D,\r | |
314 | MiscChassisTypeSubNotebook = 0x0E,\r | |
315 | MiscChassisTypeSpaceSaving = 0x0F,\r | |
316 | MiscChassisTypeLunchBox = 0x10,\r | |
317 | MiscChassisTypeMainServerChassis = 0x11,\r | |
318 | MiscChassisTypeExpansionChassis = 0x12,\r | |
319 | MiscChassisTypeSubChassis = 0x13,\r | |
320 | MiscChassisTypeBusExpansionChassis = 0x14,\r | |
321 | MiscChassisTypePeripheralChassis = 0x15,\r | |
322 | MiscChassisTypeRaidChassis = 0x16,\r | |
323 | MiscChassisTypeRackMountChassis = 0x17,\r | |
324 | MiscChassisTypeSealedCasePc = 0x18,\r | |
325 | MiscChassisMultiSystemChassis = 0x19,\r | |
326 | MiscChassisCompactPCI = 0x1A,\r | |
327 | MiscChassisAdvancedTCA = 0x1B,\r | |
328 | MiscChassisBlade = 0x1C,\r | |
6cd35c62 EL |
329 | MiscChassisBladeEnclosure = 0x1D,\r |
330 | MiscChassisTablet = 0x1E,\r | |
331 | MiscChassisConvertible = 0x1F,\r | |
332 | MiscChassisDetachable = 0x20\r | |
98cb9ae8 | 333 | } MISC_CHASSIS_TYPE;\r |
334 | \r | |
335 | ///\r | |
af2dc6a7 | 336 | /// System Enclosure or Chassis States .\r |
98cb9ae8 | 337 | ///\r |
338 | typedef enum { \r | |
339 | ChassisStateOther = 0x01,\r | |
340 | ChassisStateUnknown = 0x02,\r | |
341 | ChassisStateSafe = 0x03,\r | |
342 | ChassisStateWarning = 0x04,\r | |
343 | ChassisStateCritical = 0x05,\r | |
344 | ChassisStateNonRecoverable = 0x06\r | |
345 | } MISC_CHASSIS_STATE;\r | |
346 | \r | |
347 | ///\r | |
af2dc6a7 | 348 | /// System Enclosure or Chassis Security Status.\r |
98cb9ae8 | 349 | ///\r |
350 | typedef enum { \r | |
351 | ChassisSecurityStatusOther = 0x01,\r | |
352 | ChassisSecurityStatusUnknown = 0x02,\r | |
353 | ChassisSecurityStatusNone = 0x03,\r | |
354 | ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r | |
355 | ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r | |
356 | } MISC_CHASSIS_SECURITY_STATE;\r | |
357 | \r | |
bf7ea009 | 358 | ///\r |
359 | /// Contained Element record\r | |
360 | ///\r | |
61ce5861 | 361 | typedef struct {\r |
362 | UINT8 ContainedElementType;\r | |
363 | UINT8 ContainedElementMinimum;\r | |
364 | UINT8 ContainedElementMaximum;\r | |
365 | } CONTAINED_ELEMENT;\r | |
366 | \r | |
98cb9ae8 | 367 | \r |
4135253b | 368 | ///\r |
af2dc6a7 | 369 | /// System Enclosure or Chassis (Type 3).\r |
4135253b | 370 | ///\r |
98cb9ae8 | 371 | /// The information in this structure defines attributes of the system's mechanical enclosure(s). \r |
372 | /// For example, if a system included a separate enclosure for its peripheral devices, \r | |
373 | /// two structures would be returned: one for the main, system enclosure and the second for\r | |
374 | /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r | |
375 | /// support the population of the CIM_Chassis class. \r | |
376 | ///\r | |
61ce5861 | 377 | typedef struct {\r |
98cb9ae8 | 378 | SMBIOS_STRUCTURE Hdr;\r |
379 | SMBIOS_TABLE_STRING Manufacturer;\r | |
380 | UINT8 Type;\r | |
381 | SMBIOS_TABLE_STRING Version;\r | |
382 | SMBIOS_TABLE_STRING SerialNumber;\r | |
383 | SMBIOS_TABLE_STRING AssetTag;\r | |
af2dc6a7 | 384 | UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r |
385 | UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r | |
386 | UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r | |
387 | UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r | |
98cb9ae8 | 388 | UINT8 OemDefined[4];\r |
389 | UINT8 Height;\r | |
390 | UINT8 NumberofPowerCords;\r | |
391 | UINT8 ContainedElementCount;\r | |
392 | UINT8 ContainedElementRecordLength;\r | |
393 | CONTAINED_ELEMENT ContainedElements[1];\r | |
61ce5861 | 394 | } SMBIOS_TABLE_TYPE3;\r |
395 | \r | |
98cb9ae8 | 396 | ///\r |
af2dc6a7 | 397 | /// Processor Information - Processor Type.\r |
98cb9ae8 | 398 | ///\r |
399 | typedef enum {\r | |
400 | ProcessorOther = 0x01,\r | |
401 | ProcessorUnknown = 0x02,\r | |
402 | CentralProcessor = 0x03,\r | |
403 | MathProcessor = 0x04,\r | |
404 | DspProcessor = 0x05,\r | |
405 | VideoProcessor = 0x06\r | |
406 | } PROCESSOR_TYPE_DATA;\r | |
407 | \r | |
408 | ///\r | |
af2dc6a7 | 409 | /// Processor Information - Processor Family.\r |
98cb9ae8 | 410 | ///\r |
411 | typedef enum {\r | |
412 | ProcessorFamilyOther = 0x01, \r | |
413 | ProcessorFamilyUnknown = 0x02,\r | |
414 | ProcessorFamily8086 = 0x03, \r | |
415 | ProcessorFamily80286 = 0x04,\r | |
416 | ProcessorFamilyIntel386 = 0x05, \r | |
417 | ProcessorFamilyIntel486 = 0x06,\r | |
418 | ProcessorFamily8087 = 0x07,\r | |
419 | ProcessorFamily80287 = 0x08,\r | |
420 | ProcessorFamily80387 = 0x09, \r | |
421 | ProcessorFamily80487 = 0x0A,\r | |
422 | ProcessorFamilyPentium = 0x0B, \r | |
423 | ProcessorFamilyPentiumPro = 0x0C,\r | |
424 | ProcessorFamilyPentiumII = 0x0D,\r | |
425 | ProcessorFamilyPentiumMMX = 0x0E,\r | |
426 | ProcessorFamilyCeleron = 0x0F,\r | |
427 | ProcessorFamilyPentiumIIXeon = 0x10,\r | |
428 | ProcessorFamilyPentiumIII = 0x11, \r | |
429 | ProcessorFamilyM1 = 0x12,\r | |
430 | ProcessorFamilyM2 = 0x13,\r | |
119c1688 SZ |
431 | ProcessorFamilyIntelCeleronM = 0x14,\r |
432 | ProcessorFamilyIntelPentium4Ht = 0x15,\r | |
98cb9ae8 | 433 | ProcessorFamilyAmdDuron = 0x18,\r |
434 | ProcessorFamilyK5 = 0x19, \r | |
435 | ProcessorFamilyK6 = 0x1A,\r | |
436 | ProcessorFamilyK6_2 = 0x1B,\r | |
437 | ProcessorFamilyK6_3 = 0x1C,\r | |
438 | ProcessorFamilyAmdAthlon = 0x1D,\r | |
439 | ProcessorFamilyAmd29000 = 0x1E,\r | |
440 | ProcessorFamilyK6_2Plus = 0x1F,\r | |
441 | ProcessorFamilyPowerPC = 0x20,\r | |
442 | ProcessorFamilyPowerPC601 = 0x21,\r | |
443 | ProcessorFamilyPowerPC603 = 0x22,\r | |
444 | ProcessorFamilyPowerPC603Plus = 0x23,\r | |
445 | ProcessorFamilyPowerPC604 = 0x24,\r | |
446 | ProcessorFamilyPowerPC620 = 0x25,\r | |
447 | ProcessorFamilyPowerPCx704 = 0x26,\r | |
448 | ProcessorFamilyPowerPC750 = 0x27,\r | |
3507ab19 | 449 | ProcessorFamilyIntelCoreDuo = 0x28,\r |
450 | ProcessorFamilyIntelCoreDuoMobile = 0x29,\r | |
451 | ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r | |
452 | ProcessorFamilyIntelAtom = 0x2B,\r | |
6cd35c62 | 453 | ProcessorFamilyIntelCoreM = 0x2C,\r |
4a228334 | 454 | ProcessorFamilyAlpha = 0x30,\r |
98cb9ae8 | 455 | ProcessorFamilyAlpha21064 = 0x31,\r |
456 | ProcessorFamilyAlpha21066 = 0x32,\r | |
457 | ProcessorFamilyAlpha21164 = 0x33,\r | |
458 | ProcessorFamilyAlpha21164PC = 0x34,\r | |
459 | ProcessorFamilyAlpha21164a = 0x35,\r | |
460 | ProcessorFamilyAlpha21264 = 0x36,\r | |
461 | ProcessorFamilyAlpha21364 = 0x37,\r | |
7ddba202 SZ |
462 | ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r |
463 | ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r | |
464 | ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r | |
465 | ProcessorFamilyAmdOpteron6100Series = 0x3B,\r | |
466 | ProcessorFamilyAmdOpteron4100Series = 0x3C,\r | |
467 | ProcessorFamilyAmdOpteron6200Series = 0x3D,\r | |
468 | ProcessorFamilyAmdOpteron4200Series = 0x3E,\r | |
4a228334 | 469 | ProcessorFamilyAmdFxSeries = 0x3F,\r |
98cb9ae8 | 470 | ProcessorFamilyMips = 0x40,\r |
471 | ProcessorFamilyMIPSR4000 = 0x41,\r | |
472 | ProcessorFamilyMIPSR4200 = 0x42,\r | |
473 | ProcessorFamilyMIPSR4400 = 0x43,\r | |
474 | ProcessorFamilyMIPSR4600 = 0x44,\r | |
475 | ProcessorFamilyMIPSR10000 = 0x45,\r | |
7ddba202 SZ |
476 | ProcessorFamilyAmdCSeries = 0x46,\r |
477 | ProcessorFamilyAmdESeries = 0x47,\r | |
4a228334 | 478 | ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r |
7ddba202 | 479 | ProcessorFamilyAmdGSeries = 0x49,\r |
4a228334 EL |
480 | ProcessorFamilyAmdZSeries = 0x4A,\r |
481 | ProcessorFamilyAmdRSeries = 0x4B,\r | |
482 | ProcessorFamilyAmdOpteron4300 = 0x4C,\r | |
483 | ProcessorFamilyAmdOpteron6300 = 0x4D,\r | |
484 | ProcessorFamilyAmdOpteron3300 = 0x4E,\r | |
485 | ProcessorFamilyAmdFireProSeries = 0x4F,\r | |
98cb9ae8 | 486 | ProcessorFamilySparc = 0x50,\r |
487 | ProcessorFamilySuperSparc = 0x51,\r | |
488 | ProcessorFamilymicroSparcII = 0x52,\r | |
489 | ProcessorFamilymicroSparcIIep = 0x53,\r | |
490 | ProcessorFamilyUltraSparc = 0x54,\r | |
491 | ProcessorFamilyUltraSparcII = 0x55,\r | |
4a228334 | 492 | ProcessorFamilyUltraSparcIii = 0x56,\r |
98cb9ae8 | 493 | ProcessorFamilyUltraSparcIII = 0x57,\r |
494 | ProcessorFamilyUltraSparcIIIi = 0x58,\r | |
495 | ProcessorFamily68040 = 0x60,\r | |
496 | ProcessorFamily68xxx = 0x61,\r | |
497 | ProcessorFamily68000 = 0x62,\r | |
498 | ProcessorFamily68010 = 0x63,\r | |
499 | ProcessorFamily68020 = 0x64,\r | |
500 | ProcessorFamily68030 = 0x65,\r | |
6cd35c62 EL |
501 | ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r |
502 | ProcessorFamilyAmdOpteronX1000Series = 0x67,\r | |
503 | ProcessorFamilyAmdOpteronX2000Series = 0x68,\r | |
98cb9ae8 | 504 | ProcessorFamilyHobbit = 0x70,\r |
505 | ProcessorFamilyCrusoeTM5000 = 0x78,\r | |
506 | ProcessorFamilyCrusoeTM3000 = 0x79,\r | |
507 | ProcessorFamilyEfficeonTM8000 = 0x7A,\r | |
508 | ProcessorFamilyWeitek = 0x80,\r | |
509 | ProcessorFamilyItanium = 0x82,\r | |
510 | ProcessorFamilyAmdAthlon64 = 0x83,\r | |
511 | ProcessorFamilyAmdOpteron = 0x84,\r | |
512 | ProcessorFamilyAmdSempron = 0x85,\r | |
513 | ProcessorFamilyAmdTurion64Mobile = 0x86,\r | |
514 | ProcessorFamilyDualCoreAmdOpteron = 0x87,\r | |
515 | ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r | |
516 | ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r | |
3507ab19 | 517 | ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r |
518 | ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r | |
519 | ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r | |
520 | ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r | |
521 | ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r | |
522 | ProcessorFamilyAmdAthlonX2DualCore = 0x8F, \r | |
98cb9ae8 | 523 | ProcessorFamilyPARISC = 0x90,\r |
524 | ProcessorFamilyPaRisc8500 = 0x91,\r | |
525 | ProcessorFamilyPaRisc8000 = 0x92,\r | |
526 | ProcessorFamilyPaRisc7300LC = 0x93,\r | |
527 | ProcessorFamilyPaRisc7200 = 0x94,\r | |
528 | ProcessorFamilyPaRisc7100LC = 0x95,\r | |
529 | ProcessorFamilyPaRisc7100 = 0x96,\r | |
530 | ProcessorFamilyV30 = 0xA0,\r | |
3507ab19 | 531 | ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r |
532 | ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r | |
533 | ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r | |
534 | ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r | |
535 | ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r | |
536 | ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r | |
537 | ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r | |
538 | ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r | |
539 | ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r | |
540 | ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r | |
541 | ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r | |
542 | ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r | |
543 | ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r | |
544 | ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r | |
545 | ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r | |
98cb9ae8 | 546 | ProcessorFamilyPentiumIIIXeon = 0xB0,\r |
547 | ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r | |
548 | ProcessorFamilyPentium4 = 0xB2,\r | |
549 | ProcessorFamilyIntelXeon = 0xB3,\r | |
550 | ProcessorFamilyAS400 = 0xB4,\r | |
551 | ProcessorFamilyIntelXeonMP = 0xB5,\r | |
552 | ProcessorFamilyAMDAthlonXP = 0xB6,\r | |
553 | ProcessorFamilyAMDAthlonMP = 0xB7,\r | |
554 | ProcessorFamilyIntelItanium2 = 0xB8,\r | |
555 | ProcessorFamilyIntelPentiumM = 0xB9,\r | |
556 | ProcessorFamilyIntelCeleronD = 0xBA,\r | |
557 | ProcessorFamilyIntelPentiumD = 0xBB,\r | |
558 | ProcessorFamilyIntelPentiumEx = 0xBC,\r | |
4a228334 | 559 | ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r |
98cb9ae8 | 560 | ProcessorFamilyReserved = 0xBE,\r |
561 | ProcessorFamilyIntelCore2 = 0xBF,\r | |
3507ab19 | 562 | ProcessorFamilyIntelCore2Solo = 0xC0,\r |
563 | ProcessorFamilyIntelCore2Extreme = 0xC1,\r | |
564 | ProcessorFamilyIntelCore2Quad = 0xC2,\r | |
565 | ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r | |
566 | ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r | |
567 | ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r | |
568 | ProcessorFamilyIntelCoreI7 = 0xC6,\r | |
569 | ProcessorFamilyDualCoreIntelCeleron = 0xC7, \r | |
98cb9ae8 | 570 | ProcessorFamilyIBM390 = 0xC8,\r |
571 | ProcessorFamilyG4 = 0xC9,\r | |
572 | ProcessorFamilyG5 = 0xCA,\r | |
573 | ProcessorFamilyG6 = 0xCB,\r | |
4a228334 | 574 | ProcessorFamilyzArchitecture = 0xCC,\r |
7ddba202 SZ |
575 | ProcessorFamilyIntelCoreI5 = 0xCD,\r |
576 | ProcessorFamilyIntelCoreI3 = 0xCE,\r | |
98cb9ae8 | 577 | ProcessorFamilyViaC7M = 0xD2,\r |
578 | ProcessorFamilyViaC7D = 0xD3,\r | |
579 | ProcessorFamilyViaC7 = 0xD4,\r | |
580 | ProcessorFamilyViaEden = 0xD5,\r | |
3507ab19 | 581 | ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r |
582 | ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r | |
583 | ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r | |
7ddba202 | 584 | ProcessorFamilyViaNano = 0xD9,\r |
3507ab19 | 585 | ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r |
586 | ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r | |
587 | ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r | |
588 | ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r | |
589 | ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r | |
7ddba202 | 590 | ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r |
4a228334 EL |
591 | ProcessorFamilyAmdOpteron3000Series = 0xE4,\r |
592 | ProcessorFamilyAmdSempronII = 0xE5,\r | |
3507ab19 | 593 | ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r |
594 | ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r | |
595 | ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r | |
596 | ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r | |
597 | ProcessorFamilyAmdAthlonDualCore = 0xEA,\r | |
598 | ProcessorFamilyAmdSempronSI = 0xEB,\r | |
7ddba202 SZ |
599 | ProcessorFamilyAmdPhenomII = 0xEC,\r |
600 | ProcessorFamilyAmdAthlonII = 0xED,\r | |
601 | ProcessorFamilySixCoreAmdOpteron = 0xEE,\r | |
602 | ProcessorFamilyAmdSempronM = 0xEF,\r | |
98cb9ae8 | 603 | ProcessorFamilyi860 = 0xFA,\r |
604 | ProcessorFamilyi960 = 0xFB,\r | |
605 | ProcessorFamilyIndicatorFamily2 = 0xFE,\r | |
606 | ProcessorFamilyReserved1 = 0xFF\r | |
607 | } PROCESSOR_FAMILY_DATA;\r | |
608 | \r | |
f9ed6c93 YL |
609 | ///\r |
610 | /// Processor Information2 - Processor Family2.\r | |
611 | ///\r | |
612 | typedef enum {\r | |
613 | ProcessorFamilySH3 = 0x0104,\r | |
614 | ProcessorFamilySH4 = 0x0105,\r | |
615 | ProcessorFamilyARM = 0x0118,\r | |
616 | ProcessorFamilyStrongARM = 0x0119,\r | |
617 | ProcessorFamily6x86 = 0x012C,\r | |
618 | ProcessorFamilyMediaGX = 0x012D,\r | |
619 | ProcessorFamilyMII = 0x012E,\r | |
620 | ProcessorFamilyWinChip = 0x0140,\r | |
621 | ProcessorFamilyDSP = 0x015E,\r | |
622 | ProcessorFamilyVideoProcessor = 0x01F4\r | |
623 | } PROCESSOR_FAMILY2_DATA;\r | |
624 | \r | |
98cb9ae8 | 625 | ///\r |
af2dc6a7 | 626 | /// Processor Information - Voltage. \r |
98cb9ae8 | 627 | ///\r |
628 | typedef struct {\r | |
6800ac83 | 629 | UINT8 ProcessorVoltageCapability5V :1; \r |
630 | UINT8 ProcessorVoltageCapability3_3V :1; \r | |
631 | UINT8 ProcessorVoltageCapability2_9V :1; \r | |
632 | UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r | |
633 | UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r | |
634 | UINT8 ProcessorVoltageIndicateLegacy :1;\r | |
98cb9ae8 | 635 | } PROCESSOR_VOLTAGE;\r |
636 | \r | |
637 | ///\r | |
af2dc6a7 | 638 | /// Processor Information - Processor Upgrade.\r |
98cb9ae8 | 639 | ///\r |
640 | typedef enum {\r | |
641 | ProcessorUpgradeOther = 0x01,\r | |
642 | ProcessorUpgradeUnknown = 0x02,\r | |
643 | ProcessorUpgradeDaughterBoard = 0x03,\r | |
644 | ProcessorUpgradeZIFSocket = 0x04,\r | |
af2dc6a7 | 645 | ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r |
98cb9ae8 | 646 | ProcessorUpgradeNone = 0x06,\r |
647 | ProcessorUpgradeLIFSocket = 0x07,\r | |
648 | ProcessorUpgradeSlot1 = 0x08,\r | |
649 | ProcessorUpgradeSlot2 = 0x09,\r | |
650 | ProcessorUpgrade370PinSocket = 0x0A,\r | |
651 | ProcessorUpgradeSlotA = 0x0B,\r | |
652 | ProcessorUpgradeSlotM = 0x0C,\r | |
653 | ProcessorUpgradeSocket423 = 0x0D,\r | |
af2dc6a7 | 654 | ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r |
98cb9ae8 | 655 | ProcessorUpgradeSocket478 = 0x0F,\r |
656 | ProcessorUpgradeSocket754 = 0x10,\r | |
657 | ProcessorUpgradeSocket940 = 0x11,\r | |
658 | ProcessorUpgradeSocket939 = 0x12,\r | |
659 | ProcessorUpgradeSocketmPGA604 = 0x13,\r | |
660 | ProcessorUpgradeSocketLGA771 = 0x14,\r | |
661 | ProcessorUpgradeSocketLGA775 = 0x15,\r | |
662 | ProcessorUpgradeSocketS1 = 0x16,\r | |
663 | ProcessorUpgradeAM2 = 0x17,\r | |
3507ab19 | 664 | ProcessorUpgradeF1207 = 0x18,\r |
7ddba202 SZ |
665 | ProcessorSocketLGA1366 = 0x19,\r |
666 | ProcessorUpgradeSocketG34 = 0x1A,\r | |
667 | ProcessorUpgradeSocketAM3 = 0x1B,\r | |
668 | ProcessorUpgradeSocketC32 = 0x1C,\r | |
669 | ProcessorUpgradeSocketLGA1156 = 0x1D,\r | |
670 | ProcessorUpgradeSocketLGA1567 = 0x1E,\r | |
671 | ProcessorUpgradeSocketPGA988A = 0x1F,\r | |
672 | ProcessorUpgradeSocketBGA1288 = 0x20,\r | |
673 | ProcessorUpgradeSocketrPGA988B = 0x21,\r | |
674 | ProcessorUpgradeSocketBGA1023 = 0x22,\r | |
675 | ProcessorUpgradeSocketBGA1224 = 0x23,\r | |
4a228334 | 676 | ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r |
7ddba202 SZ |
677 | ProcessorUpgradeSocketLGA1356 = 0x25,\r |
678 | ProcessorUpgradeSocketLGA2011 = 0x26,\r | |
679 | ProcessorUpgradeSocketFS1 = 0x27,\r | |
680 | ProcessorUpgradeSocketFS2 = 0x28,\r | |
681 | ProcessorUpgradeSocketFM1 = 0x29,\r | |
4a228334 EL |
682 | ProcessorUpgradeSocketFM2 = 0x2A,\r |
683 | ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r | |
6cd35c62 EL |
684 | ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r |
685 | ProcessorUpgradeSocketLGA1150 = 0x2D,\r | |
686 | ProcessorUpgradeSocketBGA1168 = 0x2E,\r | |
687 | ProcessorUpgradeSocketBGA1234 = 0x2F,\r | |
688 | ProcessorUpgradeSocketBGA1364 = 0x30\r | |
98cb9ae8 | 689 | } PROCESSOR_UPGRADE;\r |
690 | \r | |
691 | ///\r | |
692 | /// Processor ID Field Description\r | |
693 | ///\r | |
694 | typedef struct {\r | |
695 | UINT32 ProcessorSteppingId:4;\r | |
696 | UINT32 ProcessorModel: 4;\r | |
697 | UINT32 ProcessorFamily: 4;\r | |
698 | UINT32 ProcessorType: 2;\r | |
699 | UINT32 ProcessorReserved1: 2;\r | |
700 | UINT32 ProcessorXModel: 4;\r | |
701 | UINT32 ProcessorXFamily: 8;\r | |
702 | UINT32 ProcessorReserved2: 4;\r | |
703 | } PROCESSOR_SIGNATURE;\r | |
704 | \r | |
98cb9ae8 | 705 | typedef struct {\r |
706 | UINT32 ProcessorFpu :1;\r | |
707 | UINT32 ProcessorVme :1;\r | |
708 | UINT32 ProcessorDe :1;\r | |
709 | UINT32 ProcessorPse :1;\r | |
710 | UINT32 ProcessorTsc :1;\r | |
711 | UINT32 ProcessorMsr :1;\r | |
712 | UINT32 ProcessorPae :1;\r | |
713 | UINT32 ProcessorMce :1;\r | |
714 | UINT32 ProcessorCx8 :1;\r | |
715 | UINT32 ProcessorApic :1;\r | |
716 | UINT32 ProcessorReserved1 :1;\r | |
717 | UINT32 ProcessorSep :1;\r | |
718 | UINT32 ProcessorMtrr :1;\r | |
719 | UINT32 ProcessorPge :1;\r | |
720 | UINT32 ProcessorMca :1;\r | |
721 | UINT32 ProcessorCmov :1;\r | |
722 | UINT32 ProcessorPat :1;\r | |
723 | UINT32 ProcessorPse36 :1;\r | |
724 | UINT32 ProcessorPsn :1;\r | |
725 | UINT32 ProcessorClfsh :1;\r | |
726 | UINT32 ProcessorReserved2 :1;\r | |
727 | UINT32 ProcessorDs :1;\r | |
728 | UINT32 ProcessorAcpi :1;\r | |
729 | UINT32 ProcessorMmx :1;\r | |
730 | UINT32 ProcessorFxsr :1;\r | |
731 | UINT32 ProcessorSse :1;\r | |
732 | UINT32 ProcessorSse2 :1;\r | |
733 | UINT32 ProcessorSs :1;\r | |
734 | UINT32 ProcessorReserved3 :1;\r | |
735 | UINT32 ProcessorTm :1;\r | |
736 | UINT32 ProcessorReserved4 :2;\r | |
737 | } PROCESSOR_FEATURE_FLAGS;\r | |
738 | \r | |
739 | typedef struct {\r | |
740 | PROCESSOR_SIGNATURE Signature;\r | |
98cb9ae8 | 741 | PROCESSOR_FEATURE_FLAGS FeatureFlags;\r |
6800ac83 | 742 | } PROCESSOR_ID_DATA;\r |
98cb9ae8 | 743 | \r |
4135253b | 744 | ///\r |
af2dc6a7 | 745 | /// Processor Information (Type 4).\r |
4135253b | 746 | ///\r |
98cb9ae8 | 747 | /// The information in this structure defines the attributes of a single processor; \r |
748 | /// a separate structure instance is provided for each system processor socket/slot. \r | |
749 | /// For example, a system with an IntelDX2 processor would have a single \r | |
af2dc6a7 | 750 | /// structure instance, while a system with an IntelSX2 processor would have a structure\r |
751 | /// to describe the main CPU, and a second structure to describe the 80487 co-processor. \r | |
98cb9ae8 | 752 | ///\r |
61ce5861 | 753 | typedef struct { \r |
754 | SMBIOS_STRUCTURE Hdr;\r | |
2d5e30ef | 755 | SMBIOS_TABLE_STRING Socket;\r |
af2dc6a7 | 756 | UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r |
757 | UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r | |
61ce5861 | 758 | SMBIOS_TABLE_STRING ProcessorManufacture;\r |
98cb9ae8 | 759 | PROCESSOR_ID_DATA ProcessorId;\r |
61ce5861 | 760 | SMBIOS_TABLE_STRING ProcessorVersion;\r |
98cb9ae8 | 761 | PROCESSOR_VOLTAGE Voltage;\r |
61ce5861 | 762 | UINT16 ExternalClock;\r |
763 | UINT16 MaxSpeed;\r | |
764 | UINT16 CurrentSpeed;\r | |
765 | UINT8 Status;\r | |
af2dc6a7 | 766 | UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r |
61ce5861 | 767 | UINT16 L1CacheHandle;\r |
768 | UINT16 L2CacheHandle;\r | |
769 | UINT16 L3CacheHandle;\r | |
770 | SMBIOS_TABLE_STRING SerialNumber;\r | |
771 | SMBIOS_TABLE_STRING AssetTag;\r | |
772 | SMBIOS_TABLE_STRING PartNumber;\r | |
773 | //\r | |
774 | // Add for smbios 2.5\r | |
775 | //\r | |
776 | UINT8 CoreCount;\r | |
777 | UINT8 EnabledCoreCount;\r | |
778 | UINT8 ThreadCount;\r | |
779 | UINT16 ProcessorCharacteristics;\r | |
780 | //\r | |
781 | // Add for smbios 2.6\r | |
782 | //\r | |
783 | UINT16 ProcessorFamily2;\r | |
6cd35c62 EL |
784 | //\r |
785 | // Add for smbios 3.0\r | |
786 | //\r | |
787 | UINT16 CoreCount2;\r | |
788 | UINT16 EnabledCoreCount2;\r | |
789 | UINT16 ThreadCount2;\r | |
61ce5861 | 790 | } SMBIOS_TABLE_TYPE4;\r |
791 | \r | |
98cb9ae8 | 792 | ///\r |
af2dc6a7 | 793 | /// Memory Controller Error Detecting Method.\r |
98cb9ae8 | 794 | ///\r |
795 | typedef enum { \r | |
796 | ErrorDetectingMethodOther = 0x01,\r | |
797 | ErrorDetectingMethodUnknown = 0x02,\r | |
798 | ErrorDetectingMethodNone = 0x03,\r | |
799 | ErrorDetectingMethodParity = 0x04,\r | |
800 | ErrorDetectingMethod32Ecc = 0x05,\r | |
801 | ErrorDetectingMethod64Ecc = 0x06,\r | |
802 | ErrorDetectingMethod128Ecc = 0x07,\r | |
803 | ErrorDetectingMethodCrc = 0x08\r | |
804 | } MEMORY_ERROR_DETECT_METHOD;\r | |
805 | \r | |
806 | ///\r | |
af2dc6a7 | 807 | /// Memory Controller Error Correcting Capability.\r |
98cb9ae8 | 808 | ///\r |
809 | typedef struct {\r | |
810 | UINT8 Other :1;\r | |
811 | UINT8 Unknown :1;\r | |
812 | UINT8 None :1;\r | |
813 | UINT8 SingleBitErrorCorrect :1;\r | |
814 | UINT8 DoubleBitErrorCorrect :1;\r | |
815 | UINT8 ErrorScrubbing :1;\r | |
816 | UINT8 Reserved :2;\r | |
817 | } MEMORY_ERROR_CORRECT_CAPABILITY;\r | |
818 | \r | |
819 | ///\r | |
af2dc6a7 | 820 | /// Memory Controller Information - Interleave Support.\r |
98cb9ae8 | 821 | ///\r |
822 | typedef enum { \r | |
823 | MemoryInterleaveOther = 0x01,\r | |
824 | MemoryInterleaveUnknown = 0x02,\r | |
825 | MemoryInterleaveOneWay = 0x03,\r | |
826 | MemoryInterleaveTwoWay = 0x04,\r | |
827 | MemoryInterleaveFourWay = 0x05,\r | |
828 | MemoryInterleaveEightWay = 0x06,\r | |
829 | MemoryInterleaveSixteenWay = 0x07\r | |
830 | } MEMORY_SUPPORT_INTERLEAVE_TYPE;\r | |
831 | \r | |
832 | ///\r | |
af2dc6a7 | 833 | /// Memory Controller Information - Memory Speeds.\r |
98cb9ae8 | 834 | ///\r |
835 | typedef struct {\r | |
836 | UINT16 Other :1;\r | |
837 | UINT16 Unknown :1;\r | |
838 | UINT16 SeventyNs:1;\r | |
839 | UINT16 SixtyNs :1;\r | |
840 | UINT16 FiftyNs :1;\r | |
841 | UINT16 Reserved :11;\r | |
842 | } MEMORY_SPEED_TYPE;\r | |
843 | \r | |
4135253b | 844 | ///\r |
af2dc6a7 | 845 | /// Memory Controller Information (Type 5, Obsolete).\r |
4135253b | 846 | ///\r |
98cb9ae8 | 847 | /// The information in this structure defines the attributes of the system's memory controller(s) \r |
848 | /// and the supported attributes of any memory-modules present in the sockets controlled by \r | |
849 | /// this controller. \r | |
850 | /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r | |
af2dc6a7 | 851 | /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r |
98cb9ae8 | 852 | /// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r |
853 | /// choose to implement both memory description types to allow existing DMI browsers\r | |
854 | /// to properly display the system's memory attributes.\r | |
855 | ///\r | |
61ce5861 | 856 | typedef struct {\r |
98cb9ae8 | 857 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 858 | UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r |
98cb9ae8 | 859 | MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r |
af2dc6a7 | 860 | UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r |
861 | UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE . \r | |
98cb9ae8 | 862 | UINT8 MaxMemoryModuleSize;\r |
863 | MEMORY_SPEED_TYPE SupportSpeed;\r | |
864 | UINT16 SupportMemoryType;\r | |
865 | UINT8 MemoryModuleVoltage;\r | |
866 | UINT8 AssociatedMemorySlotNum;\r | |
867 | UINT16 MemoryModuleConfigHandles[1];\r | |
61ce5861 | 868 | } SMBIOS_TABLE_TYPE5;\r |
869 | \r | |
98cb9ae8 | 870 | ///\r |
871 | /// Memory Module Information - Memory Types\r | |
872 | ///\r | |
873 | typedef struct {\r | |
874 | UINT16 Other :1;\r | |
875 | UINT16 Unknown :1;\r | |
876 | UINT16 Standard :1;\r | |
877 | UINT16 FastPageMode:1;\r | |
b4ab47ec | 878 | UINT16 Edo :1;\r |
98cb9ae8 | 879 | UINT16 Parity :1;\r |
b4ab47ec | 880 | UINT16 Ecc :1;\r |
881 | UINT16 Simm :1;\r | |
882 | UINT16 Dimm :1;\r | |
98cb9ae8 | 883 | UINT16 BurstEdo :1;\r |
b4ab47ec | 884 | UINT16 Sdram :1;\r |
98cb9ae8 | 885 | UINT16 Reserved :5;\r |
886 | } MEMORY_CURRENT_TYPE;\r | |
887 | \r | |
888 | ///\r | |
af2dc6a7 | 889 | /// Memory Module Information - Memory Size.\r |
98cb9ae8 | 890 | ///\r |
891 | typedef struct {\r | |
6800ac83 | 892 | UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r |
98cb9ae8 | 893 | UINT8 SingleOrDoubleBank :1;\r |
894 | } MEMORY_INSTALLED_ENABLED_SIZE;\r | |
895 | \r | |
4135253b | 896 | ///\r |
897 | /// Memory Module Information (Type 6, Obsolete)\r | |
898 | ///\r | |
98cb9ae8 | 899 | /// One Memory Module Information structure is included for each memory-module socket \r |
900 | /// in the system. The structure describes the speed, type, size, and error status\r | |
901 | /// of each system memory module. The supported attributes of each module are described \r | |
902 | /// by the "owning" Memory Controller Information structure. \r | |
903 | /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r | |
af2dc6a7 | 904 | /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r |
98cb9ae8 | 905 | /// and Memory Device (Type 17) structures should be used instead.\r |
906 | ///\r | |
61ce5861 | 907 | typedef struct {\r |
98cb9ae8 | 908 | SMBIOS_STRUCTURE Hdr;\r |
909 | SMBIOS_TABLE_STRING SocketDesignation;\r | |
910 | UINT8 BankConnections;\r | |
911 | UINT8 CurrentSpeed;\r | |
912 | MEMORY_CURRENT_TYPE CurrentMemoryType;\r | |
913 | MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r | |
914 | MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r | |
915 | UINT8 ErrorStatus;\r | |
61ce5861 | 916 | } SMBIOS_TABLE_TYPE6;\r |
917 | \r | |
98cb9ae8 | 918 | ///\r |
af2dc6a7 | 919 | /// Cache Information - SRAM Type.\r |
98cb9ae8 | 920 | ///\r |
921 | typedef struct {\r | |
922 | UINT16 Other :1;\r | |
923 | UINT16 Unknown :1;\r | |
924 | UINT16 NonBurst :1;\r | |
925 | UINT16 Burst :1;\r | |
926 | UINT16 PipelineBurst :1;\r | |
98cb9ae8 | 927 | UINT16 Synchronous :1;\r |
53d90f04 | 928 | UINT16 Asynchronous :1;\r |
98cb9ae8 | 929 | UINT16 Reserved :9;\r |
930 | } CACHE_SRAM_TYPE_DATA;\r | |
931 | \r | |
932 | ///\r | |
af2dc6a7 | 933 | /// Cache Information - Error Correction Type.\r |
98cb9ae8 | 934 | ///\r |
935 | typedef enum {\r | |
936 | CacheErrorOther = 0x01,\r | |
937 | CacheErrorUnknown = 0x02,\r | |
938 | CacheErrorNone = 0x03,\r | |
939 | CacheErrorParity = 0x04,\r | |
6800ac83 | 940 | CacheErrorSingleBit = 0x05, ///< ECC\r |
941 | CacheErrorMultiBit = 0x06 ///< ECC\r | |
98cb9ae8 | 942 | } CACHE_ERROR_TYPE_DATA;\r |
943 | \r | |
944 | ///\r | |
af2dc6a7 | 945 | /// Cache Information - System Cache Type. \r |
98cb9ae8 | 946 | ///\r |
947 | typedef enum {\r | |
948 | CacheTypeOther = 0x01,\r | |
949 | CacheTypeUnknown = 0x02,\r | |
950 | CacheTypeInstruction = 0x03,\r | |
951 | CacheTypeData = 0x04,\r | |
952 | CacheTypeUnified = 0x05\r | |
953 | } CACHE_TYPE_DATA;\r | |
954 | \r | |
955 | ///\r | |
af2dc6a7 | 956 | /// Cache Information - Associativity. \r |
98cb9ae8 | 957 | ///\r |
958 | typedef enum {\r | |
959 | CacheAssociativityOther = 0x01,\r | |
960 | CacheAssociativityUnknown = 0x02,\r | |
961 | CacheAssociativityDirectMapped = 0x03,\r | |
962 | CacheAssociativity2Way = 0x04,\r | |
963 | CacheAssociativity4Way = 0x05,\r | |
964 | CacheAssociativityFully = 0x06,\r | |
965 | CacheAssociativity8Way = 0x07,\r | |
966 | CacheAssociativity16Way = 0x08,\r | |
3507ab19 | 967 | CacheAssociativity12Way = 0x09,\r |
968 | CacheAssociativity24Way = 0x0A,\r | |
969 | CacheAssociativity32Way = 0x0B,\r | |
970 | CacheAssociativity48Way = 0x0C,\r | |
7ddba202 SZ |
971 | CacheAssociativity64Way = 0x0D,\r |
972 | CacheAssociativity20Way = 0x0E\r | |
98cb9ae8 | 973 | } CACHE_ASSOCIATIVITY_DATA;\r |
974 | \r | |
4135253b | 975 | ///\r |
af2dc6a7 | 976 | /// Cache Information (Type 7).\r |
4135253b | 977 | ///\r |
af2dc6a7 | 978 | /// The information in this structure defines the attributes of CPU cache device in the system. \r |
98cb9ae8 | 979 | /// One structure is specified for each such device, whether the device is internal to\r |
980 | /// or external to the CPU module. Cache modules can be associated with a processor structure\r | |
af2dc6a7 | 981 | /// in one or two ways, depending on the SMBIOS version.\r |
98cb9ae8 | 982 | ///\r |
61ce5861 | 983 | typedef struct {\r |
98cb9ae8 | 984 | SMBIOS_STRUCTURE Hdr;\r |
985 | SMBIOS_TABLE_STRING SocketDesignation;\r | |
986 | UINT16 CacheConfiguration;\r | |
987 | UINT16 MaximumCacheSize;\r | |
988 | UINT16 InstalledSize;\r | |
989 | CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r | |
990 | CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r | |
991 | UINT8 CacheSpeed;\r | |
af2dc6a7 | 992 | UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r |
993 | UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r | |
994 | UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r | |
61ce5861 | 995 | } SMBIOS_TABLE_TYPE7;\r |
996 | \r | |
98cb9ae8 | 997 | ///\r |
af2dc6a7 | 998 | /// Port Connector Information - Connector Types. \r |
98cb9ae8 | 999 | ///\r |
1000 | typedef enum {\r | |
1001 | PortConnectorTypeNone = 0x00,\r | |
1002 | PortConnectorTypeCentronics = 0x01,\r | |
1003 | PortConnectorTypeMiniCentronics = 0x02,\r | |
1004 | PortConnectorTypeProprietary = 0x03,\r | |
1005 | PortConnectorTypeDB25Male = 0x04,\r | |
1006 | PortConnectorTypeDB25Female = 0x05,\r | |
1007 | PortConnectorTypeDB15Male = 0x06,\r | |
1008 | PortConnectorTypeDB15Female = 0x07,\r | |
1009 | PortConnectorTypeDB9Male = 0x08,\r | |
1010 | PortConnectorTypeDB9Female = 0x09,\r | |
1011 | PortConnectorTypeRJ11 = 0x0A,\r | |
1012 | PortConnectorTypeRJ45 = 0x0B,\r | |
1013 | PortConnectorType50PinMiniScsi = 0x0C,\r | |
1014 | PortConnectorTypeMiniDin = 0x0D,\r | |
119c1688 | 1015 | PortConnectorTypeMicroDin = 0x0E,\r |
98cb9ae8 | 1016 | PortConnectorTypePS2 = 0x0F,\r |
1017 | PortConnectorTypeInfrared = 0x10,\r | |
1018 | PortConnectorTypeHpHil = 0x11,\r | |
1019 | PortConnectorTypeUsb = 0x12,\r | |
1020 | PortConnectorTypeSsaScsi = 0x13,\r | |
1021 | PortConnectorTypeCircularDin8Male = 0x14,\r | |
1022 | PortConnectorTypeCircularDin8Female = 0x15,\r | |
1023 | PortConnectorTypeOnboardIde = 0x16,\r | |
1024 | PortConnectorTypeOnboardFloppy = 0x17,\r | |
1025 | PortConnectorType9PinDualInline = 0x18,\r | |
1026 | PortConnectorType25PinDualInline = 0x19,\r | |
1027 | PortConnectorType50PinDualInline = 0x1A,\r | |
1028 | PortConnectorType68PinDualInline = 0x1B,\r | |
1029 | PortConnectorTypeOnboardSoundInput = 0x1C,\r | |
1030 | PortConnectorTypeMiniCentronicsType14 = 0x1D,\r | |
1031 | PortConnectorTypeMiniCentronicsType26 = 0x1E,\r | |
1032 | PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r | |
1033 | PortConnectorTypeBNC = 0x20,\r | |
1034 | PortConnectorType1394 = 0x21,\r | |
119c1688 | 1035 | PortConnectorTypeSasSata = 0x22,\r |
98cb9ae8 | 1036 | PortConnectorTypePC98 = 0xA0,\r |
1037 | PortConnectorTypePC98Hireso = 0xA1,\r | |
1038 | PortConnectorTypePCH98 = 0xA2,\r | |
1039 | PortConnectorTypePC98Note = 0xA3,\r | |
1040 | PortConnectorTypePC98Full = 0xA4,\r | |
1041 | PortConnectorTypeOther = 0xFF\r | |
1042 | } MISC_PORT_CONNECTOR_TYPE;\r | |
1043 | \r | |
1044 | ///\r | |
1045 | /// Port Connector Information - Port Types \r | |
1046 | ///\r | |
1047 | typedef enum {\r | |
1048 | PortTypeNone = 0x00,\r | |
1049 | PortTypeParallelXtAtCompatible = 0x01,\r | |
1050 | PortTypeParallelPortPs2 = 0x02,\r | |
1051 | PortTypeParallelPortEcp = 0x03,\r | |
1052 | PortTypeParallelPortEpp = 0x04,\r | |
1053 | PortTypeParallelPortEcpEpp = 0x05,\r | |
1054 | PortTypeSerialXtAtCompatible = 0x06,\r | |
1055 | PortTypeSerial16450Compatible = 0x07,\r | |
1056 | PortTypeSerial16550Compatible = 0x08,\r | |
1057 | PortTypeSerial16550ACompatible = 0x09,\r | |
1058 | PortTypeScsi = 0x0A,\r | |
1059 | PortTypeMidi = 0x0B,\r | |
1060 | PortTypeJoyStick = 0x0C,\r | |
1061 | PortTypeKeyboard = 0x0D,\r | |
1062 | PortTypeMouse = 0x0E,\r | |
1063 | PortTypeSsaScsi = 0x0F,\r | |
1064 | PortTypeUsb = 0x10,\r | |
1065 | PortTypeFireWire = 0x11,\r | |
1066 | PortTypePcmciaTypeI = 0x12,\r | |
1067 | PortTypePcmciaTypeII = 0x13,\r | |
1068 | PortTypePcmciaTypeIII = 0x14,\r | |
1069 | PortTypeCardBus = 0x15,\r | |
1070 | PortTypeAccessBusPort = 0x16,\r | |
1071 | PortTypeScsiII = 0x17,\r | |
1072 | PortTypeScsiWide = 0x18,\r | |
1073 | PortTypePC98 = 0x19,\r | |
1074 | PortTypePC98Hireso = 0x1A,\r | |
1075 | PortTypePCH98 = 0x1B,\r | |
1076 | PortTypeVideoPort = 0x1C,\r | |
1077 | PortTypeAudioPort = 0x1D,\r | |
1078 | PortTypeModemPort = 0x1E,\r | |
1079 | PortTypeNetworkPort = 0x1F,\r | |
1080 | PortType8251Compatible = 0xA0,\r | |
1081 | PortType8251FifoCompatible = 0xA1,\r | |
1082 | PortTypeOther = 0xFF\r | |
1083 | } MISC_PORT_TYPE;\r | |
1084 | \r | |
4135253b | 1085 | ///\r |
af2dc6a7 | 1086 | /// Port Connector Information (Type 8).\r |
4135253b | 1087 | ///\r |
98cb9ae8 | 1088 | /// The information in this structure defines the attributes of a system port connector, \r |
1f9f8414 | 1089 | /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r |
98cb9ae8 | 1090 | /// are provided. One structure is present for each port provided by the system.\r |
1091 | ///\r | |
61ce5861 | 1092 | typedef struct {\r |
98cb9ae8 | 1093 | SMBIOS_STRUCTURE Hdr;\r |
1094 | SMBIOS_TABLE_STRING InternalReferenceDesignator;\r | |
af2dc6a7 | 1095 | UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r |
98cb9ae8 | 1096 | SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r |
af2dc6a7 | 1097 | UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r |
1098 | UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r | |
61ce5861 | 1099 | } SMBIOS_TABLE_TYPE8;\r |
1100 | \r | |
98cb9ae8 | 1101 | ///\r |
1102 | /// System Slots - Slot Type\r | |
1103 | ///\r | |
1104 | typedef enum {\r | |
1105 | SlotTypeOther = 0x01,\r | |
1106 | SlotTypeUnknown = 0x02,\r | |
1107 | SlotTypeIsa = 0x03,\r | |
1108 | SlotTypeMca = 0x04,\r | |
1109 | SlotTypeEisa = 0x05,\r | |
1110 | SlotTypePci = 0x06,\r | |
1111 | SlotTypePcmcia = 0x07,\r | |
1112 | SlotTypeVlVesa = 0x08,\r | |
1113 | SlotTypeProprietary = 0x09,\r | |
1114 | SlotTypeProcessorCardSlot = 0x0A,\r | |
1115 | SlotTypeProprietaryMemoryCardSlot = 0x0B,\r | |
1116 | SlotTypeIORiserCardSlot = 0x0C,\r | |
1117 | SlotTypeNuBus = 0x0D,\r | |
1118 | SlotTypePci66MhzCapable = 0x0E,\r | |
1119 | SlotTypeAgp = 0x0F,\r | |
1120 | SlotTypeApg2X = 0x10,\r | |
1121 | SlotTypeAgp4X = 0x11,\r | |
1122 | SlotTypePciX = 0x12,\r | |
0c8cd067 | 1123 | SlotTypeAgp8X = 0x13,\r |
6cd35c62 EL |
1124 | SlotTypeM2Socket1_DP = 0x14,\r |
1125 | SlotTypeM2Socket1_SD = 0x15,\r | |
1126 | SlotTypeM2Socket2 = 0x16,\r | |
1127 | SlotTypeM2Socket3 = 0x17,\r | |
1128 | SlotTypeMxmTypeI = 0x18,\r | |
1129 | SlotTypeMxmTypeII = 0x19,\r | |
1130 | SlotTypeMxmTypeIIIStandard = 0x1A,\r | |
1131 | SlotTypeMxmTypeIIIHe = 0x1B,\r | |
1132 | SlotTypeMxmTypeIV = 0x1C,\r | |
1133 | SlotTypeMxm30TypeA = 0x1D,\r | |
1134 | SlotTypeMxm30TypeB = 0x1E,\r | |
1135 | SlotTypePciExpressGen2Sff_8639 = 0x1F,\r | |
1136 | SlotTypePciExpressGen3Sff_8639 = 0x20,\r | |
98cb9ae8 | 1137 | SlotTypePC98C20 = 0xA0,\r |
1138 | SlotTypePC98C24 = 0xA1,\r | |
1139 | SlotTypePC98E = 0xA2,\r | |
1140 | SlotTypePC98LocalBus = 0xA3,\r | |
1141 | SlotTypePC98Card = 0xA4,\r | |
1142 | SlotTypePciExpress = 0xA5,\r | |
1143 | SlotTypePciExpressX1 = 0xA6,\r | |
1144 | SlotTypePciExpressX2 = 0xA7,\r | |
1145 | SlotTypePciExpressX4 = 0xA8,\r | |
1146 | SlotTypePciExpressX8 = 0xA9,\r | |
3507ab19 | 1147 | SlotTypePciExpressX16 = 0xAA,\r |
1148 | SlotTypePciExpressGen2 = 0xAB,\r | |
1149 | SlotTypePciExpressGen2X1 = 0xAC,\r | |
1150 | SlotTypePciExpressGen2X2 = 0xAD,\r | |
1151 | SlotTypePciExpressGen2X4 = 0xAE,\r | |
1152 | SlotTypePciExpressGen2X8 = 0xAF,\r | |
7ddba202 SZ |
1153 | SlotTypePciExpressGen2X16 = 0xB0,\r |
1154 | SlotTypePciExpressGen3 = 0xB1,\r | |
1155 | SlotTypePciExpressGen3X1 = 0xB2,\r | |
1156 | SlotTypePciExpressGen3X2 = 0xB3,\r | |
1157 | SlotTypePciExpressGen3X4 = 0xB4,\r | |
1158 | SlotTypePciExpressGen3X8 = 0xB5,\r | |
1159 | SlotTypePciExpressGen3X16 = 0xB6\r | |
98cb9ae8 | 1160 | } MISC_SLOT_TYPE;\r |
1161 | \r | |
1162 | ///\r | |
af2dc6a7 | 1163 | /// System Slots - Slot Data Bus Width.\r |
98cb9ae8 | 1164 | ///\r |
1165 | typedef enum {\r | |
1166 | SlotDataBusWidthOther = 0x01,\r | |
1167 | SlotDataBusWidthUnknown = 0x02,\r | |
1168 | SlotDataBusWidth8Bit = 0x03,\r | |
1169 | SlotDataBusWidth16Bit = 0x04,\r | |
1170 | SlotDataBusWidth32Bit = 0x05,\r | |
1171 | SlotDataBusWidth64Bit = 0x06,\r | |
1172 | SlotDataBusWidth128Bit = 0x07,\r | |
6800ac83 | 1173 | SlotDataBusWidth1X = 0x08, ///< Or X1\r |
1174 | SlotDataBusWidth2X = 0x09, ///< Or X2\r | |
1175 | SlotDataBusWidth4X = 0x0A, ///< Or X4\r | |
1176 | SlotDataBusWidth8X = 0x0B, ///< Or X8\r | |
1177 | SlotDataBusWidth12X = 0x0C, ///< Or X12\r | |
1178 | SlotDataBusWidth16X = 0x0D, ///< Or X16\r | |
1179 | SlotDataBusWidth32X = 0x0E ///< Or X32\r | |
98cb9ae8 | 1180 | } MISC_SLOT_DATA_BUS_WIDTH;\r |
1181 | \r | |
1182 | ///\r | |
af2dc6a7 | 1183 | /// System Slots - Current Usage.\r |
98cb9ae8 | 1184 | ///\r |
1185 | typedef enum {\r | |
1186 | SlotUsageOther = 0x01,\r | |
1187 | SlotUsageUnknown = 0x02,\r | |
1188 | SlotUsageAvailable = 0x03,\r | |
1189 | SlotUsageInUse = 0x04\r | |
1190 | } MISC_SLOT_USAGE;\r | |
1191 | \r | |
1192 | ///\r | |
af2dc6a7 | 1193 | /// System Slots - Slot Length. \r |
98cb9ae8 | 1194 | ///\r |
1195 | typedef enum {\r | |
1196 | SlotLengthOther = 0x01,\r | |
1197 | SlotLengthUnknown = 0x02,\r | |
1198 | SlotLengthShort = 0x03,\r | |
1199 | SlotLengthLong = 0x04\r | |
1200 | } MISC_SLOT_LENGTH;\r | |
1201 | \r | |
1202 | ///\r | |
af2dc6a7 | 1203 | /// System Slots - Slot Characteristics 1. \r |
98cb9ae8 | 1204 | ///\r |
1205 | typedef struct {\r | |
1206 | UINT8 CharacteristicsUnknown :1;\r | |
1207 | UINT8 Provides50Volts :1;\r | |
1208 | UINT8 Provides33Volts :1;\r | |
1209 | UINT8 SharedSlot :1;\r | |
1210 | UINT8 PcCard16Supported :1;\r | |
1211 | UINT8 CardBusSupported :1;\r | |
1212 | UINT8 ZoomVideoSupported :1;\r | |
1213 | UINT8 ModemRingResumeSupported:1;\r | |
1214 | } MISC_SLOT_CHARACTERISTICS1;\r | |
1215 | ///\r | |
af2dc6a7 | 1216 | /// System Slots - Slot Characteristics 2. \r |
98cb9ae8 | 1217 | ///\r |
1218 | typedef struct {\r | |
1219 | UINT8 PmeSignalSupported :1;\r | |
1220 | UINT8 HotPlugDevicesSupported :1;\r | |
1221 | UINT8 SmbusSignalSupported :1;\r | |
6800ac83 | 1222 | UINT8 Reserved :5; ///< Set to 0.\r |
98cb9ae8 | 1223 | } MISC_SLOT_CHARACTERISTICS2;\r |
1224 | \r | |
4135253b | 1225 | ///\r |
1226 | /// System Slots (Type 9)\r | |
1227 | ///\r | |
98cb9ae8 | 1228 | /// The information in this structure defines the attributes of a system slot. \r |
1229 | /// One structure is provided for each slot in the system.\r | |
1230 | ///\r | |
1231 | ///\r | |
61ce5861 | 1232 | typedef struct {\r |
98cb9ae8 | 1233 | SMBIOS_STRUCTURE Hdr;\r |
1234 | SMBIOS_TABLE_STRING SlotDesignation;\r | |
af2dc6a7 | 1235 | UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r |
1236 | UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r | |
1237 | UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r | |
1238 | UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r | |
98cb9ae8 | 1239 | UINT16 SlotID;\r |
1240 | MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r | |
1241 | MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r | |
61ce5861 | 1242 | //\r |
1243 | // Add for smbios 2.6\r | |
1244 | //\r | |
98cb9ae8 | 1245 | UINT16 SegmentGroupNum;\r |
1246 | UINT8 BusNum;\r | |
1247 | UINT8 DevFuncNum;\r | |
61ce5861 | 1248 | } SMBIOS_TABLE_TYPE9;\r |
1249 | \r | |
98cb9ae8 | 1250 | ///\r |
af2dc6a7 | 1251 | /// On Board Devices Information - Device Types. \r |
98cb9ae8 | 1252 | ///\r |
1253 | typedef enum {\r | |
1254 | OnBoardDeviceTypeOther = 0x01,\r | |
1255 | OnBoardDeviceTypeUnknown = 0x02,\r | |
1256 | OnBoardDeviceTypeVideo = 0x03,\r | |
1257 | OnBoardDeviceTypeScsiController = 0x04,\r | |
1258 | OnBoardDeviceTypeEthernet = 0x05,\r | |
1259 | OnBoardDeviceTypeTokenRing = 0x06,\r | |
119c1688 SZ |
1260 | OnBoardDeviceTypeSound = 0x07,\r |
1261 | OnBoardDeviceTypePATAController = 0x08,\r | |
1262 | OnBoardDeviceTypeSATAController = 0x09,\r | |
1263 | OnBoardDeviceTypeSASController = 0x0A\r | |
98cb9ae8 | 1264 | } MISC_ONBOARD_DEVICE_TYPE;\r |
1265 | \r | |
bf7ea009 | 1266 | ///\r |
1267 | /// Device Item Entry\r | |
1268 | ///\r | |
61ce5861 | 1269 | typedef struct {\r |
af2dc6a7 | 1270 | UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r |
1271 | ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r | |
98cb9ae8 | 1272 | SMBIOS_TABLE_STRING DescriptionString;\r |
61ce5861 | 1273 | } DEVICE_STRUCT;\r |
1274 | \r | |
4135253b | 1275 | ///\r |
af2dc6a7 | 1276 | /// On Board Devices Information (Type 10, obsolete).\r |
4135253b | 1277 | ///\r |
98cb9ae8 | 1278 | /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r |
1279 | /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r | |
1280 | /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r | |
1281 | /// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r | |
1282 | /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r | |
1283 | /// has some level of control over the enabling of the associated device for use by the system.\r | |
1284 | ///\r | |
61ce5861 | 1285 | typedef struct {\r |
1286 | SMBIOS_STRUCTURE Hdr;\r | |
1287 | DEVICE_STRUCT Device[1];\r | |
1288 | } SMBIOS_TABLE_TYPE10;\r | |
1289 | \r | |
4135253b | 1290 | ///\r |
af2dc6a7 | 1291 | /// OEM Strings (Type 11).\r |
98cb9ae8 | 1292 | /// This structure contains free form strings defined by the OEM. Examples of this are: \r |
1293 | /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r | |
4135253b | 1294 | ///\r |
61ce5861 | 1295 | typedef struct {\r |
1296 | SMBIOS_STRUCTURE Hdr;\r | |
1297 | UINT8 StringCount;\r | |
1298 | } SMBIOS_TABLE_TYPE11;\r | |
1299 | \r | |
4135253b | 1300 | ///\r |
af2dc6a7 | 1301 | /// System Configuration Options (Type 12).\r |
4135253b | 1302 | ///\r |
98cb9ae8 | 1303 | /// This structure contains information required to configure the base board's Jumpers and Switches. \r |
1304 | ///\r | |
61ce5861 | 1305 | typedef struct {\r |
1306 | SMBIOS_STRUCTURE Hdr;\r | |
1307 | UINT8 StringCount;\r | |
1308 | } SMBIOS_TABLE_TYPE12;\r | |
1309 | \r | |
98cb9ae8 | 1310 | \r |
4135253b | 1311 | ///\r |
af2dc6a7 | 1312 | /// BIOS Language Information (Type 13).\r |
4135253b | 1313 | ///\r |
98cb9ae8 | 1314 | /// The information in this structure defines the installable language attributes of the BIOS. \r |
1315 | /// \r | |
61ce5861 | 1316 | typedef struct {\r |
1317 | SMBIOS_STRUCTURE Hdr;\r | |
1318 | UINT8 InstallableLanguages;\r | |
1319 | UINT8 Flags;\r | |
fbfa4a1d | 1320 | UINT8 Reserved[15];\r |
61ce5861 | 1321 | SMBIOS_TABLE_STRING CurrentLanguages;\r |
1322 | } SMBIOS_TABLE_TYPE13;\r | |
1323 | \r | |
119c1688 SZ |
1324 | ///\r |
1325 | /// Group Item Entry\r | |
1326 | ///\r | |
1327 | typedef struct {\r | |
1328 | UINT8 ItemType;\r | |
1329 | UINT16 ItemHandle;\r | |
1330 | } GROUP_STRUCT;\r | |
1331 | \r | |
1332 | ///\r | |
1333 | /// Group Associations (Type 14).\r | |
1334 | ///\r | |
1335 | /// The Group Associations structure is provided for OEMs who want to specify \r | |
1336 | /// the arrangement or hierarchy of certain components (including other Group Associations) \r | |
1337 | /// within the system. \r | |
1338 | ///\r | |
1339 | typedef struct {\r | |
1340 | SMBIOS_STRUCTURE Hdr;\r | |
1341 | SMBIOS_TABLE_STRING GroupName;\r | |
1342 | GROUP_STRUCT Group[1];\r | |
1343 | } SMBIOS_TABLE_TYPE14;\r | |
1344 | \r | |
98cb9ae8 | 1345 | ///\r |
af2dc6a7 | 1346 | /// System Event Log - Event Log Types.\r |
98cb9ae8 | 1347 | /// \r |
1348 | typedef enum {\r | |
1349 | EventLogTypeReserved = 0x00,\r | |
1350 | EventLogTypeSingleBitECC = 0x01,\r | |
1351 | EventLogTypeMultiBitECC = 0x02,\r | |
1352 | EventLogTypeParityMemErr = 0x03,\r | |
1353 | EventLogTypeBusTimeOut = 0x04,\r | |
1354 | EventLogTypeIOChannelCheck = 0x05,\r | |
1355 | EventLogTypeSoftwareNMI = 0x06,\r | |
1356 | EventLogTypePOSTMemResize = 0x07,\r | |
1357 | EventLogTypePOSTErr = 0x08,\r | |
1358 | EventLogTypePCIParityErr = 0x09,\r | |
1359 | EventLogTypePCISystemErr = 0x0A,\r | |
1360 | EventLogTypeCPUFailure = 0x0B,\r | |
1361 | EventLogTypeEISATimeOut = 0x0C,\r | |
1362 | EventLogTypeMemLogDisabled = 0x0D,\r | |
1363 | EventLogTypeLoggingDisabled = 0x0E,\r | |
1364 | EventLogTypeSysLimitExce = 0x10,\r | |
1365 | EventLogTypeAsyncHWTimer = 0x11,\r | |
1366 | EventLogTypeSysConfigInfo = 0x12,\r | |
1367 | EventLogTypeHDInfo = 0x13,\r | |
1368 | EventLogTypeSysReconfig = 0x14,\r | |
1369 | EventLogTypeUncorrectCPUErr = 0x15,\r | |
1370 | EventLogTypeAreaResetAndClr = 0x16,\r | |
1371 | EventLogTypeSystemBoot = 0x17,\r | |
6800ac83 | 1372 | EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r |
1373 | EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r | |
98cb9ae8 | 1374 | EventLogTypeEndOfLog = 0xFF\r |
1375 | } EVENT_LOG_TYPE_DATA;\r | |
1376 | \r | |
1377 | ///\r | |
af2dc6a7 | 1378 | /// System Event Log - Variable Data Format Types. \r |
98cb9ae8 | 1379 | /// \r |
1380 | typedef enum {\r | |
1381 | EventLogVariableNone = 0x00,\r | |
1382 | EventLogVariableHandle = 0x01,\r | |
1383 | EventLogVariableMutilEvent = 0x02,\r | |
1384 | EventLogVariableMutilEventHandle = 0x03,\r | |
1385 | EventLogVariablePOSTResultBitmap = 0x04,\r | |
1386 | EventLogVariableSysManagementType = 0x05,\r | |
1387 | EventLogVariableMutliEventSysManagmentType = 0x06, \r | |
1388 | EventLogVariableUnused = 0x07,\r | |
1389 | EventLogVariableOEMAssigned = 0x80\r | |
55deb978 | 1390 | } EVENT_LOG_VARIABLE_DATA;\r |
98cb9ae8 | 1391 | \r |
98cb9ae8 | 1392 | ///\r |
1393 | /// Event Log Type Descriptors\r | |
1394 | ///\r | |
1395 | typedef struct {\r | |
af2dc6a7 | 1396 | UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r |
98cb9ae8 | 1397 | UINT8 DataFormatType;\r |
1398 | } EVENT_LOG_TYPE;\r | |
1399 | \r | |
4135253b | 1400 | ///\r |
af2dc6a7 | 1401 | /// System Event Log (Type 15).\r |
4135253b | 1402 | ///\r |
98cb9ae8 | 1403 | /// The presence of this structure within the SMBIOS data returned for a system indicates \r |
1404 | /// that the system supports an event log. An event log is a fixed-length area within a \r | |
1405 | /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r | |
1406 | /// record, followed by one or more variable-length log records. \r | |
1407 | ///\r | |
61ce5861 | 1408 | typedef struct {\r |
1409 | SMBIOS_STRUCTURE Hdr;\r | |
1410 | UINT16 LogAreaLength;\r | |
1411 | UINT16 LogHeaderStartOffset;\r | |
1412 | UINT16 LogDataStartOffset;\r | |
1413 | UINT8 AccessMethod;\r | |
1414 | UINT8 LogStatus;\r | |
1415 | UINT32 LogChangeToken;\r | |
1416 | UINT32 AccessMethodAddress;\r | |
1417 | UINT8 LogHeaderFormat;\r | |
1418 | UINT8 NumberOfSupportedLogTypeDescriptors;\r | |
1419 | UINT8 LengthOfLogTypeDescriptor;\r | |
1420 | EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r | |
1421 | } SMBIOS_TABLE_TYPE15;\r | |
1422 | \r | |
98cb9ae8 | 1423 | ///\r |
af2dc6a7 | 1424 | /// Physical Memory Array - Location.\r |
98cb9ae8 | 1425 | ///\r |
1426 | typedef enum {\r | |
1427 | MemoryArrayLocationOther = 0x01,\r | |
1428 | MemoryArrayLocationUnknown = 0x02,\r | |
1429 | MemoryArrayLocationSystemBoard = 0x03,\r | |
1430 | MemoryArrayLocationIsaAddonCard = 0x04,\r | |
1431 | MemoryArrayLocationEisaAddonCard = 0x05,\r | |
1432 | MemoryArrayLocationPciAddonCard = 0x06,\r | |
1433 | MemoryArrayLocationMcaAddonCard = 0x07,\r | |
1434 | MemoryArrayLocationPcmciaAddonCard = 0x08,\r | |
1435 | MemoryArrayLocationProprietaryAddonCard = 0x09,\r | |
1436 | MemoryArrayLocationNuBus = 0x0A,\r | |
1437 | MemoryArrayLocationPc98C20AddonCard = 0xA0,\r | |
1438 | MemoryArrayLocationPc98C24AddonCard = 0xA1,\r | |
1439 | MemoryArrayLocationPc98EAddonCard = 0xA2,\r | |
1440 | MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r | |
1441 | } MEMORY_ARRAY_LOCATION;\r | |
1442 | \r | |
1443 | ///\r | |
af2dc6a7 | 1444 | /// Physical Memory Array - Use.\r |
98cb9ae8 | 1445 | ///\r |
1446 | typedef enum {\r | |
1447 | MemoryArrayUseOther = 0x01,\r | |
1448 | MemoryArrayUseUnknown = 0x02,\r | |
1449 | MemoryArrayUseSystemMemory = 0x03,\r | |
1450 | MemoryArrayUseVideoMemory = 0x04,\r | |
1451 | MemoryArrayUseFlashMemory = 0x05,\r | |
1452 | MemoryArrayUseNonVolatileRam = 0x06,\r | |
1453 | MemoryArrayUseCacheMemory = 0x07\r | |
1454 | } MEMORY_ARRAY_USE;\r | |
1455 | \r | |
1456 | ///\r | |
af2dc6a7 | 1457 | /// Physical Memory Array - Error Correction Types. \r |
98cb9ae8 | 1458 | ///\r |
1459 | typedef enum {\r | |
1460 | MemoryErrorCorrectionOther = 0x01,\r | |
1461 | MemoryErrorCorrectionUnknown = 0x02,\r | |
1462 | MemoryErrorCorrectionNone = 0x03,\r | |
1463 | MemoryErrorCorrectionParity = 0x04,\r | |
1464 | MemoryErrorCorrectionSingleBitEcc = 0x05,\r | |
1465 | MemoryErrorCorrectionMultiBitEcc = 0x06,\r | |
1466 | MemoryErrorCorrectionCrc = 0x07\r | |
1467 | } MEMORY_ERROR_CORRECTION;\r | |
1468 | \r | |
4135253b | 1469 | ///\r |
af2dc6a7 | 1470 | /// Physical Memory Array (Type 16).\r |
4135253b | 1471 | ///\r |
98cb9ae8 | 1472 | /// This structure describes a collection of memory devices that operate \r |
1473 | /// together to form a memory address space. \r | |
1474 | ///\r | |
61ce5861 | 1475 | typedef struct {\r |
98cb9ae8 | 1476 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1477 | UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r |
1478 | UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r | |
1479 | UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r | |
98cb9ae8 | 1480 | UINT32 MaximumCapacity;\r |
1481 | UINT16 MemoryErrorInformationHandle;\r | |
1482 | UINT16 NumberOfMemoryDevices;\r | |
7ddba202 SZ |
1483 | //\r |
1484 | // Add for smbios 2.7\r | |
1485 | //\r | |
1486 | UINT64 ExtendedMaximumCapacity;\r | |
61ce5861 | 1487 | } SMBIOS_TABLE_TYPE16;\r |
1488 | \r | |
98cb9ae8 | 1489 | ///\r |
af2dc6a7 | 1490 | /// Memory Device - Form Factor.\r |
98cb9ae8 | 1491 | ///\r |
1492 | typedef enum {\r | |
1493 | MemoryFormFactorOther = 0x01,\r | |
1494 | MemoryFormFactorUnknown = 0x02,\r | |
1495 | MemoryFormFactorSimm = 0x03,\r | |
1496 | MemoryFormFactorSip = 0x04,\r | |
1497 | MemoryFormFactorChip = 0x05,\r | |
1498 | MemoryFormFactorDip = 0x06,\r | |
1499 | MemoryFormFactorZip = 0x07,\r | |
1500 | MemoryFormFactorProprietaryCard = 0x08,\r | |
1501 | MemoryFormFactorDimm = 0x09,\r | |
1502 | MemoryFormFactorTsop = 0x0A,\r | |
1503 | MemoryFormFactorRowOfChips = 0x0B,\r | |
1504 | MemoryFormFactorRimm = 0x0C,\r | |
1505 | MemoryFormFactorSodimm = 0x0D,\r | |
1506 | MemoryFormFactorSrimm = 0x0E,\r | |
1507 | MemoryFormFactorFbDimm = 0x0F\r | |
1508 | } MEMORY_FORM_FACTOR;\r | |
1509 | \r | |
1510 | ///\r | |
1511 | /// Memory Device - Type\r | |
1512 | ///\r | |
1513 | typedef enum {\r | |
1514 | MemoryTypeOther = 0x01,\r | |
1515 | MemoryTypeUnknown = 0x02,\r | |
1516 | MemoryTypeDram = 0x03,\r | |
1517 | MemoryTypeEdram = 0x04,\r | |
1518 | MemoryTypeVram = 0x05,\r | |
1519 | MemoryTypeSram = 0x06,\r | |
1520 | MemoryTypeRam = 0x07,\r | |
1521 | MemoryTypeRom = 0x08,\r | |
1522 | MemoryTypeFlash = 0x09,\r | |
1523 | MemoryTypeEeprom = 0x0A,\r | |
1524 | MemoryTypeFeprom = 0x0B,\r | |
1525 | MemoryTypeEprom = 0x0C,\r | |
1526 | MemoryTypeCdram = 0x0D,\r | |
1527 | MemoryType3Dram = 0x0E,\r | |
1528 | MemoryTypeSdram = 0x0F,\r | |
1529 | MemoryTypeSgram = 0x10,\r | |
1530 | MemoryTypeRdram = 0x11,\r | |
1531 | MemoryTypeDdr = 0x12,\r | |
1532 | MemoryTypeDdr2 = 0x13,\r | |
3507ab19 | 1533 | MemoryTypeDdr2FbDimm = 0x14,\r |
1534 | MemoryTypeDdr3 = 0x18,\r | |
6cd35c62 EL |
1535 | MemoryTypeFbd2 = 0x19,\r |
1536 | MemoryTypeDdr4 = 0x1A,\r | |
1537 | MemoryTypeLpddr = 0x1B,\r | |
1538 | MemoryTypeLpddr2 = 0x1C,\r | |
1539 | MemoryTypeLpddr3 = 0x1D,\r | |
1540 | MemoryTypeLpddr4 = 0x1E\r | |
98cb9ae8 | 1541 | } MEMORY_DEVICE_TYPE;\r |
1542 | \r | |
1543 | typedef struct {\r | |
1544 | UINT16 Reserved :1;\r | |
1545 | UINT16 Other :1;\r | |
1546 | UINT16 Unknown :1;\r | |
1547 | UINT16 FastPaged :1;\r | |
1548 | UINT16 StaticColumn :1;\r | |
1549 | UINT16 PseudoStatic :1;\r | |
1550 | UINT16 Rambus :1;\r | |
1551 | UINT16 Synchronous :1;\r | |
1552 | UINT16 Cmos :1;\r | |
1553 | UINT16 Edo :1;\r | |
1554 | UINT16 WindowDram :1;\r | |
1555 | UINT16 CacheDram :1;\r | |
1556 | UINT16 Nonvolatile :1;\r | |
7ddba202 SZ |
1557 | UINT16 Registered :1;\r |
1558 | UINT16 Unbuffered :1;\r | |
4a228334 | 1559 | UINT16 LrDimm :1;\r |
98cb9ae8 | 1560 | } MEMORY_DEVICE_TYPE_DETAIL;\r |
1561 | \r | |
4135253b | 1562 | ///\r |
af2dc6a7 | 1563 | /// Memory Device (Type 17).\r |
4135253b | 1564 | ///\r |
98cb9ae8 | 1565 | /// This structure describes a single memory device that is part of \r |
1566 | /// a larger Physical Memory Array (Type 16).\r | |
1567 | /// Note: If a system includes memory-device sockets, the SMBIOS implementation \r | |
af2dc6a7 | 1568 | /// includes a Memory Device structure instance for each slot, whether or not the \r |
98cb9ae8 | 1569 | /// socket is currently populated.\r |
1570 | ///\r | |
61ce5861 | 1571 | typedef struct {\r |
98cb9ae8 | 1572 | SMBIOS_STRUCTURE Hdr;\r |
1573 | UINT16 MemoryArrayHandle;\r | |
1574 | UINT16 MemoryErrorInformationHandle;\r | |
1575 | UINT16 TotalWidth;\r | |
1576 | UINT16 DataWidth;\r | |
1577 | UINT16 Size;\r | |
af2dc6a7 | 1578 | UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r |
98cb9ae8 | 1579 | UINT8 DeviceSet;\r |
1580 | SMBIOS_TABLE_STRING DeviceLocator;\r | |
1581 | SMBIOS_TABLE_STRING BankLocator;\r | |
af2dc6a7 | 1582 | UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r |
98cb9ae8 | 1583 | MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r |
1584 | UINT16 Speed;\r | |
1585 | SMBIOS_TABLE_STRING Manufacturer;\r | |
1586 | SMBIOS_TABLE_STRING SerialNumber;\r | |
1587 | SMBIOS_TABLE_STRING AssetTag;\r | |
1588 | SMBIOS_TABLE_STRING PartNumber;\r | |
61ce5861 | 1589 | //\r |
1590 | // Add for smbios 2.6\r | |
1591 | // \r | |
7ddba202 SZ |
1592 | UINT8 Attributes;\r |
1593 | //\r | |
1594 | // Add for smbios 2.7\r | |
1595 | //\r | |
1596 | UINT32 ExtendedSize;\r | |
1597 | UINT16 ConfiguredMemoryClockSpeed;\r | |
4a228334 EL |
1598 | //\r |
1599 | // Add for smbios 2.8.0\r | |
1600 | //\r | |
1601 | UINT16 MinimumVoltage;\r | |
1602 | UINT16 MaximumVoltage;\r | |
1603 | UINT16 ConfiguredVoltage;\r | |
61ce5861 | 1604 | } SMBIOS_TABLE_TYPE17;\r |
1605 | \r | |
98cb9ae8 | 1606 | ///\r |
af2dc6a7 | 1607 | /// 32-bit Memory Error Information - Error Type. \r |
98cb9ae8 | 1608 | ///\r |
1609 | typedef enum { \r | |
1610 | MemoryErrorOther = 0x01,\r | |
1611 | MemoryErrorUnknown = 0x02,\r | |
1612 | MemoryErrorOk = 0x03,\r | |
1613 | MemoryErrorBadRead = 0x04,\r | |
1614 | MemoryErrorParity = 0x05,\r | |
1615 | MemoryErrorSigleBit = 0x06,\r | |
1616 | MemoryErrorDoubleBit = 0x07,\r | |
1617 | MemoryErrorMultiBit = 0x08,\r | |
1618 | MemoryErrorNibble = 0x09,\r | |
1619 | MemoryErrorChecksum = 0x0A,\r | |
1620 | MemoryErrorCrc = 0x0B,\r | |
1621 | MemoryErrorCorrectSingleBit = 0x0C,\r | |
1622 | MemoryErrorCorrected = 0x0D,\r | |
1623 | MemoryErrorUnCorrectable = 0x0E\r | |
1624 | } MEMORY_ERROR_TYPE;\r | |
1625 | \r | |
1626 | ///\r | |
af2dc6a7 | 1627 | /// 32-bit Memory Error Information - Error Granularity. \r |
98cb9ae8 | 1628 | ///\r |
1629 | typedef enum { \r | |
1630 | MemoryGranularityOther = 0x01,\r | |
1631 | MemoryGranularityOtherUnknown = 0x02,\r | |
1632 | MemoryGranularityDeviceLevel = 0x03,\r | |
1633 | MemoryGranularityMemPartitionLevel = 0x04\r | |
1634 | } MEMORY_ERROR_GRANULARITY;\r | |
1635 | \r | |
1636 | ///\r | |
af2dc6a7 | 1637 | /// 32-bit Memory Error Information - Error Operation. \r |
98cb9ae8 | 1638 | ///\r |
1639 | typedef enum { \r | |
1640 | MemoryErrorOperationOther = 0x01,\r | |
1641 | MemoryErrorOperationUnknown = 0x02,\r | |
1642 | MemoryErrorOperationRead = 0x03,\r | |
1643 | MemoryErrorOperationWrite = 0x04,\r | |
1644 | MemoryErrorOperationPartialWrite = 0x05\r | |
1645 | } MEMORY_ERROR_OPERATION;\r | |
1646 | \r | |
4135253b | 1647 | ///\r |
af2dc6a7 | 1648 | /// 32-bit Memory Error Information (Type 18).\r |
98cb9ae8 | 1649 | /// \r |
1650 | /// This structure identifies the specifics of an error that might be detected \r | |
1651 | /// within a Physical Memory Array.\r | |
4135253b | 1652 | ///\r |
61ce5861 | 1653 | typedef struct {\r |
98cb9ae8 | 1654 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1655 | UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r |
1656 | UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r | |
1657 | UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r | |
98cb9ae8 | 1658 | UINT32 VendorSyndrome;\r |
1659 | UINT32 MemoryArrayErrorAddress;\r | |
1660 | UINT32 DeviceErrorAddress;\r | |
1661 | UINT32 ErrorResolution;\r | |
61ce5861 | 1662 | } SMBIOS_TABLE_TYPE18;\r |
1663 | \r | |
4135253b | 1664 | ///\r |
af2dc6a7 | 1665 | /// Memory Array Mapped Address (Type 19).\r |
4135253b | 1666 | ///\r |
98cb9ae8 | 1667 | /// This structure provides the address mapping for a Physical Memory Array. \r |
1668 | /// One structure is present for each contiguous address range described.\r | |
1669 | ///\r | |
61ce5861 | 1670 | typedef struct {\r |
1671 | SMBIOS_STRUCTURE Hdr;\r | |
1672 | UINT32 StartingAddress;\r | |
1673 | UINT32 EndingAddress;\r | |
1674 | UINT16 MemoryArrayHandle;\r | |
1675 | UINT8 PartitionWidth;\r | |
7ddba202 SZ |
1676 | //\r |
1677 | // Add for smbios 2.7\r | |
1678 | //\r | |
1679 | UINT64 ExtendedStartingAddress;\r | |
1680 | UINT64 ExtendedEndingAddress;\r | |
61ce5861 | 1681 | } SMBIOS_TABLE_TYPE19;\r |
1682 | \r | |
4135253b | 1683 | ///\r |
af2dc6a7 | 1684 | /// Memory Device Mapped Address (Type 20).\r |
4135253b | 1685 | ///\r |
98cb9ae8 | 1686 | /// This structure maps memory address space usually to a device-level granularity. \r |
1687 | /// One structure is present for each contiguous address range described. \r | |
1688 | ///\r | |
61ce5861 | 1689 | typedef struct {\r |
1690 | SMBIOS_STRUCTURE Hdr;\r | |
1691 | UINT32 StartingAddress;\r | |
1692 | UINT32 EndingAddress;\r | |
1693 | UINT16 MemoryDeviceHandle;\r | |
1694 | UINT16 MemoryArrayMappedAddressHandle;\r | |
1695 | UINT8 PartitionRowPosition;\r | |
1696 | UINT8 InterleavePosition;\r | |
1697 | UINT8 InterleavedDataDepth;\r | |
7ddba202 SZ |
1698 | //\r |
1699 | // Add for smbios 2.7\r | |
1700 | //\r | |
1701 | UINT64 ExtendedStartingAddress;\r | |
1702 | UINT64 ExtendedEndingAddress;\r | |
61ce5861 | 1703 | } SMBIOS_TABLE_TYPE20;\r |
1704 | \r | |
98cb9ae8 | 1705 | ///\r |
1706 | /// Built-in Pointing Device - Type\r | |
1707 | ///\r | |
1708 | typedef enum {\r | |
1709 | PointingDeviceTypeOther = 0x01,\r | |
1710 | PointingDeviceTypeUnknown = 0x02,\r | |
1711 | PointingDeviceTypeMouse = 0x03,\r | |
1712 | PointingDeviceTypeTrackBall = 0x04,\r | |
1713 | PointingDeviceTypeTrackPoint = 0x05,\r | |
1714 | PointingDeviceTypeGlidePoint = 0x06,\r | |
1715 | PointingDeviceTouchPad = 0x07,\r | |
1716 | PointingDeviceTouchScreen = 0x08,\r | |
1717 | PointingDeviceOpticalSensor = 0x09\r | |
1718 | } BUILTIN_POINTING_DEVICE_TYPE;\r | |
1719 | \r | |
1720 | ///\r | |
af2dc6a7 | 1721 | /// Built-in Pointing Device - Interface.\r |
98cb9ae8 | 1722 | ///\r |
1723 | typedef enum {\r | |
1724 | PointingDeviceInterfaceOther = 0x01,\r | |
1725 | PointingDeviceInterfaceUnknown = 0x02,\r | |
1726 | PointingDeviceInterfaceSerial = 0x03,\r | |
1727 | PointingDeviceInterfacePs2 = 0x04,\r | |
1728 | PointingDeviceInterfaceInfrared = 0x05,\r | |
1729 | PointingDeviceInterfaceHpHil = 0x06,\r | |
1730 | PointingDeviceInterfaceBusMouse = 0x07,\r | |
1731 | PointingDeviceInterfaceADB = 0x08,\r | |
1732 | PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r | |
1733 | PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r | |
1734 | PointingDeviceInterfaceUsb = 0xA2\r | |
1735 | } BUILTIN_POINTING_DEVICE_INTERFACE;\r | |
1736 | \r | |
4135253b | 1737 | ///\r |
af2dc6a7 | 1738 | /// Built-in Pointing Device (Type 21).\r |
4135253b | 1739 | ///\r |
98cb9ae8 | 1740 | /// This structure describes the attributes of the built-in pointing device for the \r |
af2dc6a7 | 1741 | /// system. The presence of this structure does not imply that the built-in\r |
98cb9ae8 | 1742 | /// pointing device is active for the system's use! \r |
1743 | ///\r | |
61ce5861 | 1744 | typedef struct {\r |
98cb9ae8 | 1745 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1746 | UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r |
1747 | UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r | |
98cb9ae8 | 1748 | UINT8 NumberOfButtons;\r |
61ce5861 | 1749 | } SMBIOS_TABLE_TYPE21;\r |
1750 | \r | |
98cb9ae8 | 1751 | ///\r |
1752 | /// Portable Battery - Device Chemistry\r | |
1753 | ///\r | |
1754 | typedef enum { \r | |
1755 | PortableBatteryDeviceChemistryOther = 0x01,\r | |
1756 | PortableBatteryDeviceChemistryUnknown = 0x02,\r | |
1757 | PortableBatteryDeviceChemistryLeadAcid = 0x03,\r | |
1758 | PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r | |
1759 | PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r | |
1760 | PortableBatteryDeviceChemistryLithiumIon = 0x06,\r | |
1761 | PortableBatteryDeviceChemistryZincAir = 0x07,\r | |
1762 | PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r | |
1763 | } PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r | |
1764 | \r | |
4135253b | 1765 | ///\r |
af2dc6a7 | 1766 | /// Portable Battery (Type 22).\r |
4135253b | 1767 | ///\r |
98cb9ae8 | 1768 | /// This structure describes the attributes of the portable battery(s) for the system. \r |
1769 | /// The structure contains the static attributes for the group. Each structure describes \r | |
1f9f8414 | 1770 | /// a single battery pack's attributes.\r |
98cb9ae8 | 1771 | ///\r |
61ce5861 | 1772 | typedef struct {\r |
98cb9ae8 | 1773 | SMBIOS_STRUCTURE Hdr;\r |
1774 | SMBIOS_TABLE_STRING Location;\r | |
1775 | SMBIOS_TABLE_STRING Manufacturer;\r | |
1776 | SMBIOS_TABLE_STRING ManufactureDate;\r | |
1777 | SMBIOS_TABLE_STRING SerialNumber;\r | |
1778 | SMBIOS_TABLE_STRING DeviceName;\r | |
af2dc6a7 | 1779 | UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r |
98cb9ae8 | 1780 | UINT16 DeviceCapacity;\r |
1781 | UINT16 DesignVoltage;\r | |
1782 | SMBIOS_TABLE_STRING SBDSVersionNumber;\r | |
1783 | UINT8 MaximumErrorInBatteryData;\r | |
1784 | UINT16 SBDSSerialNumber;\r | |
1785 | UINT16 SBDSManufactureDate;\r | |
1786 | SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r | |
1787 | UINT8 DesignCapacityMultiplier;\r | |
1788 | UINT32 OEMSpecific;\r | |
61ce5861 | 1789 | } SMBIOS_TABLE_TYPE22;\r |
1790 | \r | |
4135253b | 1791 | ///\r |
1792 | /// System Reset (Type 23)\r | |
1793 | ///\r | |
98cb9ae8 | 1794 | /// This structure describes whether Automatic System Reset functions enabled (Status). \r |
1795 | /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r | |
1796 | /// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r | |
1797 | /// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r | |
1798 | /// the system will re-boot according to the Boot Option at Limit. \r | |
1799 | ///\r | |
61ce5861 | 1800 | typedef struct {\r |
1801 | SMBIOS_STRUCTURE Hdr;\r | |
1802 | UINT8 Capabilities;\r | |
1803 | UINT16 ResetCount;\r | |
1804 | UINT16 ResetLimit;\r | |
1805 | UINT16 TimerInterval;\r | |
1806 | UINT16 Timeout;\r | |
1807 | } SMBIOS_TABLE_TYPE23;\r | |
1808 | \r | |
4135253b | 1809 | ///\r |
af2dc6a7 | 1810 | /// Hardware Security (Type 24).\r |
4135253b | 1811 | ///\r |
98cb9ae8 | 1812 | /// This structure describes the system-wide hardware security settings. \r |
1813 | ///\r | |
61ce5861 | 1814 | typedef struct {\r |
1815 | SMBIOS_STRUCTURE Hdr;\r | |
1816 | UINT8 HardwareSecuritySettings;\r | |
1817 | } SMBIOS_TABLE_TYPE24;\r | |
1818 | \r | |
4135253b | 1819 | ///\r |
af2dc6a7 | 1820 | /// System Power Controls (Type 25).\r |
4135253b | 1821 | ///\r |
98cb9ae8 | 1822 | /// This structure describes the attributes for controlling the main power supply to the system. \r |
1823 | /// Software that interprets this structure uses the month, day, hour, minute, and second values \r | |
1824 | /// to determine the number of seconds until the next power-on of the system. The presence of \r | |
1825 | /// this structure implies that a timed power-on facility is available for the system. \r | |
1826 | ///\r | |
61ce5861 | 1827 | typedef struct {\r |
1828 | SMBIOS_STRUCTURE Hdr;\r | |
1829 | UINT8 NextScheduledPowerOnMonth;\r | |
1830 | UINT8 NextScheduledPowerOnDayOfMonth;\r | |
1831 | UINT8 NextScheduledPowerOnHour;\r | |
1832 | UINT8 NextScheduledPowerOnMinute;\r | |
1833 | UINT8 NextScheduledPowerOnSecond;\r | |
1834 | } SMBIOS_TABLE_TYPE25;\r | |
1835 | \r | |
98cb9ae8 | 1836 | ///\r |
af2dc6a7 | 1837 | /// Voltage Probe - Location and Status.\r |
98cb9ae8 | 1838 | ///\r |
1839 | typedef struct {\r | |
1840 | UINT8 VoltageProbeSite :5;\r | |
1841 | UINT8 VoltageProbeStatus :3;\r | |
1842 | } MISC_VOLTAGE_PROBE_LOCATION;\r | |
1843 | \r | |
4135253b | 1844 | ///\r |
1845 | /// Voltage Probe (Type 26)\r | |
1846 | ///\r | |
98cb9ae8 | 1847 | /// This describes the attributes for a voltage probe in the system. \r |
1848 | /// Each structure describes a single voltage probe.\r | |
1849 | ///\r | |
61ce5861 | 1850 | typedef struct {\r |
98cb9ae8 | 1851 | SMBIOS_STRUCTURE Hdr;\r |
1852 | SMBIOS_TABLE_STRING Description;\r | |
1853 | MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r | |
1854 | UINT16 MaximumValue;\r | |
1855 | UINT16 MinimumValue;\r | |
1856 | UINT16 Resolution;\r | |
1857 | UINT16 Tolerance;\r | |
1858 | UINT16 Accuracy;\r | |
1859 | UINT32 OEMDefined;\r | |
1860 | UINT16 NominalValue;\r | |
61ce5861 | 1861 | } SMBIOS_TABLE_TYPE26;\r |
1862 | \r | |
98cb9ae8 | 1863 | ///\r |
af2dc6a7 | 1864 | /// Cooling Device - Device Type and Status.\r |
98cb9ae8 | 1865 | ///\r |
1866 | typedef struct {\r | |
1867 | UINT8 CoolingDevice :5;\r | |
1868 | UINT8 CoolingDeviceStatus :3;\r | |
1869 | } MISC_COOLING_DEVICE_TYPE;\r | |
1870 | \r | |
4135253b | 1871 | ///\r |
1872 | /// Cooling Device (Type 27)\r | |
1873 | ///\r | |
98cb9ae8 | 1874 | /// This structure describes the attributes for a cooling device in the system. \r |
1875 | /// Each structure describes a single cooling device. \r | |
1876 | /// \r | |
61ce5861 | 1877 | typedef struct {\r |
98cb9ae8 | 1878 | SMBIOS_STRUCTURE Hdr;\r |
1879 | UINT16 TemperatureProbeHandle;\r | |
1880 | MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r | |
1881 | UINT8 CoolingUnitGroup;\r | |
1882 | UINT32 OEMDefined;\r | |
1883 | UINT16 NominalSpeed;\r | |
7ddba202 SZ |
1884 | //\r |
1885 | // Add for smbios 2.7\r | |
1886 | //\r | |
1887 | SMBIOS_TABLE_STRING Description;\r | |
61ce5861 | 1888 | } SMBIOS_TABLE_TYPE27;\r |
1889 | \r | |
98cb9ae8 | 1890 | ///\r |
af2dc6a7 | 1891 | /// Temperature Probe - Location and Status.\r |
98cb9ae8 | 1892 | ///\r |
1893 | typedef struct {\r | |
1894 | UINT8 TemperatureProbeSite :5;\r | |
1895 | UINT8 TemperatureProbeStatus :3;\r | |
1896 | } MISC_TEMPERATURE_PROBE_LOCATION;\r | |
1897 | \r | |
4135253b | 1898 | ///\r |
af2dc6a7 | 1899 | /// Temperature Probe (Type 28).\r |
4135253b | 1900 | ///\r |
98cb9ae8 | 1901 | /// This structure describes the attributes for a temperature probe in the system. \r |
1902 | /// Each structure describes a single temperature probe. \r | |
1903 | ///\r | |
61ce5861 | 1904 | typedef struct {\r |
98cb9ae8 | 1905 | SMBIOS_STRUCTURE Hdr;\r |
1906 | SMBIOS_TABLE_STRING Description;\r | |
1907 | MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r | |
1908 | UINT16 MaximumValue;\r | |
1909 | UINT16 MinimumValue;\r | |
1910 | UINT16 Resolution;\r | |
1911 | UINT16 Tolerance;\r | |
1912 | UINT16 Accuracy;\r | |
1913 | UINT32 OEMDefined;\r | |
1914 | UINT16 NominalValue;\r | |
61ce5861 | 1915 | } SMBIOS_TABLE_TYPE28;\r |
1916 | \r | |
98cb9ae8 | 1917 | ///\r |
af2dc6a7 | 1918 | /// Electrical Current Probe - Location and Status.\r |
98cb9ae8 | 1919 | ///\r |
1920 | typedef struct {\r | |
1921 | UINT8 ElectricalCurrentProbeSite :5;\r | |
1922 | UINT8 ElectricalCurrentProbeStatus :3;\r | |
1923 | } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r | |
1924 | \r | |
4135253b | 1925 | ///\r |
af2dc6a7 | 1926 | /// Electrical Current Probe (Type 29).\r |
4135253b | 1927 | ///\r |
98cb9ae8 | 1928 | /// This structure describes the attributes for an electrical current probe in the system.\r |
1929 | /// Each structure describes a single electrical current probe. \r | |
1930 | ///\r | |
61ce5861 | 1931 | typedef struct {\r |
98cb9ae8 | 1932 | SMBIOS_STRUCTURE Hdr;\r |
1933 | SMBIOS_TABLE_STRING Description;\r | |
1934 | MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r | |
1935 | UINT16 MaximumValue;\r | |
1936 | UINT16 MinimumValue;\r | |
1937 | UINT16 Resolution;\r | |
1938 | UINT16 Tolerance;\r | |
1939 | UINT16 Accuracy;\r | |
1940 | UINT32 OEMDefined;\r | |
1941 | UINT16 NominalValue;\r | |
61ce5861 | 1942 | } SMBIOS_TABLE_TYPE29;\r |
1943 | \r | |
4135253b | 1944 | ///\r |
af2dc6a7 | 1945 | /// Out-of-Band Remote Access (Type 30).\r |
4135253b | 1946 | ///\r |
98cb9ae8 | 1947 | /// This structure describes the attributes and policy settings of a hardware facility \r |
1948 | /// that may be used to gain remote access to a hardware system when the operating system \r | |
1949 | /// is not available due to power-down status, hardware failures, or boot failures. \r | |
1950 | ///\r | |
61ce5861 | 1951 | typedef struct {\r |
1952 | SMBIOS_STRUCTURE Hdr;\r | |
1953 | SMBIOS_TABLE_STRING ManufacturerName;\r | |
1954 | UINT8 Connections;\r | |
1955 | } SMBIOS_TABLE_TYPE30;\r | |
1956 | \r | |
4135253b | 1957 | ///\r |
af2dc6a7 | 1958 | /// Boot Integrity Services (BIS) Entry Point (Type 31).\r |
4135253b | 1959 | ///\r |
98cb9ae8 | 1960 | /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r |
1961 | /// \r | |
61ce5861 | 1962 | typedef struct {\r |
1963 | SMBIOS_STRUCTURE Hdr;\r | |
1964 | UINT8 Checksum;\r | |
1965 | UINT8 Reserved1;\r | |
1966 | UINT16 Reserved2;\r | |
1967 | UINT32 BisEntry16;\r | |
1968 | UINT32 BisEntry32;\r | |
1969 | UINT64 Reserved3;\r | |
1970 | UINT32 Reserved4;\r | |
1971 | } SMBIOS_TABLE_TYPE31;\r | |
1972 | \r | |
98cb9ae8 | 1973 | ///\r |
af2dc6a7 | 1974 | /// System Boot Information - System Boot Status.\r |
98cb9ae8 | 1975 | ///\r |
1976 | typedef enum {\r | |
1977 | BootInformationStatusNoError = 0x00,\r | |
1978 | BootInformationStatusNoBootableMedia = 0x01,\r | |
1979 | BootInformationStatusNormalOSFailedLoading = 0x02,\r | |
1980 | BootInformationStatusFirmwareDetectedFailure = 0x03,\r | |
1981 | BootInformationStatusOSDetectedFailure = 0x04,\r | |
1982 | BootInformationStatusUserRequestedBoot = 0x05,\r | |
1983 | BootInformationStatusSystemSecurityViolation = 0x06,\r | |
1984 | BootInformationStatusPreviousRequestedImage = 0x07,\r | |
1985 | BootInformationStatusWatchdogTimerExpired = 0x08,\r | |
1986 | BootInformationStatusStartReserved = 0x09,\r | |
1987 | BootInformationStatusStartOemSpecific = 0x80,\r | |
1988 | BootInformationStatusStartProductSpecific = 0xC0\r | |
1989 | } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r | |
1990 | \r | |
4135253b | 1991 | ///\r |
af2dc6a7 | 1992 | /// System Boot Information (Type 32).\r |
4135253b | 1993 | ///\r |
98cb9ae8 | 1994 | /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r |
1995 | /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r | |
1996 | /// application via this structure. When used in the PXE environment, for example, \r | |
1997 | /// this code identifies the reason the PXE was initiated and can be used by boot-image \r | |
1f9f8414 | 1998 | /// software to further automate an enterprise's PXE sessions. For example, an enterprise \r |
98cb9ae8 | 1999 | /// could choose to automatically download a hardware-diagnostic image to a client whose \r |
2000 | /// reason code indicated either a firmware- or operating system-detected hardware failure.\r | |
2001 | ///\r | |
61ce5861 | 2002 | typedef struct {\r |
98cb9ae8 | 2003 | SMBIOS_STRUCTURE Hdr;\r |
2004 | UINT8 Reserved[6];\r | |
af2dc6a7 | 2005 | UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r |
61ce5861 | 2006 | } SMBIOS_TABLE_TYPE32;\r |
2007 | \r | |
4135253b | 2008 | ///\r |
af2dc6a7 | 2009 | /// 64-bit Memory Error Information (Type 33).\r |
4135253b | 2010 | ///\r |
98cb9ae8 | 2011 | /// This structure describes an error within a Physical Memory Array, \r |
2012 | /// when the error address is above 4G (0xFFFFFFFF).\r | |
2013 | /// \r | |
61ce5861 | 2014 | typedef struct {\r |
98cb9ae8 | 2015 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 2016 | UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r |
2017 | UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r | |
2018 | UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r | |
98cb9ae8 | 2019 | UINT32 VendorSyndrome;\r |
2020 | UINT64 MemoryArrayErrorAddress;\r | |
2021 | UINT64 DeviceErrorAddress;\r | |
2022 | UINT32 ErrorResolution;\r | |
61ce5861 | 2023 | } SMBIOS_TABLE_TYPE33;\r |
2024 | \r | |
98cb9ae8 | 2025 | ///\r |
af2dc6a7 | 2026 | /// Management Device - Type. \r |
98cb9ae8 | 2027 | ///\r |
2028 | typedef enum {\r | |
2029 | ManagementDeviceTypeOther = 0x01,\r | |
2030 | ManagementDeviceTypeUnknown = 0x02,\r | |
2031 | ManagementDeviceTypeLm75 = 0x03,\r | |
2032 | ManagementDeviceTypeLm78 = 0x04,\r | |
2033 | ManagementDeviceTypeLm79 = 0x05,\r | |
2034 | ManagementDeviceTypeLm80 = 0x06,\r | |
2035 | ManagementDeviceTypeLm81 = 0x07,\r | |
2036 | ManagementDeviceTypeAdm9240 = 0x08,\r | |
2037 | ManagementDeviceTypeDs1780 = 0x09,\r | |
2038 | ManagementDeviceTypeMaxim1617 = 0x0A,\r | |
2039 | ManagementDeviceTypeGl518Sm = 0x0B,\r | |
2040 | ManagementDeviceTypeW83781D = 0x0C,\r | |
2041 | ManagementDeviceTypeHt82H791 = 0x0D\r | |
2042 | } MISC_MANAGEMENT_DEVICE_TYPE;\r | |
2043 | \r | |
2044 | ///\r | |
af2dc6a7 | 2045 | /// Management Device - Address Type. \r |
98cb9ae8 | 2046 | ///\r |
2047 | typedef enum {\r | |
2048 | ManagementDeviceAddressTypeOther = 0x01,\r | |
2049 | ManagementDeviceAddressTypeUnknown = 0x02,\r | |
2050 | ManagementDeviceAddressTypeIOPort = 0x03,\r | |
2051 | ManagementDeviceAddressTypeMemory = 0x04,\r | |
2052 | ManagementDeviceAddressTypeSmbus = 0x05\r | |
2053 | } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r | |
2054 | \r | |
4135253b | 2055 | ///\r |
af2dc6a7 | 2056 | /// Management Device (Type 34).\r |
4135253b | 2057 | ///\r |
98cb9ae8 | 2058 | /// The information in this structure defines the attributes of a Management Device. \r |
2059 | /// A Management Device might control one or more fans or voltage, current, or temperature\r | |
2060 | /// probes as defined by one or more Management Device Component structures.\r | |
2061 | ///\r | |
61ce5861 | 2062 | typedef struct {\r |
98cb9ae8 | 2063 | SMBIOS_STRUCTURE Hdr;\r |
2064 | SMBIOS_TABLE_STRING Description;\r | |
af2dc6a7 | 2065 | UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r |
98cb9ae8 | 2066 | UINT32 Address;\r |
af2dc6a7 | 2067 | UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r |
61ce5861 | 2068 | } SMBIOS_TABLE_TYPE34;\r |
2069 | \r | |
4135253b | 2070 | ///\r |
2071 | /// Management Device Component (Type 35)\r | |
2072 | ///\r | |
98cb9ae8 | 2073 | /// This structure associates a cooling device or environmental probe with structures \r |
2074 | /// that define the controlling hardware device and (optionally) the component's thresholds. \r | |
2075 | ///\r | |
61ce5861 | 2076 | typedef struct {\r |
2077 | SMBIOS_STRUCTURE Hdr;\r | |
2078 | SMBIOS_TABLE_STRING Description;\r | |
2079 | UINT16 ManagementDeviceHandle;\r | |
2080 | UINT16 ComponentHandle;\r | |
2081 | UINT16 ThresholdHandle;\r | |
2082 | } SMBIOS_TABLE_TYPE35;\r | |
2083 | \r | |
4135253b | 2084 | ///\r |
af2dc6a7 | 2085 | /// Management Device Threshold Data (Type 36).\r |
4135253b | 2086 | ///\r |
98cb9ae8 | 2087 | /// The information in this structure defines threshold information for \r |
2088 | /// a component (probe or cooling-unit) contained within a Management Device. \r | |
2089 | ///\r | |
61ce5861 | 2090 | typedef struct {\r |
2091 | SMBIOS_STRUCTURE Hdr;\r | |
2092 | UINT16 LowerThresholdNonCritical;\r | |
2093 | UINT16 UpperThresholdNonCritical;\r | |
2094 | UINT16 LowerThresholdCritical;\r | |
2095 | UINT16 UpperThresholdCritical;\r | |
2096 | UINT16 LowerThresholdNonRecoverable;\r | |
2097 | UINT16 UpperThresholdNonRecoverable;\r | |
2098 | } SMBIOS_TABLE_TYPE36;\r | |
2099 | \r | |
bf7ea009 | 2100 | ///\r |
af2dc6a7 | 2101 | /// Memory Channel Entry.\r |
bf7ea009 | 2102 | ///\r |
61ce5861 | 2103 | typedef struct {\r |
2104 | UINT8 DeviceLoad;\r | |
2105 | UINT16 DeviceHandle;\r | |
2106 | } MEMORY_DEVICE;\r | |
2107 | \r | |
98cb9ae8 | 2108 | ///\r |
af2dc6a7 | 2109 | /// Memory Channel - Channel Type.\r |
98cb9ae8 | 2110 | ///\r |
2111 | typedef enum {\r | |
2112 | MemoryChannelTypeOther = 0x01,\r | |
2113 | MemoryChannelTypeUnknown = 0x02,\r | |
2114 | MemoryChannelTypeRambus = 0x03,\r | |
2115 | MemoryChannelTypeSyncLink = 0x04\r | |
2116 | } MEMORY_CHANNEL_TYPE;\r | |
2117 | \r | |
4135253b | 2118 | ///\r |
2119 | /// Memory Channel (Type 37)\r | |
2120 | ///\r | |
98cb9ae8 | 2121 | /// The information in this structure provides the correlation between a Memory Channel\r |
af2dc6a7 | 2122 | /// and its associated Memory Devices. Each device presents one or more loads to the channel. \r |
2123 | /// The sum of all device loads cannot exceed the channel's defined maximum.\r | |
98cb9ae8 | 2124 | ///\r |
61ce5861 | 2125 | typedef struct {\r |
2126 | SMBIOS_STRUCTURE Hdr;\r | |
2127 | UINT8 ChannelType;\r | |
2128 | UINT8 MaximumChannelLoad;\r | |
2129 | UINT8 MemoryDeviceCount;\r | |
2130 | MEMORY_DEVICE MemoryDevice[1];\r | |
2131 | } SMBIOS_TABLE_TYPE37;\r | |
2132 | \r | |
98cb9ae8 | 2133 | ///\r |
2134 | /// IPMI Device Information - BMC Interface Type\r | |
2135 | ///\r | |
2136 | typedef enum {\r | |
2137 | IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r | |
af2dc6a7 | 2138 | IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r |
2139 | IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r | |
2140 | IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r | |
98cb9ae8 | 2141 | IPMIDeviceInfoInterfaceTypeReserved = 0x04\r |
2142 | } BMC_INTERFACE_TYPE;\r | |
2143 | \r | |
4135253b | 2144 | ///\r |
af2dc6a7 | 2145 | /// IPMI Device Information (Type 38).\r |
4135253b | 2146 | ///\r |
7ddba202 | 2147 | /// The information in this structure defines the attributes of an\r |
98cb9ae8 | 2148 | /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r |
7ddba202 SZ |
2149 | ///\r |
2150 | /// The Type 42 structure can also be used to describe a physical management controller\r | |
2151 | /// host interface and one or more protocols that share that interface. If IPMI is not\r | |
2152 | /// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r | |
2153 | /// Providing Type 38 is recommended for backward compatibility.\r | |
2154 | ///\r | |
61ce5861 | 2155 | typedef struct {\r |
2156 | SMBIOS_STRUCTURE Hdr;\r | |
af2dc6a7 | 2157 | UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r |
61ce5861 | 2158 | UINT8 IPMISpecificationRevision;\r |
2159 | UINT8 I2CSlaveAddress;\r | |
2160 | UINT8 NVStorageDeviceAddress;\r | |
2161 | UINT64 BaseAddress;\r | |
2162 | UINT8 BaseAddressModifier_InterruptInfo;\r | |
2163 | UINT8 InterruptNumber;\r | |
2164 | } SMBIOS_TABLE_TYPE38;\r | |
2165 | \r | |
98cb9ae8 | 2166 | ///\r |
af2dc6a7 | 2167 | /// System Power Supply - Power Supply Characteristics.\r |
98cb9ae8 | 2168 | ///\r |
2169 | typedef struct {\r | |
2170 | UINT16 PowerSupplyHotReplaceable:1;\r | |
2171 | UINT16 PowerSupplyPresent :1;\r | |
2172 | UINT16 PowerSupplyUnplugged :1;\r | |
2173 | UINT16 InputVoltageRangeSwitch :4;\r | |
2174 | UINT16 PowerSupplyStatus :3;\r | |
2175 | UINT16 PowerSupplyType :4;\r | |
2176 | UINT16 Reserved :2;\r | |
2177 | } SYS_POWER_SUPPLY_CHARACTERISTICS;\r | |
2178 | \r | |
4135253b | 2179 | ///\r |
af2dc6a7 | 2180 | /// System Power Supply (Type 39).\r |
4135253b | 2181 | ///\r |
7ddba202 SZ |
2182 | /// This structure identifies attributes of a system power supply. One instance\r |
2183 | /// of this record is present for each possible power supply in a system.\r | |
98cb9ae8 | 2184 | ///\r |
61ce5861 | 2185 | typedef struct {\r |
98cb9ae8 | 2186 | SMBIOS_STRUCTURE Hdr;\r |
2187 | UINT8 PowerUnitGroup;\r | |
2188 | SMBIOS_TABLE_STRING Location;\r | |
2189 | SMBIOS_TABLE_STRING DeviceName;\r | |
2190 | SMBIOS_TABLE_STRING Manufacturer;\r | |
2191 | SMBIOS_TABLE_STRING SerialNumber;\r | |
2192 | SMBIOS_TABLE_STRING AssetTagNumber;\r | |
2193 | SMBIOS_TABLE_STRING ModelPartNumber;\r | |
2194 | SMBIOS_TABLE_STRING RevisionLevel;\r | |
2195 | UINT16 MaxPowerCapacity;\r | |
2196 | SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r | |
2197 | UINT16 InputVoltageProbeHandle;\r | |
2198 | UINT16 CoolingDeviceHandle;\r | |
2199 | UINT16 InputCurrentProbeHandle;\r | |
61ce5861 | 2200 | } SMBIOS_TABLE_TYPE39;\r |
2201 | \r | |
bf7ea009 | 2202 | ///\r |
af2dc6a7 | 2203 | /// Additional Information Entry Format. \r |
bf7ea009 | 2204 | ///\r |
61ce5861 | 2205 | typedef struct { \r |
2206 | UINT8 EntryLength; \r | |
2207 | UINT16 ReferencedHandle;\r | |
2208 | UINT8 ReferencedOffset;\r | |
2209 | SMBIOS_TABLE_STRING EntryString;\r | |
2210 | UINT8 Value[1];\r | |
2211 | }ADDITIONAL_INFORMATION_ENTRY;\r | |
2212 | \r | |
4135253b | 2213 | ///\r |
af2dc6a7 | 2214 | /// Additional Information (Type 40).\r |
4135253b | 2215 | ///\r |
98cb9ae8 | 2216 | /// This structure is intended to provide additional information for handling unspecified \r |
2217 | /// enumerated values and interim field updates in another structure. \r | |
2218 | ///\r | |
61ce5861 | 2219 | typedef struct {\r |
2220 | SMBIOS_STRUCTURE Hdr;\r | |
2221 | UINT8 NumberOfAdditionalInformationEntries;\r | |
2222 | ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r | |
2223 | } SMBIOS_TABLE_TYPE40;\r | |
2224 | \r | |
98cb9ae8 | 2225 | ///\r |
af2dc6a7 | 2226 | /// Onboard Devices Extended Information - Onboard Device Types.\r |
98cb9ae8 | 2227 | ///\r |
2228 | typedef enum{\r | |
2229 | OnBoardDeviceExtendedTypeOther = 0x01,\r | |
2230 | OnBoardDeviceExtendedTypeUnknown = 0x02,\r | |
2231 | OnBoardDeviceExtendedTypeVideo = 0x03,\r | |
2232 | OnBoardDeviceExtendedTypeScsiController = 0x04,\r | |
2233 | OnBoardDeviceExtendedTypeEthernet = 0x05,\r | |
2234 | OnBoardDeviceExtendedTypeTokenRing = 0x06,\r | |
2235 | OnBoardDeviceExtendedTypeSound = 0x07,\r | |
2236 | OnBoardDeviceExtendedTypePATAController = 0x08,\r | |
2237 | OnBoardDeviceExtendedTypeSATAController = 0x09,\r | |
2238 | OnBoardDeviceExtendedTypeSASController = 0x0A\r | |
2239 | } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r | |
2240 | \r | |
4135253b | 2241 | ///\r |
af2dc6a7 | 2242 | /// Onboard Devices Extended Information (Type 41).\r |
4135253b | 2243 | ///\r |
98cb9ae8 | 2244 | /// The information in this structure defines the attributes of devices that \r |
2245 | /// are onboard (soldered onto) a system element, usually the baseboard. \r | |
2246 | /// In general, an entry in this table implies that the BIOS has some level of \r | |
2247 | /// control over the enabling of the associated device for use by the system. \r | |
2248 | ///\r | |
61ce5861 | 2249 | typedef struct {\r |
98cb9ae8 | 2250 | SMBIOS_STRUCTURE Hdr;\r |
2251 | SMBIOS_TABLE_STRING ReferenceDesignation;\r | |
af2dc6a7 | 2252 | UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r |
98cb9ae8 | 2253 | UINT8 DeviceTypeInstance;\r |
2254 | UINT16 SegmentGroupNum;\r | |
2255 | UINT8 BusNum;\r | |
7ddba202 | 2256 | UINT8 DevFuncNum;\r |
61ce5861 | 2257 | } SMBIOS_TABLE_TYPE41;\r |
2258 | \r | |
7ddba202 SZ |
2259 | ///\r |
2260 | /// Management Controller Host Interface (Type 42).\r | |
2261 | ///\r | |
2262 | /// The information in this structure defines the attributes of a Management\r | |
2263 | /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r | |
2264 | ///\r | |
2265 | /// Type 42 should be used for management controller host interfaces that use protocols\r | |
2266 | /// other than IPMI or that use multiple protocols on a single host interface type.\r | |
2267 | ///\r | |
2268 | /// This structure should also be provided if IPMI is shared with other protocols\r | |
2269 | /// over the same interface hardware. If IPMI is not shared with other protocols,\r | |
2270 | /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r | |
2271 | /// recommended for backward compatibility. The structures are not required to\r | |
2272 | /// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r | |
2273 | /// simultaneously to provide backward compatibility with IPMI applications or drivers\r | |
2274 | /// that do not yet recognize the Type 42 structure.\r | |
2275 | ///\r | |
2276 | typedef struct {\r | |
2277 | SMBIOS_STRUCTURE Hdr;\r | |
2278 | UINT8 InterfaceType;\r | |
2279 | UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes\r | |
2280 | } SMBIOS_TABLE_TYPE42;\r | |
2281 | \r | |
4135253b | 2282 | ///\r |
2283 | /// Inactive (Type 126)\r | |
2284 | ///\r | |
61ce5861 | 2285 | typedef struct {\r |
2286 | SMBIOS_STRUCTURE Hdr;\r | |
2287 | } SMBIOS_TABLE_TYPE126;\r | |
2288 | \r | |
4135253b | 2289 | ///\r |
2290 | /// End-of-Table (Type 127)\r | |
2291 | ///\r | |
61ce5861 | 2292 | typedef struct {\r |
2293 | SMBIOS_STRUCTURE Hdr;\r | |
2294 | } SMBIOS_TABLE_TYPE127;\r | |
2295 | \r | |
4135253b | 2296 | ///\r |
af2dc6a7 | 2297 | /// Union of all the possible SMBIOS record types.\r |
4135253b | 2298 | ///\r |
61ce5861 | 2299 | typedef union {\r |
2300 | SMBIOS_STRUCTURE *Hdr;\r | |
2301 | SMBIOS_TABLE_TYPE0 *Type0;\r | |
2302 | SMBIOS_TABLE_TYPE1 *Type1;\r | |
2303 | SMBIOS_TABLE_TYPE2 *Type2;\r | |
2304 | SMBIOS_TABLE_TYPE3 *Type3;\r | |
2305 | SMBIOS_TABLE_TYPE4 *Type4;\r | |
2306 | SMBIOS_TABLE_TYPE5 *Type5;\r | |
2307 | SMBIOS_TABLE_TYPE6 *Type6;\r | |
2308 | SMBIOS_TABLE_TYPE7 *Type7;\r | |
2309 | SMBIOS_TABLE_TYPE8 *Type8;\r | |
2310 | SMBIOS_TABLE_TYPE9 *Type9;\r | |
2311 | SMBIOS_TABLE_TYPE10 *Type10;\r | |
2312 | SMBIOS_TABLE_TYPE11 *Type11;\r | |
2313 | SMBIOS_TABLE_TYPE12 *Type12;\r | |
2314 | SMBIOS_TABLE_TYPE13 *Type13;\r | |
2315 | SMBIOS_TABLE_TYPE14 *Type14;\r | |
2316 | SMBIOS_TABLE_TYPE15 *Type15;\r | |
2317 | SMBIOS_TABLE_TYPE16 *Type16;\r | |
2318 | SMBIOS_TABLE_TYPE17 *Type17;\r | |
2319 | SMBIOS_TABLE_TYPE18 *Type18;\r | |
2320 | SMBIOS_TABLE_TYPE19 *Type19;\r | |
2321 | SMBIOS_TABLE_TYPE20 *Type20;\r | |
2322 | SMBIOS_TABLE_TYPE21 *Type21;\r | |
2323 | SMBIOS_TABLE_TYPE22 *Type22;\r | |
2324 | SMBIOS_TABLE_TYPE23 *Type23;\r | |
2325 | SMBIOS_TABLE_TYPE24 *Type24;\r | |
2326 | SMBIOS_TABLE_TYPE25 *Type25;\r | |
2327 | SMBIOS_TABLE_TYPE26 *Type26;\r | |
2328 | SMBIOS_TABLE_TYPE27 *Type27;\r | |
2329 | SMBIOS_TABLE_TYPE28 *Type28;\r | |
2330 | SMBIOS_TABLE_TYPE29 *Type29;\r | |
2331 | SMBIOS_TABLE_TYPE30 *Type30;\r | |
2332 | SMBIOS_TABLE_TYPE31 *Type31;\r | |
2333 | SMBIOS_TABLE_TYPE32 *Type32;\r | |
2334 | SMBIOS_TABLE_TYPE33 *Type33;\r | |
2335 | SMBIOS_TABLE_TYPE34 *Type34;\r | |
2336 | SMBIOS_TABLE_TYPE35 *Type35;\r | |
2337 | SMBIOS_TABLE_TYPE36 *Type36;\r | |
2338 | SMBIOS_TABLE_TYPE37 *Type37;\r | |
2339 | SMBIOS_TABLE_TYPE38 *Type38;\r | |
2340 | SMBIOS_TABLE_TYPE39 *Type39;\r | |
2341 | SMBIOS_TABLE_TYPE40 *Type40;\r | |
2342 | SMBIOS_TABLE_TYPE41 *Type41;\r | |
884f9295 | 2343 | SMBIOS_TABLE_TYPE42 *Type42;\r |
61ce5861 | 2344 | SMBIOS_TABLE_TYPE126 *Type126;\r |
2345 | SMBIOS_TABLE_TYPE127 *Type127;\r | |
2346 | UINT8 *Raw;\r | |
2347 | } SMBIOS_STRUCTURE_POINTER;\r | |
2348 | \r | |
766f4bc1 | 2349 | #pragma pack()\r |
2350 | \r | |
a7ed1e2e | 2351 | #endif\r |