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a7ed1e2e | 1 | /** @file\r |
6cd35c62 | 2 | Industry Standard Definitions of SMBIOS Table Specification v3.0.0.\r |
a7ed1e2e | 3 | \r |
6cd35c62 | 4 | Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r |
af2dc6a7 | 5 | This program and the accompanying materials are licensed and made available under \r |
6 | the terms and conditions of the BSD License that accompanies this distribution. \r | |
7 | The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php. \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
a7ed1e2e | 12 | \r |
a7ed1e2e | 13 | **/\r |
14 | \r | |
15 | #ifndef __SMBIOS_STANDARD_H__\r | |
16 | #define __SMBIOS_STANDARD_H__\r | |
98cb9ae8 | 17 | \r |
f2d0889f | 18 | ///\r |
19 | /// Reference SMBIOS 2.6, chapter 3.1.2.\r | |
20 | /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r | |
21 | /// use by this specification.\r | |
22 | ///\r | |
23 | #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r | |
24 | \r | |
7ddba202 SZ |
25 | ///\r |
26 | /// Reference SMBIOS 2.7, chapter 6.1.2.\r | |
27 | /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r | |
28 | /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r | |
29 | /// This number is not used for any other purpose by the SMBIOS specification.\r | |
30 | ///\r | |
31 | #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r | |
32 | \r | |
f2d0889f | 33 | ///\r |
af2dc6a7 | 34 | /// Reference SMBIOS 2.6, chapter 3.1.3.\r |
35 | /// Each text string is limited to 64 significant characters due to system MIF limitations.\r | |
7ddba202 SZ |
36 | /// Reference SMBIOS 2.7, chapter 6.1.3.\r |
37 | /// It will have no limit on the length of each individual text string.\r | |
f2d0889f | 38 | ///\r |
39 | #define SMBIOS_STRING_MAX_LENGTH 64\r | |
40 | \r | |
41 | ///\r | |
42 | /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r | |
43 | /// Upper-level software that interprets the SMBIOS structure-table should bypass an \r | |
44 | /// Inactive structure just like a structure type that the software does not recognize.\r | |
45 | ///\r | |
46 | #define SMBIOS_TYPE_INACTIVE 0x007E \r | |
47 | \r | |
48 | ///\r | |
49 | /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r | |
50 | /// The end-of-table indicator is used in the last physical structure in a table\r | |
51 | ///\r | |
52 | #define SMBIOS_TYPE_END_OF_TABLE 0x007F\r | |
53 | \r | |
4135253b | 54 | ///\r |
af2dc6a7 | 55 | /// Smbios Table Entry Point Structure.\r |
4135253b | 56 | ///\r |
766f4bc1 | 57 | #pragma pack(1)\r |
a7ed1e2e | 58 | typedef struct {\r |
59 | UINT8 AnchorString[4];\r | |
60 | UINT8 EntryPointStructureChecksum;\r | |
61 | UINT8 EntryPointLength;\r | |
62 | UINT8 MajorVersion;\r | |
63 | UINT8 MinorVersion;\r | |
64 | UINT16 MaxStructureSize;\r | |
65 | UINT8 EntryPointRevision;\r | |
66 | UINT8 FormattedArea[5];\r | |
67 | UINT8 IntermediateAnchorString[5];\r | |
68 | UINT8 IntermediateChecksum;\r | |
69 | UINT16 TableLength;\r | |
70 | UINT32 TableAddress;\r | |
71 | UINT16 NumberOfSmbiosStructures;\r | |
72 | UINT8 SmbiosBcdRevision;\r | |
73 | } SMBIOS_TABLE_ENTRY_POINT;\r | |
74 | \r | |
6cd35c62 EL |
75 | typedef struct {\r |
76 | UINT8 AnchorString[5];\r | |
77 | UINT8 EntryPointStructureChecksum;\r | |
78 | UINT8 EntryPointLength;\r | |
79 | UINT8 MajorVersion;\r | |
80 | UINT8 MinorVersion;\r | |
81 | UINT8 DocRev;\r | |
82 | UINT8 EntryPointRevision;\r | |
83 | UINT8 Reserved;\r | |
84 | UINT32 TableMaximumSize;\r | |
85 | UINT64 TableAddress;\r | |
86 | } SMBIOS_TABLE_3_0_ENTRY_POINT;\r | |
87 | \r | |
ec8432e5 | 88 | ///\r |
af2dc6a7 | 89 | /// The Smbios structure header.\r |
ec8432e5 | 90 | ///\r |
a7ed1e2e | 91 | typedef struct {\r |
92 | UINT8 Type;\r | |
93 | UINT8 Length;\r | |
94 | UINT16 Handle;\r | |
95 | } SMBIOS_STRUCTURE;\r | |
96 | \r | |
bf7ea009 | 97 | ///\r |
98 | /// String Number for a Null terminated string, 00h stands for no string available.\r | |
99 | ///\r | |
61ce5861 | 100 | typedef UINT8 SMBIOS_TABLE_STRING;\r |
101 | \r | |
98cb9ae8 | 102 | ///\r |
7ddba202 SZ |
103 | /// BIOS Characteristics\r |
104 | /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r | |
98cb9ae8 | 105 | ///\r |
106 | typedef struct {\r | |
af2dc6a7 | 107 | UINT32 Reserved :2; ///< Bits 0-1.\r |
7ddba202 SZ |
108 | UINT32 Unknown :1;\r |
109 | UINT32 BiosCharacteristicsNotSupported :1;\r | |
110 | UINT32 IsaIsSupported :1;\r | |
98cb9ae8 | 111 | UINT32 McaIsSupported :1;\r |
112 | UINT32 EisaIsSupported :1;\r | |
113 | UINT32 PciIsSupported :1;\r | |
114 | UINT32 PcmciaIsSupported :1;\r | |
115 | UINT32 PlugAndPlayIsSupported :1;\r | |
116 | UINT32 ApmIsSupported :1;\r | |
117 | UINT32 BiosIsUpgradable :1;\r | |
118 | UINT32 BiosShadowingAllowed :1;\r | |
119 | UINT32 VlVesaIsSupported :1;\r | |
120 | UINT32 EscdSupportIsAvailable :1;\r | |
121 | UINT32 BootFromCdIsSupported :1;\r | |
122 | UINT32 SelectableBootIsSupported :1;\r | |
123 | UINT32 RomBiosIsSocketed :1;\r | |
124 | UINT32 BootFromPcmciaIsSupported :1;\r | |
125 | UINT32 EDDSpecificationIsSupported :1;\r | |
126 | UINT32 JapaneseNecFloppyIsSupported :1;\r | |
127 | UINT32 JapaneseToshibaFloppyIsSupported :1;\r | |
128 | UINT32 Floppy525_360IsSupported :1;\r | |
129 | UINT32 Floppy525_12IsSupported :1;\r | |
130 | UINT32 Floppy35_720IsSupported :1;\r | |
131 | UINT32 Floppy35_288IsSupported :1;\r | |
132 | UINT32 PrintScreenIsSupported :1;\r | |
133 | UINT32 Keyboard8042IsSupported :1;\r | |
134 | UINT32 SerialIsSupported :1;\r | |
135 | UINT32 PrinterIsSupported :1;\r | |
136 | UINT32 CgaMonoIsSupported :1;\r | |
137 | UINT32 NecPc98 :1;\r | |
6800ac83 | 138 | UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r |
139 | ///< and bits 48-63 reserved for System Vendor. \r | |
98cb9ae8 | 140 | } MISC_BIOS_CHARACTERISTICS;\r |
141 | \r | |
142 | ///\r | |
7ddba202 SZ |
143 | /// BIOS Characteristics Extension Byte 1.\r |
144 | /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r | |
145 | /// within the BIOS Information structure.\r | |
98cb9ae8 | 146 | ///\r |
147 | typedef struct {\r | |
148 | UINT8 AcpiIsSupported :1;\r | |
7ddba202 SZ |
149 | UINT8 UsbLegacyIsSupported :1;\r |
150 | UINT8 AgpIsSupported :1;\r | |
119c1688 | 151 | UINT8 I2OBootIsSupported :1;\r |
98cb9ae8 | 152 | UINT8 Ls120BootIsSupported :1;\r |
153 | UINT8 AtapiZipDriveBootIsSupported :1;\r | |
154 | UINT8 Boot1394IsSupported :1;\r | |
155 | UINT8 SmartBatteryIsSupported :1;\r | |
156 | } MBCE_BIOS_RESERVED;\r | |
157 | \r | |
158 | ///\r | |
af2dc6a7 | 159 | /// BIOS Characteristics Extension Byte 2.\r |
7ddba202 | 160 | /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r |
98cb9ae8 | 161 | /// within the BIOS Information structure.\r |
162 | ///\r | |
163 | typedef struct {\r | |
164 | UINT8 BiosBootSpecIsSupported :1;\r | |
7ddba202 SZ |
165 | UINT8 FunctionKeyNetworkBootIsSupported :1;\r |
166 | UINT8 TargetContentDistributionEnabled :1;\r | |
167 | UINT8 UefiSpecificationSupported :1;\r | |
168 | UINT8 VirtualMachineSupported :1;\r | |
169 | UINT8 ExtensionByte2Reserved :3;\r | |
98cb9ae8 | 170 | } MBCE_SYSTEM_RESERVED;\r |
171 | \r | |
172 | ///\r | |
af2dc6a7 | 173 | /// BIOS Characteristics Extension Bytes.\r |
98cb9ae8 | 174 | ///\r |
175 | typedef struct {\r | |
176 | MBCE_BIOS_RESERVED BiosReserved;\r | |
177 | MBCE_SYSTEM_RESERVED SystemReserved;\r | |
98cb9ae8 | 178 | } MISC_BIOS_CHARACTERISTICS_EXTENSION;\r |
179 | \r | |
4135253b | 180 | ///\r |
af2dc6a7 | 181 | /// BIOS Information (Type 0).\r |
4135253b | 182 | ///\r |
61ce5861 | 183 | typedef struct {\r |
98cb9ae8 | 184 | SMBIOS_STRUCTURE Hdr;\r |
185 | SMBIOS_TABLE_STRING Vendor;\r | |
186 | SMBIOS_TABLE_STRING BiosVersion;\r | |
187 | UINT16 BiosSegment;\r | |
188 | SMBIOS_TABLE_STRING BiosReleaseDate;\r | |
189 | UINT8 BiosSize;\r | |
190 | MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r | |
191 | UINT8 BIOSCharacteristicsExtensionBytes[2];\r | |
192 | UINT8 SystemBiosMajorRelease;\r | |
193 | UINT8 SystemBiosMinorRelease;\r | |
194 | UINT8 EmbeddedControllerFirmwareMajorRelease;\r | |
195 | UINT8 EmbeddedControllerFirmwareMinorRelease;\r | |
61ce5861 | 196 | } SMBIOS_TABLE_TYPE0;\r |
197 | \r | |
98cb9ae8 | 198 | ///\r |
af2dc6a7 | 199 | /// System Wake-up Type.\r |
98cb9ae8 | 200 | ///\r |
201 | typedef enum { \r | |
202 | SystemWakeupTypeReserved = 0x00,\r | |
203 | SystemWakeupTypeOther = 0x01,\r | |
204 | SystemWakeupTypeUnknown = 0x02,\r | |
205 | SystemWakeupTypeApmTimer = 0x03,\r | |
206 | SystemWakeupTypeModemRing = 0x04,\r | |
207 | SystemWakeupTypeLanRemote = 0x05,\r | |
208 | SystemWakeupTypePowerSwitch = 0x06,\r | |
209 | SystemWakeupTypePciPme = 0x07,\r | |
210 | SystemWakeupTypeAcPowerRestored = 0x08\r | |
211 | } MISC_SYSTEM_WAKEUP_TYPE;\r | |
212 | \r | |
4135253b | 213 | ///\r |
af2dc6a7 | 214 | /// System Information (Type 1).\r |
98cb9ae8 | 215 | /// \r |
216 | /// The information in this structure defines attributes of the overall system and is \r | |
217 | /// intended to be associated with the Component ID group of the system's MIF.\r | |
218 | /// An SMBIOS implementation is associated with a single system instance and contains \r | |
219 | /// one and only one System Information (Type 1) structure.\r | |
4135253b | 220 | ///\r |
61ce5861 | 221 | typedef struct {\r |
98cb9ae8 | 222 | SMBIOS_STRUCTURE Hdr;\r |
223 | SMBIOS_TABLE_STRING Manufacturer;\r | |
224 | SMBIOS_TABLE_STRING ProductName;\r | |
225 | SMBIOS_TABLE_STRING Version;\r | |
226 | SMBIOS_TABLE_STRING SerialNumber;\r | |
227 | GUID Uuid;\r | |
af2dc6a7 | 228 | UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r |
98cb9ae8 | 229 | SMBIOS_TABLE_STRING SKUNumber;\r |
230 | SMBIOS_TABLE_STRING Family;\r | |
61ce5861 | 231 | } SMBIOS_TABLE_TYPE1;\r |
232 | \r | |
98cb9ae8 | 233 | ///\r |
af2dc6a7 | 234 | /// Base Board - Feature Flags. \r |
98cb9ae8 | 235 | ///\r |
236 | typedef struct {\r | |
237 | UINT8 Motherboard :1;\r | |
238 | UINT8 RequiresDaughterCard :1;\r | |
239 | UINT8 Removable :1;\r | |
240 | UINT8 Replaceable :1;\r | |
241 | UINT8 HotSwappable :1;\r | |
242 | UINT8 Reserved :3;\r | |
243 | } BASE_BOARD_FEATURE_FLAGS;\r | |
244 | \r | |
245 | ///\r | |
af2dc6a7 | 246 | /// Base Board - Board Type.\r |
98cb9ae8 | 247 | ///\r |
248 | typedef enum { \r | |
249 | BaseBoardTypeUnknown = 0x1,\r | |
250 | BaseBoardTypeOther = 0x2,\r | |
251 | BaseBoardTypeServerBlade = 0x3,\r | |
252 | BaseBoardTypeConnectivitySwitch = 0x4,\r | |
253 | BaseBoardTypeSystemManagementModule = 0x5,\r | |
254 | BaseBoardTypeProcessorModule = 0x6,\r | |
255 | BaseBoardTypeIOModule = 0x7,\r | |
256 | BaseBoardTypeMemoryModule = 0x8,\r | |
257 | BaseBoardTypeDaughterBoard = 0x9,\r | |
258 | BaseBoardTypeMotherBoard = 0xA,\r | |
259 | BaseBoardTypeProcessorMemoryModule = 0xB,\r | |
260 | BaseBoardTypeProcessorIOModule = 0xC,\r | |
261 | BaseBoardTypeInterconnectBoard = 0xD\r | |
262 | } BASE_BOARD_TYPE;\r | |
263 | \r | |
4135253b | 264 | ///\r |
af2dc6a7 | 265 | /// Base Board (or Module) Information (Type 2).\r |
4135253b | 266 | ///\r |
1f9f8414 | 267 | /// The information in this structure defines attributes of a system baseboard - \r |
98cb9ae8 | 268 | /// for example a motherboard, planar, or server blade or other standard system module.\r |
269 | ///\r | |
61ce5861 | 270 | typedef struct {\r |
98cb9ae8 | 271 | SMBIOS_STRUCTURE Hdr;\r |
272 | SMBIOS_TABLE_STRING Manufacturer;\r | |
273 | SMBIOS_TABLE_STRING ProductName;\r | |
274 | SMBIOS_TABLE_STRING Version;\r | |
275 | SMBIOS_TABLE_STRING SerialNumber;\r | |
276 | SMBIOS_TABLE_STRING AssetTag;\r | |
277 | BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r | |
278 | SMBIOS_TABLE_STRING LocationInChassis;\r | |
279 | UINT16 ChassisHandle;\r | |
af2dc6a7 | 280 | UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r |
98cb9ae8 | 281 | UINT8 NumberOfContainedObjectHandles;\r |
282 | UINT16 ContainedObjectHandles[1];\r | |
61ce5861 | 283 | } SMBIOS_TABLE_TYPE2;\r |
284 | \r | |
98cb9ae8 | 285 | ///\r |
286 | /// System Enclosure or Chassis Types\r | |
287 | ///\r | |
288 | typedef enum { \r | |
289 | MiscChassisTypeOther = 0x01,\r | |
290 | MiscChassisTypeUnknown = 0x02,\r | |
291 | MiscChassisTypeDeskTop = 0x03,\r | |
292 | MiscChassisTypeLowProfileDesktop = 0x04,\r | |
293 | MiscChassisTypePizzaBox = 0x05,\r | |
294 | MiscChassisTypeMiniTower = 0x06,\r | |
295 | MiscChassisTypeTower = 0x07,\r | |
296 | MiscChassisTypePortable = 0x08,\r | |
297 | MiscChassisTypeLapTop = 0x09,\r | |
298 | MiscChassisTypeNotebook = 0x0A,\r | |
299 | MiscChassisTypeHandHeld = 0x0B,\r | |
300 | MiscChassisTypeDockingStation = 0x0C,\r | |
301 | MiscChassisTypeAllInOne = 0x0D,\r | |
302 | MiscChassisTypeSubNotebook = 0x0E,\r | |
303 | MiscChassisTypeSpaceSaving = 0x0F,\r | |
304 | MiscChassisTypeLunchBox = 0x10,\r | |
305 | MiscChassisTypeMainServerChassis = 0x11,\r | |
306 | MiscChassisTypeExpansionChassis = 0x12,\r | |
307 | MiscChassisTypeSubChassis = 0x13,\r | |
308 | MiscChassisTypeBusExpansionChassis = 0x14,\r | |
309 | MiscChassisTypePeripheralChassis = 0x15,\r | |
310 | MiscChassisTypeRaidChassis = 0x16,\r | |
311 | MiscChassisTypeRackMountChassis = 0x17,\r | |
312 | MiscChassisTypeSealedCasePc = 0x18,\r | |
313 | MiscChassisMultiSystemChassis = 0x19,\r | |
314 | MiscChassisCompactPCI = 0x1A,\r | |
315 | MiscChassisAdvancedTCA = 0x1B,\r | |
316 | MiscChassisBlade = 0x1C,\r | |
6cd35c62 EL |
317 | MiscChassisBladeEnclosure = 0x1D,\r |
318 | MiscChassisTablet = 0x1E,\r | |
319 | MiscChassisConvertible = 0x1F,\r | |
320 | MiscChassisDetachable = 0x20\r | |
98cb9ae8 | 321 | } MISC_CHASSIS_TYPE;\r |
322 | \r | |
323 | ///\r | |
af2dc6a7 | 324 | /// System Enclosure or Chassis States .\r |
98cb9ae8 | 325 | ///\r |
326 | typedef enum { \r | |
327 | ChassisStateOther = 0x01,\r | |
328 | ChassisStateUnknown = 0x02,\r | |
329 | ChassisStateSafe = 0x03,\r | |
330 | ChassisStateWarning = 0x04,\r | |
331 | ChassisStateCritical = 0x05,\r | |
332 | ChassisStateNonRecoverable = 0x06\r | |
333 | } MISC_CHASSIS_STATE;\r | |
334 | \r | |
335 | ///\r | |
af2dc6a7 | 336 | /// System Enclosure or Chassis Security Status.\r |
98cb9ae8 | 337 | ///\r |
338 | typedef enum { \r | |
339 | ChassisSecurityStatusOther = 0x01,\r | |
340 | ChassisSecurityStatusUnknown = 0x02,\r | |
341 | ChassisSecurityStatusNone = 0x03,\r | |
342 | ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r | |
343 | ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r | |
344 | } MISC_CHASSIS_SECURITY_STATE;\r | |
345 | \r | |
bf7ea009 | 346 | ///\r |
347 | /// Contained Element record\r | |
348 | ///\r | |
61ce5861 | 349 | typedef struct {\r |
350 | UINT8 ContainedElementType;\r | |
351 | UINT8 ContainedElementMinimum;\r | |
352 | UINT8 ContainedElementMaximum;\r | |
353 | } CONTAINED_ELEMENT;\r | |
354 | \r | |
98cb9ae8 | 355 | \r |
4135253b | 356 | ///\r |
af2dc6a7 | 357 | /// System Enclosure or Chassis (Type 3).\r |
4135253b | 358 | ///\r |
98cb9ae8 | 359 | /// The information in this structure defines attributes of the system's mechanical enclosure(s). \r |
360 | /// For example, if a system included a separate enclosure for its peripheral devices, \r | |
361 | /// two structures would be returned: one for the main, system enclosure and the second for\r | |
362 | /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r | |
363 | /// support the population of the CIM_Chassis class. \r | |
364 | ///\r | |
61ce5861 | 365 | typedef struct {\r |
98cb9ae8 | 366 | SMBIOS_STRUCTURE Hdr;\r |
367 | SMBIOS_TABLE_STRING Manufacturer;\r | |
368 | UINT8 Type;\r | |
369 | SMBIOS_TABLE_STRING Version;\r | |
370 | SMBIOS_TABLE_STRING SerialNumber;\r | |
371 | SMBIOS_TABLE_STRING AssetTag;\r | |
af2dc6a7 | 372 | UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r |
373 | UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r | |
374 | UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r | |
375 | UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r | |
98cb9ae8 | 376 | UINT8 OemDefined[4];\r |
377 | UINT8 Height;\r | |
378 | UINT8 NumberofPowerCords;\r | |
379 | UINT8 ContainedElementCount;\r | |
380 | UINT8 ContainedElementRecordLength;\r | |
381 | CONTAINED_ELEMENT ContainedElements[1];\r | |
61ce5861 | 382 | } SMBIOS_TABLE_TYPE3;\r |
383 | \r | |
98cb9ae8 | 384 | ///\r |
af2dc6a7 | 385 | /// Processor Information - Processor Type.\r |
98cb9ae8 | 386 | ///\r |
387 | typedef enum {\r | |
388 | ProcessorOther = 0x01,\r | |
389 | ProcessorUnknown = 0x02,\r | |
390 | CentralProcessor = 0x03,\r | |
391 | MathProcessor = 0x04,\r | |
392 | DspProcessor = 0x05,\r | |
393 | VideoProcessor = 0x06\r | |
394 | } PROCESSOR_TYPE_DATA;\r | |
395 | \r | |
396 | ///\r | |
af2dc6a7 | 397 | /// Processor Information - Processor Family.\r |
98cb9ae8 | 398 | ///\r |
399 | typedef enum {\r | |
400 | ProcessorFamilyOther = 0x01, \r | |
401 | ProcessorFamilyUnknown = 0x02,\r | |
402 | ProcessorFamily8086 = 0x03, \r | |
403 | ProcessorFamily80286 = 0x04,\r | |
404 | ProcessorFamilyIntel386 = 0x05, \r | |
405 | ProcessorFamilyIntel486 = 0x06,\r | |
406 | ProcessorFamily8087 = 0x07,\r | |
407 | ProcessorFamily80287 = 0x08,\r | |
408 | ProcessorFamily80387 = 0x09, \r | |
409 | ProcessorFamily80487 = 0x0A,\r | |
410 | ProcessorFamilyPentium = 0x0B, \r | |
411 | ProcessorFamilyPentiumPro = 0x0C,\r | |
412 | ProcessorFamilyPentiumII = 0x0D,\r | |
413 | ProcessorFamilyPentiumMMX = 0x0E,\r | |
414 | ProcessorFamilyCeleron = 0x0F,\r | |
415 | ProcessorFamilyPentiumIIXeon = 0x10,\r | |
416 | ProcessorFamilyPentiumIII = 0x11, \r | |
417 | ProcessorFamilyM1 = 0x12,\r | |
418 | ProcessorFamilyM2 = 0x13,\r | |
119c1688 SZ |
419 | ProcessorFamilyIntelCeleronM = 0x14,\r |
420 | ProcessorFamilyIntelPentium4Ht = 0x15,\r | |
98cb9ae8 | 421 | ProcessorFamilyAmdDuron = 0x18,\r |
422 | ProcessorFamilyK5 = 0x19, \r | |
423 | ProcessorFamilyK6 = 0x1A,\r | |
424 | ProcessorFamilyK6_2 = 0x1B,\r | |
425 | ProcessorFamilyK6_3 = 0x1C,\r | |
426 | ProcessorFamilyAmdAthlon = 0x1D,\r | |
427 | ProcessorFamilyAmd29000 = 0x1E,\r | |
428 | ProcessorFamilyK6_2Plus = 0x1F,\r | |
429 | ProcessorFamilyPowerPC = 0x20,\r | |
430 | ProcessorFamilyPowerPC601 = 0x21,\r | |
431 | ProcessorFamilyPowerPC603 = 0x22,\r | |
432 | ProcessorFamilyPowerPC603Plus = 0x23,\r | |
433 | ProcessorFamilyPowerPC604 = 0x24,\r | |
434 | ProcessorFamilyPowerPC620 = 0x25,\r | |
435 | ProcessorFamilyPowerPCx704 = 0x26,\r | |
436 | ProcessorFamilyPowerPC750 = 0x27,\r | |
3507ab19 | 437 | ProcessorFamilyIntelCoreDuo = 0x28,\r |
438 | ProcessorFamilyIntelCoreDuoMobile = 0x29,\r | |
439 | ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r | |
440 | ProcessorFamilyIntelAtom = 0x2B,\r | |
6cd35c62 | 441 | ProcessorFamilyIntelCoreM = 0x2C,\r |
4a228334 | 442 | ProcessorFamilyAlpha = 0x30,\r |
98cb9ae8 | 443 | ProcessorFamilyAlpha21064 = 0x31,\r |
444 | ProcessorFamilyAlpha21066 = 0x32,\r | |
445 | ProcessorFamilyAlpha21164 = 0x33,\r | |
446 | ProcessorFamilyAlpha21164PC = 0x34,\r | |
447 | ProcessorFamilyAlpha21164a = 0x35,\r | |
448 | ProcessorFamilyAlpha21264 = 0x36,\r | |
449 | ProcessorFamilyAlpha21364 = 0x37,\r | |
7ddba202 SZ |
450 | ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r |
451 | ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r | |
452 | ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r | |
453 | ProcessorFamilyAmdOpteron6100Series = 0x3B,\r | |
454 | ProcessorFamilyAmdOpteron4100Series = 0x3C,\r | |
455 | ProcessorFamilyAmdOpteron6200Series = 0x3D,\r | |
456 | ProcessorFamilyAmdOpteron4200Series = 0x3E,\r | |
4a228334 | 457 | ProcessorFamilyAmdFxSeries = 0x3F,\r |
98cb9ae8 | 458 | ProcessorFamilyMips = 0x40,\r |
459 | ProcessorFamilyMIPSR4000 = 0x41,\r | |
460 | ProcessorFamilyMIPSR4200 = 0x42,\r | |
461 | ProcessorFamilyMIPSR4400 = 0x43,\r | |
462 | ProcessorFamilyMIPSR4600 = 0x44,\r | |
463 | ProcessorFamilyMIPSR10000 = 0x45,\r | |
7ddba202 SZ |
464 | ProcessorFamilyAmdCSeries = 0x46,\r |
465 | ProcessorFamilyAmdESeries = 0x47,\r | |
4a228334 | 466 | ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r |
7ddba202 | 467 | ProcessorFamilyAmdGSeries = 0x49,\r |
4a228334 EL |
468 | ProcessorFamilyAmdZSeries = 0x4A,\r |
469 | ProcessorFamilyAmdRSeries = 0x4B,\r | |
470 | ProcessorFamilyAmdOpteron4300 = 0x4C,\r | |
471 | ProcessorFamilyAmdOpteron6300 = 0x4D,\r | |
472 | ProcessorFamilyAmdOpteron3300 = 0x4E,\r | |
473 | ProcessorFamilyAmdFireProSeries = 0x4F,\r | |
98cb9ae8 | 474 | ProcessorFamilySparc = 0x50,\r |
475 | ProcessorFamilySuperSparc = 0x51,\r | |
476 | ProcessorFamilymicroSparcII = 0x52,\r | |
477 | ProcessorFamilymicroSparcIIep = 0x53,\r | |
478 | ProcessorFamilyUltraSparc = 0x54,\r | |
479 | ProcessorFamilyUltraSparcII = 0x55,\r | |
4a228334 | 480 | ProcessorFamilyUltraSparcIii = 0x56,\r |
98cb9ae8 | 481 | ProcessorFamilyUltraSparcIII = 0x57,\r |
482 | ProcessorFamilyUltraSparcIIIi = 0x58,\r | |
483 | ProcessorFamily68040 = 0x60,\r | |
484 | ProcessorFamily68xxx = 0x61,\r | |
485 | ProcessorFamily68000 = 0x62,\r | |
486 | ProcessorFamily68010 = 0x63,\r | |
487 | ProcessorFamily68020 = 0x64,\r | |
488 | ProcessorFamily68030 = 0x65,\r | |
6cd35c62 EL |
489 | ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r |
490 | ProcessorFamilyAmdOpteronX1000Series = 0x67,\r | |
491 | ProcessorFamilyAmdOpteronX2000Series = 0x68,\r | |
98cb9ae8 | 492 | ProcessorFamilyHobbit = 0x70,\r |
493 | ProcessorFamilyCrusoeTM5000 = 0x78,\r | |
494 | ProcessorFamilyCrusoeTM3000 = 0x79,\r | |
495 | ProcessorFamilyEfficeonTM8000 = 0x7A,\r | |
496 | ProcessorFamilyWeitek = 0x80,\r | |
497 | ProcessorFamilyItanium = 0x82,\r | |
498 | ProcessorFamilyAmdAthlon64 = 0x83,\r | |
499 | ProcessorFamilyAmdOpteron = 0x84,\r | |
500 | ProcessorFamilyAmdSempron = 0x85,\r | |
501 | ProcessorFamilyAmdTurion64Mobile = 0x86,\r | |
502 | ProcessorFamilyDualCoreAmdOpteron = 0x87,\r | |
503 | ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r | |
504 | ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r | |
3507ab19 | 505 | ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r |
506 | ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r | |
507 | ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r | |
508 | ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r | |
509 | ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r | |
510 | ProcessorFamilyAmdAthlonX2DualCore = 0x8F, \r | |
98cb9ae8 | 511 | ProcessorFamilyPARISC = 0x90,\r |
512 | ProcessorFamilyPaRisc8500 = 0x91,\r | |
513 | ProcessorFamilyPaRisc8000 = 0x92,\r | |
514 | ProcessorFamilyPaRisc7300LC = 0x93,\r | |
515 | ProcessorFamilyPaRisc7200 = 0x94,\r | |
516 | ProcessorFamilyPaRisc7100LC = 0x95,\r | |
517 | ProcessorFamilyPaRisc7100 = 0x96,\r | |
518 | ProcessorFamilyV30 = 0xA0,\r | |
3507ab19 | 519 | ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r |
520 | ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r | |
521 | ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r | |
522 | ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r | |
523 | ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r | |
524 | ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r | |
525 | ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r | |
526 | ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r | |
527 | ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r | |
528 | ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r | |
529 | ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r | |
530 | ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r | |
531 | ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r | |
532 | ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r | |
533 | ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r | |
98cb9ae8 | 534 | ProcessorFamilyPentiumIIIXeon = 0xB0,\r |
535 | ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r | |
536 | ProcessorFamilyPentium4 = 0xB2,\r | |
537 | ProcessorFamilyIntelXeon = 0xB3,\r | |
538 | ProcessorFamilyAS400 = 0xB4,\r | |
539 | ProcessorFamilyIntelXeonMP = 0xB5,\r | |
540 | ProcessorFamilyAMDAthlonXP = 0xB6,\r | |
541 | ProcessorFamilyAMDAthlonMP = 0xB7,\r | |
542 | ProcessorFamilyIntelItanium2 = 0xB8,\r | |
543 | ProcessorFamilyIntelPentiumM = 0xB9,\r | |
544 | ProcessorFamilyIntelCeleronD = 0xBA,\r | |
545 | ProcessorFamilyIntelPentiumD = 0xBB,\r | |
546 | ProcessorFamilyIntelPentiumEx = 0xBC,\r | |
4a228334 | 547 | ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r |
98cb9ae8 | 548 | ProcessorFamilyReserved = 0xBE,\r |
549 | ProcessorFamilyIntelCore2 = 0xBF,\r | |
3507ab19 | 550 | ProcessorFamilyIntelCore2Solo = 0xC0,\r |
551 | ProcessorFamilyIntelCore2Extreme = 0xC1,\r | |
552 | ProcessorFamilyIntelCore2Quad = 0xC2,\r | |
553 | ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r | |
554 | ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r | |
555 | ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r | |
556 | ProcessorFamilyIntelCoreI7 = 0xC6,\r | |
557 | ProcessorFamilyDualCoreIntelCeleron = 0xC7, \r | |
98cb9ae8 | 558 | ProcessorFamilyIBM390 = 0xC8,\r |
559 | ProcessorFamilyG4 = 0xC9,\r | |
560 | ProcessorFamilyG5 = 0xCA,\r | |
561 | ProcessorFamilyG6 = 0xCB,\r | |
4a228334 | 562 | ProcessorFamilyzArchitecture = 0xCC,\r |
7ddba202 SZ |
563 | ProcessorFamilyIntelCoreI5 = 0xCD,\r |
564 | ProcessorFamilyIntelCoreI3 = 0xCE,\r | |
98cb9ae8 | 565 | ProcessorFamilyViaC7M = 0xD2,\r |
566 | ProcessorFamilyViaC7D = 0xD3,\r | |
567 | ProcessorFamilyViaC7 = 0xD4,\r | |
568 | ProcessorFamilyViaEden = 0xD5,\r | |
3507ab19 | 569 | ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r |
570 | ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r | |
571 | ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r | |
7ddba202 | 572 | ProcessorFamilyViaNano = 0xD9,\r |
3507ab19 | 573 | ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r |
574 | ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r | |
575 | ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r | |
576 | ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r | |
577 | ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r | |
7ddba202 | 578 | ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r |
4a228334 EL |
579 | ProcessorFamilyAmdOpteron3000Series = 0xE4,\r |
580 | ProcessorFamilyAmdSempronII = 0xE5,\r | |
3507ab19 | 581 | ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r |
582 | ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r | |
583 | ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r | |
584 | ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r | |
585 | ProcessorFamilyAmdAthlonDualCore = 0xEA,\r | |
586 | ProcessorFamilyAmdSempronSI = 0xEB,\r | |
7ddba202 SZ |
587 | ProcessorFamilyAmdPhenomII = 0xEC,\r |
588 | ProcessorFamilyAmdAthlonII = 0xED,\r | |
589 | ProcessorFamilySixCoreAmdOpteron = 0xEE,\r | |
590 | ProcessorFamilyAmdSempronM = 0xEF,\r | |
98cb9ae8 | 591 | ProcessorFamilyi860 = 0xFA,\r |
592 | ProcessorFamilyi960 = 0xFB,\r | |
593 | ProcessorFamilyIndicatorFamily2 = 0xFE,\r | |
594 | ProcessorFamilyReserved1 = 0xFF\r | |
595 | } PROCESSOR_FAMILY_DATA;\r | |
596 | \r | |
f9ed6c93 YL |
597 | ///\r |
598 | /// Processor Information2 - Processor Family2.\r | |
599 | ///\r | |
600 | typedef enum {\r | |
601 | ProcessorFamilySH3 = 0x0104,\r | |
602 | ProcessorFamilySH4 = 0x0105,\r | |
603 | ProcessorFamilyARM = 0x0118,\r | |
604 | ProcessorFamilyStrongARM = 0x0119,\r | |
605 | ProcessorFamily6x86 = 0x012C,\r | |
606 | ProcessorFamilyMediaGX = 0x012D,\r | |
607 | ProcessorFamilyMII = 0x012E,\r | |
608 | ProcessorFamilyWinChip = 0x0140,\r | |
609 | ProcessorFamilyDSP = 0x015E,\r | |
610 | ProcessorFamilyVideoProcessor = 0x01F4\r | |
611 | } PROCESSOR_FAMILY2_DATA;\r | |
612 | \r | |
98cb9ae8 | 613 | ///\r |
af2dc6a7 | 614 | /// Processor Information - Voltage. \r |
98cb9ae8 | 615 | ///\r |
616 | typedef struct {\r | |
6800ac83 | 617 | UINT8 ProcessorVoltageCapability5V :1; \r |
618 | UINT8 ProcessorVoltageCapability3_3V :1; \r | |
619 | UINT8 ProcessorVoltageCapability2_9V :1; \r | |
620 | UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r | |
621 | UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r | |
622 | UINT8 ProcessorVoltageIndicateLegacy :1;\r | |
98cb9ae8 | 623 | } PROCESSOR_VOLTAGE;\r |
624 | \r | |
625 | ///\r | |
af2dc6a7 | 626 | /// Processor Information - Processor Upgrade.\r |
98cb9ae8 | 627 | ///\r |
628 | typedef enum {\r | |
629 | ProcessorUpgradeOther = 0x01,\r | |
630 | ProcessorUpgradeUnknown = 0x02,\r | |
631 | ProcessorUpgradeDaughterBoard = 0x03,\r | |
632 | ProcessorUpgradeZIFSocket = 0x04,\r | |
af2dc6a7 | 633 | ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r |
98cb9ae8 | 634 | ProcessorUpgradeNone = 0x06,\r |
635 | ProcessorUpgradeLIFSocket = 0x07,\r | |
636 | ProcessorUpgradeSlot1 = 0x08,\r | |
637 | ProcessorUpgradeSlot2 = 0x09,\r | |
638 | ProcessorUpgrade370PinSocket = 0x0A,\r | |
639 | ProcessorUpgradeSlotA = 0x0B,\r | |
640 | ProcessorUpgradeSlotM = 0x0C,\r | |
641 | ProcessorUpgradeSocket423 = 0x0D,\r | |
af2dc6a7 | 642 | ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r |
98cb9ae8 | 643 | ProcessorUpgradeSocket478 = 0x0F,\r |
644 | ProcessorUpgradeSocket754 = 0x10,\r | |
645 | ProcessorUpgradeSocket940 = 0x11,\r | |
646 | ProcessorUpgradeSocket939 = 0x12,\r | |
647 | ProcessorUpgradeSocketmPGA604 = 0x13,\r | |
648 | ProcessorUpgradeSocketLGA771 = 0x14,\r | |
649 | ProcessorUpgradeSocketLGA775 = 0x15,\r | |
650 | ProcessorUpgradeSocketS1 = 0x16,\r | |
651 | ProcessorUpgradeAM2 = 0x17,\r | |
3507ab19 | 652 | ProcessorUpgradeF1207 = 0x18,\r |
7ddba202 SZ |
653 | ProcessorSocketLGA1366 = 0x19,\r |
654 | ProcessorUpgradeSocketG34 = 0x1A,\r | |
655 | ProcessorUpgradeSocketAM3 = 0x1B,\r | |
656 | ProcessorUpgradeSocketC32 = 0x1C,\r | |
657 | ProcessorUpgradeSocketLGA1156 = 0x1D,\r | |
658 | ProcessorUpgradeSocketLGA1567 = 0x1E,\r | |
659 | ProcessorUpgradeSocketPGA988A = 0x1F,\r | |
660 | ProcessorUpgradeSocketBGA1288 = 0x20,\r | |
661 | ProcessorUpgradeSocketrPGA988B = 0x21,\r | |
662 | ProcessorUpgradeSocketBGA1023 = 0x22,\r | |
663 | ProcessorUpgradeSocketBGA1224 = 0x23,\r | |
4a228334 | 664 | ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r |
7ddba202 SZ |
665 | ProcessorUpgradeSocketLGA1356 = 0x25,\r |
666 | ProcessorUpgradeSocketLGA2011 = 0x26,\r | |
667 | ProcessorUpgradeSocketFS1 = 0x27,\r | |
668 | ProcessorUpgradeSocketFS2 = 0x28,\r | |
669 | ProcessorUpgradeSocketFM1 = 0x29,\r | |
4a228334 EL |
670 | ProcessorUpgradeSocketFM2 = 0x2A,\r |
671 | ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r | |
6cd35c62 EL |
672 | ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r |
673 | ProcessorUpgradeSocketLGA1150 = 0x2D,\r | |
674 | ProcessorUpgradeSocketBGA1168 = 0x2E,\r | |
675 | ProcessorUpgradeSocketBGA1234 = 0x2F,\r | |
676 | ProcessorUpgradeSocketBGA1364 = 0x30\r | |
98cb9ae8 | 677 | } PROCESSOR_UPGRADE;\r |
678 | \r | |
679 | ///\r | |
680 | /// Processor ID Field Description\r | |
681 | ///\r | |
682 | typedef struct {\r | |
683 | UINT32 ProcessorSteppingId:4;\r | |
684 | UINT32 ProcessorModel: 4;\r | |
685 | UINT32 ProcessorFamily: 4;\r | |
686 | UINT32 ProcessorType: 2;\r | |
687 | UINT32 ProcessorReserved1: 2;\r | |
688 | UINT32 ProcessorXModel: 4;\r | |
689 | UINT32 ProcessorXFamily: 8;\r | |
690 | UINT32 ProcessorReserved2: 4;\r | |
691 | } PROCESSOR_SIGNATURE;\r | |
692 | \r | |
98cb9ae8 | 693 | typedef struct {\r |
694 | UINT32 ProcessorFpu :1;\r | |
695 | UINT32 ProcessorVme :1;\r | |
696 | UINT32 ProcessorDe :1;\r | |
697 | UINT32 ProcessorPse :1;\r | |
698 | UINT32 ProcessorTsc :1;\r | |
699 | UINT32 ProcessorMsr :1;\r | |
700 | UINT32 ProcessorPae :1;\r | |
701 | UINT32 ProcessorMce :1;\r | |
702 | UINT32 ProcessorCx8 :1;\r | |
703 | UINT32 ProcessorApic :1;\r | |
704 | UINT32 ProcessorReserved1 :1;\r | |
705 | UINT32 ProcessorSep :1;\r | |
706 | UINT32 ProcessorMtrr :1;\r | |
707 | UINT32 ProcessorPge :1;\r | |
708 | UINT32 ProcessorMca :1;\r | |
709 | UINT32 ProcessorCmov :1;\r | |
710 | UINT32 ProcessorPat :1;\r | |
711 | UINT32 ProcessorPse36 :1;\r | |
712 | UINT32 ProcessorPsn :1;\r | |
713 | UINT32 ProcessorClfsh :1;\r | |
714 | UINT32 ProcessorReserved2 :1;\r | |
715 | UINT32 ProcessorDs :1;\r | |
716 | UINT32 ProcessorAcpi :1;\r | |
717 | UINT32 ProcessorMmx :1;\r | |
718 | UINT32 ProcessorFxsr :1;\r | |
719 | UINT32 ProcessorSse :1;\r | |
720 | UINT32 ProcessorSse2 :1;\r | |
721 | UINT32 ProcessorSs :1;\r | |
722 | UINT32 ProcessorReserved3 :1;\r | |
723 | UINT32 ProcessorTm :1;\r | |
724 | UINT32 ProcessorReserved4 :2;\r | |
725 | } PROCESSOR_FEATURE_FLAGS;\r | |
726 | \r | |
727 | typedef struct {\r | |
728 | PROCESSOR_SIGNATURE Signature;\r | |
98cb9ae8 | 729 | PROCESSOR_FEATURE_FLAGS FeatureFlags;\r |
6800ac83 | 730 | } PROCESSOR_ID_DATA;\r |
98cb9ae8 | 731 | \r |
4135253b | 732 | ///\r |
af2dc6a7 | 733 | /// Processor Information (Type 4).\r |
4135253b | 734 | ///\r |
98cb9ae8 | 735 | /// The information in this structure defines the attributes of a single processor; \r |
736 | /// a separate structure instance is provided for each system processor socket/slot. \r | |
737 | /// For example, a system with an IntelDX2 processor would have a single \r | |
af2dc6a7 | 738 | /// structure instance, while a system with an IntelSX2 processor would have a structure\r |
739 | /// to describe the main CPU, and a second structure to describe the 80487 co-processor. \r | |
98cb9ae8 | 740 | ///\r |
61ce5861 | 741 | typedef struct { \r |
742 | SMBIOS_STRUCTURE Hdr;\r | |
2d5e30ef | 743 | SMBIOS_TABLE_STRING Socket;\r |
af2dc6a7 | 744 | UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r |
745 | UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r | |
61ce5861 | 746 | SMBIOS_TABLE_STRING ProcessorManufacture;\r |
98cb9ae8 | 747 | PROCESSOR_ID_DATA ProcessorId;\r |
61ce5861 | 748 | SMBIOS_TABLE_STRING ProcessorVersion;\r |
98cb9ae8 | 749 | PROCESSOR_VOLTAGE Voltage;\r |
61ce5861 | 750 | UINT16 ExternalClock;\r |
751 | UINT16 MaxSpeed;\r | |
752 | UINT16 CurrentSpeed;\r | |
753 | UINT8 Status;\r | |
af2dc6a7 | 754 | UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r |
61ce5861 | 755 | UINT16 L1CacheHandle;\r |
756 | UINT16 L2CacheHandle;\r | |
757 | UINT16 L3CacheHandle;\r | |
758 | SMBIOS_TABLE_STRING SerialNumber;\r | |
759 | SMBIOS_TABLE_STRING AssetTag;\r | |
760 | SMBIOS_TABLE_STRING PartNumber;\r | |
761 | //\r | |
762 | // Add for smbios 2.5\r | |
763 | //\r | |
764 | UINT8 CoreCount;\r | |
765 | UINT8 EnabledCoreCount;\r | |
766 | UINT8 ThreadCount;\r | |
767 | UINT16 ProcessorCharacteristics;\r | |
768 | //\r | |
769 | // Add for smbios 2.6\r | |
770 | //\r | |
771 | UINT16 ProcessorFamily2;\r | |
6cd35c62 EL |
772 | //\r |
773 | // Add for smbios 3.0\r | |
774 | //\r | |
775 | UINT16 CoreCount2;\r | |
776 | UINT16 EnabledCoreCount2;\r | |
777 | UINT16 ThreadCount2;\r | |
61ce5861 | 778 | } SMBIOS_TABLE_TYPE4;\r |
779 | \r | |
98cb9ae8 | 780 | ///\r |
af2dc6a7 | 781 | /// Memory Controller Error Detecting Method.\r |
98cb9ae8 | 782 | ///\r |
783 | typedef enum { \r | |
784 | ErrorDetectingMethodOther = 0x01,\r | |
785 | ErrorDetectingMethodUnknown = 0x02,\r | |
786 | ErrorDetectingMethodNone = 0x03,\r | |
787 | ErrorDetectingMethodParity = 0x04,\r | |
788 | ErrorDetectingMethod32Ecc = 0x05,\r | |
789 | ErrorDetectingMethod64Ecc = 0x06,\r | |
790 | ErrorDetectingMethod128Ecc = 0x07,\r | |
791 | ErrorDetectingMethodCrc = 0x08\r | |
792 | } MEMORY_ERROR_DETECT_METHOD;\r | |
793 | \r | |
794 | ///\r | |
af2dc6a7 | 795 | /// Memory Controller Error Correcting Capability.\r |
98cb9ae8 | 796 | ///\r |
797 | typedef struct {\r | |
798 | UINT8 Other :1;\r | |
799 | UINT8 Unknown :1;\r | |
800 | UINT8 None :1;\r | |
801 | UINT8 SingleBitErrorCorrect :1;\r | |
802 | UINT8 DoubleBitErrorCorrect :1;\r | |
803 | UINT8 ErrorScrubbing :1;\r | |
804 | UINT8 Reserved :2;\r | |
805 | } MEMORY_ERROR_CORRECT_CAPABILITY;\r | |
806 | \r | |
807 | ///\r | |
af2dc6a7 | 808 | /// Memory Controller Information - Interleave Support.\r |
98cb9ae8 | 809 | ///\r |
810 | typedef enum { \r | |
811 | MemoryInterleaveOther = 0x01,\r | |
812 | MemoryInterleaveUnknown = 0x02,\r | |
813 | MemoryInterleaveOneWay = 0x03,\r | |
814 | MemoryInterleaveTwoWay = 0x04,\r | |
815 | MemoryInterleaveFourWay = 0x05,\r | |
816 | MemoryInterleaveEightWay = 0x06,\r | |
817 | MemoryInterleaveSixteenWay = 0x07\r | |
818 | } MEMORY_SUPPORT_INTERLEAVE_TYPE;\r | |
819 | \r | |
820 | ///\r | |
af2dc6a7 | 821 | /// Memory Controller Information - Memory Speeds.\r |
98cb9ae8 | 822 | ///\r |
823 | typedef struct {\r | |
824 | UINT16 Other :1;\r | |
825 | UINT16 Unknown :1;\r | |
826 | UINT16 SeventyNs:1;\r | |
827 | UINT16 SixtyNs :1;\r | |
828 | UINT16 FiftyNs :1;\r | |
829 | UINT16 Reserved :11;\r | |
830 | } MEMORY_SPEED_TYPE;\r | |
831 | \r | |
4135253b | 832 | ///\r |
af2dc6a7 | 833 | /// Memory Controller Information (Type 5, Obsolete).\r |
4135253b | 834 | ///\r |
98cb9ae8 | 835 | /// The information in this structure defines the attributes of the system's memory controller(s) \r |
836 | /// and the supported attributes of any memory-modules present in the sockets controlled by \r | |
837 | /// this controller. \r | |
838 | /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r | |
af2dc6a7 | 839 | /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r |
98cb9ae8 | 840 | /// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r |
841 | /// choose to implement both memory description types to allow existing DMI browsers\r | |
842 | /// to properly display the system's memory attributes.\r | |
843 | ///\r | |
61ce5861 | 844 | typedef struct {\r |
98cb9ae8 | 845 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 846 | UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r |
98cb9ae8 | 847 | MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r |
af2dc6a7 | 848 | UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r |
849 | UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE . \r | |
98cb9ae8 | 850 | UINT8 MaxMemoryModuleSize;\r |
851 | MEMORY_SPEED_TYPE SupportSpeed;\r | |
852 | UINT16 SupportMemoryType;\r | |
853 | UINT8 MemoryModuleVoltage;\r | |
854 | UINT8 AssociatedMemorySlotNum;\r | |
855 | UINT16 MemoryModuleConfigHandles[1];\r | |
61ce5861 | 856 | } SMBIOS_TABLE_TYPE5;\r |
857 | \r | |
98cb9ae8 | 858 | ///\r |
859 | /// Memory Module Information - Memory Types\r | |
860 | ///\r | |
861 | typedef struct {\r | |
862 | UINT16 Other :1;\r | |
863 | UINT16 Unknown :1;\r | |
864 | UINT16 Standard :1;\r | |
865 | UINT16 FastPageMode:1;\r | |
b4ab47ec | 866 | UINT16 Edo :1;\r |
98cb9ae8 | 867 | UINT16 Parity :1;\r |
b4ab47ec | 868 | UINT16 Ecc :1;\r |
869 | UINT16 Simm :1;\r | |
870 | UINT16 Dimm :1;\r | |
98cb9ae8 | 871 | UINT16 BurstEdo :1;\r |
b4ab47ec | 872 | UINT16 Sdram :1;\r |
98cb9ae8 | 873 | UINT16 Reserved :5;\r |
874 | } MEMORY_CURRENT_TYPE;\r | |
875 | \r | |
876 | ///\r | |
af2dc6a7 | 877 | /// Memory Module Information - Memory Size.\r |
98cb9ae8 | 878 | ///\r |
879 | typedef struct {\r | |
6800ac83 | 880 | UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r |
98cb9ae8 | 881 | UINT8 SingleOrDoubleBank :1;\r |
882 | } MEMORY_INSTALLED_ENABLED_SIZE;\r | |
883 | \r | |
4135253b | 884 | ///\r |
885 | /// Memory Module Information (Type 6, Obsolete)\r | |
886 | ///\r | |
98cb9ae8 | 887 | /// One Memory Module Information structure is included for each memory-module socket \r |
888 | /// in the system. The structure describes the speed, type, size, and error status\r | |
889 | /// of each system memory module. The supported attributes of each module are described \r | |
890 | /// by the "owning" Memory Controller Information structure. \r | |
891 | /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r | |
af2dc6a7 | 892 | /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r |
98cb9ae8 | 893 | /// and Memory Device (Type 17) structures should be used instead.\r |
894 | ///\r | |
61ce5861 | 895 | typedef struct {\r |
98cb9ae8 | 896 | SMBIOS_STRUCTURE Hdr;\r |
897 | SMBIOS_TABLE_STRING SocketDesignation;\r | |
898 | UINT8 BankConnections;\r | |
899 | UINT8 CurrentSpeed;\r | |
900 | MEMORY_CURRENT_TYPE CurrentMemoryType;\r | |
901 | MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r | |
902 | MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r | |
903 | UINT8 ErrorStatus;\r | |
61ce5861 | 904 | } SMBIOS_TABLE_TYPE6;\r |
905 | \r | |
98cb9ae8 | 906 | ///\r |
af2dc6a7 | 907 | /// Cache Information - SRAM Type.\r |
98cb9ae8 | 908 | ///\r |
909 | typedef struct {\r | |
910 | UINT16 Other :1;\r | |
911 | UINT16 Unknown :1;\r | |
912 | UINT16 NonBurst :1;\r | |
913 | UINT16 Burst :1;\r | |
914 | UINT16 PipelineBurst :1;\r | |
98cb9ae8 | 915 | UINT16 Synchronous :1;\r |
53d90f04 | 916 | UINT16 Asynchronous :1;\r |
98cb9ae8 | 917 | UINT16 Reserved :9;\r |
918 | } CACHE_SRAM_TYPE_DATA;\r | |
919 | \r | |
920 | ///\r | |
af2dc6a7 | 921 | /// Cache Information - Error Correction Type.\r |
98cb9ae8 | 922 | ///\r |
923 | typedef enum {\r | |
924 | CacheErrorOther = 0x01,\r | |
925 | CacheErrorUnknown = 0x02,\r | |
926 | CacheErrorNone = 0x03,\r | |
927 | CacheErrorParity = 0x04,\r | |
6800ac83 | 928 | CacheErrorSingleBit = 0x05, ///< ECC\r |
929 | CacheErrorMultiBit = 0x06 ///< ECC\r | |
98cb9ae8 | 930 | } CACHE_ERROR_TYPE_DATA;\r |
931 | \r | |
932 | ///\r | |
af2dc6a7 | 933 | /// Cache Information - System Cache Type. \r |
98cb9ae8 | 934 | ///\r |
935 | typedef enum {\r | |
936 | CacheTypeOther = 0x01,\r | |
937 | CacheTypeUnknown = 0x02,\r | |
938 | CacheTypeInstruction = 0x03,\r | |
939 | CacheTypeData = 0x04,\r | |
940 | CacheTypeUnified = 0x05\r | |
941 | } CACHE_TYPE_DATA;\r | |
942 | \r | |
943 | ///\r | |
af2dc6a7 | 944 | /// Cache Information - Associativity. \r |
98cb9ae8 | 945 | ///\r |
946 | typedef enum {\r | |
947 | CacheAssociativityOther = 0x01,\r | |
948 | CacheAssociativityUnknown = 0x02,\r | |
949 | CacheAssociativityDirectMapped = 0x03,\r | |
950 | CacheAssociativity2Way = 0x04,\r | |
951 | CacheAssociativity4Way = 0x05,\r | |
952 | CacheAssociativityFully = 0x06,\r | |
953 | CacheAssociativity8Way = 0x07,\r | |
954 | CacheAssociativity16Way = 0x08,\r | |
3507ab19 | 955 | CacheAssociativity12Way = 0x09,\r |
956 | CacheAssociativity24Way = 0x0A,\r | |
957 | CacheAssociativity32Way = 0x0B,\r | |
958 | CacheAssociativity48Way = 0x0C,\r | |
7ddba202 SZ |
959 | CacheAssociativity64Way = 0x0D,\r |
960 | CacheAssociativity20Way = 0x0E\r | |
98cb9ae8 | 961 | } CACHE_ASSOCIATIVITY_DATA;\r |
962 | \r | |
4135253b | 963 | ///\r |
af2dc6a7 | 964 | /// Cache Information (Type 7).\r |
4135253b | 965 | ///\r |
af2dc6a7 | 966 | /// The information in this structure defines the attributes of CPU cache device in the system. \r |
98cb9ae8 | 967 | /// One structure is specified for each such device, whether the device is internal to\r |
968 | /// or external to the CPU module. Cache modules can be associated with a processor structure\r | |
af2dc6a7 | 969 | /// in one or two ways, depending on the SMBIOS version.\r |
98cb9ae8 | 970 | ///\r |
61ce5861 | 971 | typedef struct {\r |
98cb9ae8 | 972 | SMBIOS_STRUCTURE Hdr;\r |
973 | SMBIOS_TABLE_STRING SocketDesignation;\r | |
974 | UINT16 CacheConfiguration;\r | |
975 | UINT16 MaximumCacheSize;\r | |
976 | UINT16 InstalledSize;\r | |
977 | CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r | |
978 | CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r | |
979 | UINT8 CacheSpeed;\r | |
af2dc6a7 | 980 | UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r |
981 | UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r | |
982 | UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r | |
61ce5861 | 983 | } SMBIOS_TABLE_TYPE7;\r |
984 | \r | |
98cb9ae8 | 985 | ///\r |
af2dc6a7 | 986 | /// Port Connector Information - Connector Types. \r |
98cb9ae8 | 987 | ///\r |
988 | typedef enum {\r | |
989 | PortConnectorTypeNone = 0x00,\r | |
990 | PortConnectorTypeCentronics = 0x01,\r | |
991 | PortConnectorTypeMiniCentronics = 0x02,\r | |
992 | PortConnectorTypeProprietary = 0x03,\r | |
993 | PortConnectorTypeDB25Male = 0x04,\r | |
994 | PortConnectorTypeDB25Female = 0x05,\r | |
995 | PortConnectorTypeDB15Male = 0x06,\r | |
996 | PortConnectorTypeDB15Female = 0x07,\r | |
997 | PortConnectorTypeDB9Male = 0x08,\r | |
998 | PortConnectorTypeDB9Female = 0x09,\r | |
999 | PortConnectorTypeRJ11 = 0x0A,\r | |
1000 | PortConnectorTypeRJ45 = 0x0B,\r | |
1001 | PortConnectorType50PinMiniScsi = 0x0C,\r | |
1002 | PortConnectorTypeMiniDin = 0x0D,\r | |
119c1688 | 1003 | PortConnectorTypeMicroDin = 0x0E,\r |
98cb9ae8 | 1004 | PortConnectorTypePS2 = 0x0F,\r |
1005 | PortConnectorTypeInfrared = 0x10,\r | |
1006 | PortConnectorTypeHpHil = 0x11,\r | |
1007 | PortConnectorTypeUsb = 0x12,\r | |
1008 | PortConnectorTypeSsaScsi = 0x13,\r | |
1009 | PortConnectorTypeCircularDin8Male = 0x14,\r | |
1010 | PortConnectorTypeCircularDin8Female = 0x15,\r | |
1011 | PortConnectorTypeOnboardIde = 0x16,\r | |
1012 | PortConnectorTypeOnboardFloppy = 0x17,\r | |
1013 | PortConnectorType9PinDualInline = 0x18,\r | |
1014 | PortConnectorType25PinDualInline = 0x19,\r | |
1015 | PortConnectorType50PinDualInline = 0x1A,\r | |
1016 | PortConnectorType68PinDualInline = 0x1B,\r | |
1017 | PortConnectorTypeOnboardSoundInput = 0x1C,\r | |
1018 | PortConnectorTypeMiniCentronicsType14 = 0x1D,\r | |
1019 | PortConnectorTypeMiniCentronicsType26 = 0x1E,\r | |
1020 | PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r | |
1021 | PortConnectorTypeBNC = 0x20,\r | |
1022 | PortConnectorType1394 = 0x21,\r | |
119c1688 | 1023 | PortConnectorTypeSasSata = 0x22,\r |
98cb9ae8 | 1024 | PortConnectorTypePC98 = 0xA0,\r |
1025 | PortConnectorTypePC98Hireso = 0xA1,\r | |
1026 | PortConnectorTypePCH98 = 0xA2,\r | |
1027 | PortConnectorTypePC98Note = 0xA3,\r | |
1028 | PortConnectorTypePC98Full = 0xA4,\r | |
1029 | PortConnectorTypeOther = 0xFF\r | |
1030 | } MISC_PORT_CONNECTOR_TYPE;\r | |
1031 | \r | |
1032 | ///\r | |
1033 | /// Port Connector Information - Port Types \r | |
1034 | ///\r | |
1035 | typedef enum {\r | |
1036 | PortTypeNone = 0x00,\r | |
1037 | PortTypeParallelXtAtCompatible = 0x01,\r | |
1038 | PortTypeParallelPortPs2 = 0x02,\r | |
1039 | PortTypeParallelPortEcp = 0x03,\r | |
1040 | PortTypeParallelPortEpp = 0x04,\r | |
1041 | PortTypeParallelPortEcpEpp = 0x05,\r | |
1042 | PortTypeSerialXtAtCompatible = 0x06,\r | |
1043 | PortTypeSerial16450Compatible = 0x07,\r | |
1044 | PortTypeSerial16550Compatible = 0x08,\r | |
1045 | PortTypeSerial16550ACompatible = 0x09,\r | |
1046 | PortTypeScsi = 0x0A,\r | |
1047 | PortTypeMidi = 0x0B,\r | |
1048 | PortTypeJoyStick = 0x0C,\r | |
1049 | PortTypeKeyboard = 0x0D,\r | |
1050 | PortTypeMouse = 0x0E,\r | |
1051 | PortTypeSsaScsi = 0x0F,\r | |
1052 | PortTypeUsb = 0x10,\r | |
1053 | PortTypeFireWire = 0x11,\r | |
1054 | PortTypePcmciaTypeI = 0x12,\r | |
1055 | PortTypePcmciaTypeII = 0x13,\r | |
1056 | PortTypePcmciaTypeIII = 0x14,\r | |
1057 | PortTypeCardBus = 0x15,\r | |
1058 | PortTypeAccessBusPort = 0x16,\r | |
1059 | PortTypeScsiII = 0x17,\r | |
1060 | PortTypeScsiWide = 0x18,\r | |
1061 | PortTypePC98 = 0x19,\r | |
1062 | PortTypePC98Hireso = 0x1A,\r | |
1063 | PortTypePCH98 = 0x1B,\r | |
1064 | PortTypeVideoPort = 0x1C,\r | |
1065 | PortTypeAudioPort = 0x1D,\r | |
1066 | PortTypeModemPort = 0x1E,\r | |
1067 | PortTypeNetworkPort = 0x1F,\r | |
1068 | PortType8251Compatible = 0xA0,\r | |
1069 | PortType8251FifoCompatible = 0xA1,\r | |
1070 | PortTypeOther = 0xFF\r | |
1071 | } MISC_PORT_TYPE;\r | |
1072 | \r | |
4135253b | 1073 | ///\r |
af2dc6a7 | 1074 | /// Port Connector Information (Type 8).\r |
4135253b | 1075 | ///\r |
98cb9ae8 | 1076 | /// The information in this structure defines the attributes of a system port connector, \r |
1f9f8414 | 1077 | /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r |
98cb9ae8 | 1078 | /// are provided. One structure is present for each port provided by the system.\r |
1079 | ///\r | |
61ce5861 | 1080 | typedef struct {\r |
98cb9ae8 | 1081 | SMBIOS_STRUCTURE Hdr;\r |
1082 | SMBIOS_TABLE_STRING InternalReferenceDesignator;\r | |
af2dc6a7 | 1083 | UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r |
98cb9ae8 | 1084 | SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r |
af2dc6a7 | 1085 | UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r |
1086 | UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r | |
61ce5861 | 1087 | } SMBIOS_TABLE_TYPE8;\r |
1088 | \r | |
98cb9ae8 | 1089 | ///\r |
1090 | /// System Slots - Slot Type\r | |
1091 | ///\r | |
1092 | typedef enum {\r | |
1093 | SlotTypeOther = 0x01,\r | |
1094 | SlotTypeUnknown = 0x02,\r | |
1095 | SlotTypeIsa = 0x03,\r | |
1096 | SlotTypeMca = 0x04,\r | |
1097 | SlotTypeEisa = 0x05,\r | |
1098 | SlotTypePci = 0x06,\r | |
1099 | SlotTypePcmcia = 0x07,\r | |
1100 | SlotTypeVlVesa = 0x08,\r | |
1101 | SlotTypeProprietary = 0x09,\r | |
1102 | SlotTypeProcessorCardSlot = 0x0A,\r | |
1103 | SlotTypeProprietaryMemoryCardSlot = 0x0B,\r | |
1104 | SlotTypeIORiserCardSlot = 0x0C,\r | |
1105 | SlotTypeNuBus = 0x0D,\r | |
1106 | SlotTypePci66MhzCapable = 0x0E,\r | |
1107 | SlotTypeAgp = 0x0F,\r | |
1108 | SlotTypeApg2X = 0x10,\r | |
1109 | SlotTypeAgp4X = 0x11,\r | |
1110 | SlotTypePciX = 0x12,\r | |
0c8cd067 | 1111 | SlotTypeAgp8X = 0x13,\r |
6cd35c62 EL |
1112 | SlotTypeM2Socket1_DP = 0x14,\r |
1113 | SlotTypeM2Socket1_SD = 0x15,\r | |
1114 | SlotTypeM2Socket2 = 0x16,\r | |
1115 | SlotTypeM2Socket3 = 0x17,\r | |
1116 | SlotTypeMxmTypeI = 0x18,\r | |
1117 | SlotTypeMxmTypeII = 0x19,\r | |
1118 | SlotTypeMxmTypeIIIStandard = 0x1A,\r | |
1119 | SlotTypeMxmTypeIIIHe = 0x1B,\r | |
1120 | SlotTypeMxmTypeIV = 0x1C,\r | |
1121 | SlotTypeMxm30TypeA = 0x1D,\r | |
1122 | SlotTypeMxm30TypeB = 0x1E,\r | |
1123 | SlotTypePciExpressGen2Sff_8639 = 0x1F,\r | |
1124 | SlotTypePciExpressGen3Sff_8639 = 0x20,\r | |
98cb9ae8 | 1125 | SlotTypePC98C20 = 0xA0,\r |
1126 | SlotTypePC98C24 = 0xA1,\r | |
1127 | SlotTypePC98E = 0xA2,\r | |
1128 | SlotTypePC98LocalBus = 0xA3,\r | |
1129 | SlotTypePC98Card = 0xA4,\r | |
1130 | SlotTypePciExpress = 0xA5,\r | |
1131 | SlotTypePciExpressX1 = 0xA6,\r | |
1132 | SlotTypePciExpressX2 = 0xA7,\r | |
1133 | SlotTypePciExpressX4 = 0xA8,\r | |
1134 | SlotTypePciExpressX8 = 0xA9,\r | |
3507ab19 | 1135 | SlotTypePciExpressX16 = 0xAA,\r |
1136 | SlotTypePciExpressGen2 = 0xAB,\r | |
1137 | SlotTypePciExpressGen2X1 = 0xAC,\r | |
1138 | SlotTypePciExpressGen2X2 = 0xAD,\r | |
1139 | SlotTypePciExpressGen2X4 = 0xAE,\r | |
1140 | SlotTypePciExpressGen2X8 = 0xAF,\r | |
7ddba202 SZ |
1141 | SlotTypePciExpressGen2X16 = 0xB0,\r |
1142 | SlotTypePciExpressGen3 = 0xB1,\r | |
1143 | SlotTypePciExpressGen3X1 = 0xB2,\r | |
1144 | SlotTypePciExpressGen3X2 = 0xB3,\r | |
1145 | SlotTypePciExpressGen3X4 = 0xB4,\r | |
1146 | SlotTypePciExpressGen3X8 = 0xB5,\r | |
1147 | SlotTypePciExpressGen3X16 = 0xB6\r | |
98cb9ae8 | 1148 | } MISC_SLOT_TYPE;\r |
1149 | \r | |
1150 | ///\r | |
af2dc6a7 | 1151 | /// System Slots - Slot Data Bus Width.\r |
98cb9ae8 | 1152 | ///\r |
1153 | typedef enum {\r | |
1154 | SlotDataBusWidthOther = 0x01,\r | |
1155 | SlotDataBusWidthUnknown = 0x02,\r | |
1156 | SlotDataBusWidth8Bit = 0x03,\r | |
1157 | SlotDataBusWidth16Bit = 0x04,\r | |
1158 | SlotDataBusWidth32Bit = 0x05,\r | |
1159 | SlotDataBusWidth64Bit = 0x06,\r | |
1160 | SlotDataBusWidth128Bit = 0x07,\r | |
6800ac83 | 1161 | SlotDataBusWidth1X = 0x08, ///< Or X1\r |
1162 | SlotDataBusWidth2X = 0x09, ///< Or X2\r | |
1163 | SlotDataBusWidth4X = 0x0A, ///< Or X4\r | |
1164 | SlotDataBusWidth8X = 0x0B, ///< Or X8\r | |
1165 | SlotDataBusWidth12X = 0x0C, ///< Or X12\r | |
1166 | SlotDataBusWidth16X = 0x0D, ///< Or X16\r | |
1167 | SlotDataBusWidth32X = 0x0E ///< Or X32\r | |
98cb9ae8 | 1168 | } MISC_SLOT_DATA_BUS_WIDTH;\r |
1169 | \r | |
1170 | ///\r | |
af2dc6a7 | 1171 | /// System Slots - Current Usage.\r |
98cb9ae8 | 1172 | ///\r |
1173 | typedef enum {\r | |
1174 | SlotUsageOther = 0x01,\r | |
1175 | SlotUsageUnknown = 0x02,\r | |
1176 | SlotUsageAvailable = 0x03,\r | |
1177 | SlotUsageInUse = 0x04\r | |
1178 | } MISC_SLOT_USAGE;\r | |
1179 | \r | |
1180 | ///\r | |
af2dc6a7 | 1181 | /// System Slots - Slot Length. \r |
98cb9ae8 | 1182 | ///\r |
1183 | typedef enum {\r | |
1184 | SlotLengthOther = 0x01,\r | |
1185 | SlotLengthUnknown = 0x02,\r | |
1186 | SlotLengthShort = 0x03,\r | |
1187 | SlotLengthLong = 0x04\r | |
1188 | } MISC_SLOT_LENGTH;\r | |
1189 | \r | |
1190 | ///\r | |
af2dc6a7 | 1191 | /// System Slots - Slot Characteristics 1. \r |
98cb9ae8 | 1192 | ///\r |
1193 | typedef struct {\r | |
1194 | UINT8 CharacteristicsUnknown :1;\r | |
1195 | UINT8 Provides50Volts :1;\r | |
1196 | UINT8 Provides33Volts :1;\r | |
1197 | UINT8 SharedSlot :1;\r | |
1198 | UINT8 PcCard16Supported :1;\r | |
1199 | UINT8 CardBusSupported :1;\r | |
1200 | UINT8 ZoomVideoSupported :1;\r | |
1201 | UINT8 ModemRingResumeSupported:1;\r | |
1202 | } MISC_SLOT_CHARACTERISTICS1;\r | |
1203 | ///\r | |
af2dc6a7 | 1204 | /// System Slots - Slot Characteristics 2. \r |
98cb9ae8 | 1205 | ///\r |
1206 | typedef struct {\r | |
1207 | UINT8 PmeSignalSupported :1;\r | |
1208 | UINT8 HotPlugDevicesSupported :1;\r | |
1209 | UINT8 SmbusSignalSupported :1;\r | |
6800ac83 | 1210 | UINT8 Reserved :5; ///< Set to 0.\r |
98cb9ae8 | 1211 | } MISC_SLOT_CHARACTERISTICS2;\r |
1212 | \r | |
4135253b | 1213 | ///\r |
1214 | /// System Slots (Type 9)\r | |
1215 | ///\r | |
98cb9ae8 | 1216 | /// The information in this structure defines the attributes of a system slot. \r |
1217 | /// One structure is provided for each slot in the system.\r | |
1218 | ///\r | |
1219 | ///\r | |
61ce5861 | 1220 | typedef struct {\r |
98cb9ae8 | 1221 | SMBIOS_STRUCTURE Hdr;\r |
1222 | SMBIOS_TABLE_STRING SlotDesignation;\r | |
af2dc6a7 | 1223 | UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r |
1224 | UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r | |
1225 | UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r | |
1226 | UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r | |
98cb9ae8 | 1227 | UINT16 SlotID;\r |
1228 | MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r | |
1229 | MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r | |
61ce5861 | 1230 | //\r |
1231 | // Add for smbios 2.6\r | |
1232 | //\r | |
98cb9ae8 | 1233 | UINT16 SegmentGroupNum;\r |
1234 | UINT8 BusNum;\r | |
1235 | UINT8 DevFuncNum;\r | |
61ce5861 | 1236 | } SMBIOS_TABLE_TYPE9;\r |
1237 | \r | |
98cb9ae8 | 1238 | ///\r |
af2dc6a7 | 1239 | /// On Board Devices Information - Device Types. \r |
98cb9ae8 | 1240 | ///\r |
1241 | typedef enum {\r | |
1242 | OnBoardDeviceTypeOther = 0x01,\r | |
1243 | OnBoardDeviceTypeUnknown = 0x02,\r | |
1244 | OnBoardDeviceTypeVideo = 0x03,\r | |
1245 | OnBoardDeviceTypeScsiController = 0x04,\r | |
1246 | OnBoardDeviceTypeEthernet = 0x05,\r | |
1247 | OnBoardDeviceTypeTokenRing = 0x06,\r | |
119c1688 SZ |
1248 | OnBoardDeviceTypeSound = 0x07,\r |
1249 | OnBoardDeviceTypePATAController = 0x08,\r | |
1250 | OnBoardDeviceTypeSATAController = 0x09,\r | |
1251 | OnBoardDeviceTypeSASController = 0x0A\r | |
98cb9ae8 | 1252 | } MISC_ONBOARD_DEVICE_TYPE;\r |
1253 | \r | |
bf7ea009 | 1254 | ///\r |
1255 | /// Device Item Entry\r | |
1256 | ///\r | |
61ce5861 | 1257 | typedef struct {\r |
af2dc6a7 | 1258 | UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r |
1259 | ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r | |
98cb9ae8 | 1260 | SMBIOS_TABLE_STRING DescriptionString;\r |
61ce5861 | 1261 | } DEVICE_STRUCT;\r |
1262 | \r | |
4135253b | 1263 | ///\r |
af2dc6a7 | 1264 | /// On Board Devices Information (Type 10, obsolete).\r |
4135253b | 1265 | ///\r |
98cb9ae8 | 1266 | /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r |
1267 | /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r | |
1268 | /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r | |
1269 | /// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r | |
1270 | /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r | |
1271 | /// has some level of control over the enabling of the associated device for use by the system.\r | |
1272 | ///\r | |
61ce5861 | 1273 | typedef struct {\r |
1274 | SMBIOS_STRUCTURE Hdr;\r | |
1275 | DEVICE_STRUCT Device[1];\r | |
1276 | } SMBIOS_TABLE_TYPE10;\r | |
1277 | \r | |
4135253b | 1278 | ///\r |
af2dc6a7 | 1279 | /// OEM Strings (Type 11).\r |
98cb9ae8 | 1280 | /// This structure contains free form strings defined by the OEM. Examples of this are: \r |
1281 | /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r | |
4135253b | 1282 | ///\r |
61ce5861 | 1283 | typedef struct {\r |
1284 | SMBIOS_STRUCTURE Hdr;\r | |
1285 | UINT8 StringCount;\r | |
1286 | } SMBIOS_TABLE_TYPE11;\r | |
1287 | \r | |
4135253b | 1288 | ///\r |
af2dc6a7 | 1289 | /// System Configuration Options (Type 12).\r |
4135253b | 1290 | ///\r |
98cb9ae8 | 1291 | /// This structure contains information required to configure the base board's Jumpers and Switches. \r |
1292 | ///\r | |
61ce5861 | 1293 | typedef struct {\r |
1294 | SMBIOS_STRUCTURE Hdr;\r | |
1295 | UINT8 StringCount;\r | |
1296 | } SMBIOS_TABLE_TYPE12;\r | |
1297 | \r | |
98cb9ae8 | 1298 | \r |
4135253b | 1299 | ///\r |
af2dc6a7 | 1300 | /// BIOS Language Information (Type 13).\r |
4135253b | 1301 | ///\r |
98cb9ae8 | 1302 | /// The information in this structure defines the installable language attributes of the BIOS. \r |
1303 | /// \r | |
61ce5861 | 1304 | typedef struct {\r |
1305 | SMBIOS_STRUCTURE Hdr;\r | |
1306 | UINT8 InstallableLanguages;\r | |
1307 | UINT8 Flags;\r | |
fbfa4a1d | 1308 | UINT8 Reserved[15];\r |
61ce5861 | 1309 | SMBIOS_TABLE_STRING CurrentLanguages;\r |
1310 | } SMBIOS_TABLE_TYPE13;\r | |
1311 | \r | |
119c1688 SZ |
1312 | ///\r |
1313 | /// Group Item Entry\r | |
1314 | ///\r | |
1315 | typedef struct {\r | |
1316 | UINT8 ItemType;\r | |
1317 | UINT16 ItemHandle;\r | |
1318 | } GROUP_STRUCT;\r | |
1319 | \r | |
1320 | ///\r | |
1321 | /// Group Associations (Type 14).\r | |
1322 | ///\r | |
1323 | /// The Group Associations structure is provided for OEMs who want to specify \r | |
1324 | /// the arrangement or hierarchy of certain components (including other Group Associations) \r | |
1325 | /// within the system. \r | |
1326 | ///\r | |
1327 | typedef struct {\r | |
1328 | SMBIOS_STRUCTURE Hdr;\r | |
1329 | SMBIOS_TABLE_STRING GroupName;\r | |
1330 | GROUP_STRUCT Group[1];\r | |
1331 | } SMBIOS_TABLE_TYPE14;\r | |
1332 | \r | |
98cb9ae8 | 1333 | ///\r |
af2dc6a7 | 1334 | /// System Event Log - Event Log Types.\r |
98cb9ae8 | 1335 | /// \r |
1336 | typedef enum {\r | |
1337 | EventLogTypeReserved = 0x00,\r | |
1338 | EventLogTypeSingleBitECC = 0x01,\r | |
1339 | EventLogTypeMultiBitECC = 0x02,\r | |
1340 | EventLogTypeParityMemErr = 0x03,\r | |
1341 | EventLogTypeBusTimeOut = 0x04,\r | |
1342 | EventLogTypeIOChannelCheck = 0x05,\r | |
1343 | EventLogTypeSoftwareNMI = 0x06,\r | |
1344 | EventLogTypePOSTMemResize = 0x07,\r | |
1345 | EventLogTypePOSTErr = 0x08,\r | |
1346 | EventLogTypePCIParityErr = 0x09,\r | |
1347 | EventLogTypePCISystemErr = 0x0A,\r | |
1348 | EventLogTypeCPUFailure = 0x0B,\r | |
1349 | EventLogTypeEISATimeOut = 0x0C,\r | |
1350 | EventLogTypeMemLogDisabled = 0x0D,\r | |
1351 | EventLogTypeLoggingDisabled = 0x0E,\r | |
1352 | EventLogTypeSysLimitExce = 0x10,\r | |
1353 | EventLogTypeAsyncHWTimer = 0x11,\r | |
1354 | EventLogTypeSysConfigInfo = 0x12,\r | |
1355 | EventLogTypeHDInfo = 0x13,\r | |
1356 | EventLogTypeSysReconfig = 0x14,\r | |
1357 | EventLogTypeUncorrectCPUErr = 0x15,\r | |
1358 | EventLogTypeAreaResetAndClr = 0x16,\r | |
1359 | EventLogTypeSystemBoot = 0x17,\r | |
6800ac83 | 1360 | EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r |
1361 | EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r | |
98cb9ae8 | 1362 | EventLogTypeEndOfLog = 0xFF\r |
1363 | } EVENT_LOG_TYPE_DATA;\r | |
1364 | \r | |
1365 | ///\r | |
af2dc6a7 | 1366 | /// System Event Log - Variable Data Format Types. \r |
98cb9ae8 | 1367 | /// \r |
1368 | typedef enum {\r | |
1369 | EventLogVariableNone = 0x00,\r | |
1370 | EventLogVariableHandle = 0x01,\r | |
1371 | EventLogVariableMutilEvent = 0x02,\r | |
1372 | EventLogVariableMutilEventHandle = 0x03,\r | |
1373 | EventLogVariablePOSTResultBitmap = 0x04,\r | |
1374 | EventLogVariableSysManagementType = 0x05,\r | |
1375 | EventLogVariableMutliEventSysManagmentType = 0x06, \r | |
1376 | EventLogVariableUnused = 0x07,\r | |
1377 | EventLogVariableOEMAssigned = 0x80\r | |
55deb978 | 1378 | } EVENT_LOG_VARIABLE_DATA;\r |
98cb9ae8 | 1379 | \r |
98cb9ae8 | 1380 | ///\r |
1381 | /// Event Log Type Descriptors\r | |
1382 | ///\r | |
1383 | typedef struct {\r | |
af2dc6a7 | 1384 | UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r |
98cb9ae8 | 1385 | UINT8 DataFormatType;\r |
1386 | } EVENT_LOG_TYPE;\r | |
1387 | \r | |
4135253b | 1388 | ///\r |
af2dc6a7 | 1389 | /// System Event Log (Type 15).\r |
4135253b | 1390 | ///\r |
98cb9ae8 | 1391 | /// The presence of this structure within the SMBIOS data returned for a system indicates \r |
1392 | /// that the system supports an event log. An event log is a fixed-length area within a \r | |
1393 | /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r | |
1394 | /// record, followed by one or more variable-length log records. \r | |
1395 | ///\r | |
61ce5861 | 1396 | typedef struct {\r |
1397 | SMBIOS_STRUCTURE Hdr;\r | |
1398 | UINT16 LogAreaLength;\r | |
1399 | UINT16 LogHeaderStartOffset;\r | |
1400 | UINT16 LogDataStartOffset;\r | |
1401 | UINT8 AccessMethod;\r | |
1402 | UINT8 LogStatus;\r | |
1403 | UINT32 LogChangeToken;\r | |
1404 | UINT32 AccessMethodAddress;\r | |
1405 | UINT8 LogHeaderFormat;\r | |
1406 | UINT8 NumberOfSupportedLogTypeDescriptors;\r | |
1407 | UINT8 LengthOfLogTypeDescriptor;\r | |
1408 | EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r | |
1409 | } SMBIOS_TABLE_TYPE15;\r | |
1410 | \r | |
98cb9ae8 | 1411 | ///\r |
af2dc6a7 | 1412 | /// Physical Memory Array - Location.\r |
98cb9ae8 | 1413 | ///\r |
1414 | typedef enum {\r | |
1415 | MemoryArrayLocationOther = 0x01,\r | |
1416 | MemoryArrayLocationUnknown = 0x02,\r | |
1417 | MemoryArrayLocationSystemBoard = 0x03,\r | |
1418 | MemoryArrayLocationIsaAddonCard = 0x04,\r | |
1419 | MemoryArrayLocationEisaAddonCard = 0x05,\r | |
1420 | MemoryArrayLocationPciAddonCard = 0x06,\r | |
1421 | MemoryArrayLocationMcaAddonCard = 0x07,\r | |
1422 | MemoryArrayLocationPcmciaAddonCard = 0x08,\r | |
1423 | MemoryArrayLocationProprietaryAddonCard = 0x09,\r | |
1424 | MemoryArrayLocationNuBus = 0x0A,\r | |
1425 | MemoryArrayLocationPc98C20AddonCard = 0xA0,\r | |
1426 | MemoryArrayLocationPc98C24AddonCard = 0xA1,\r | |
1427 | MemoryArrayLocationPc98EAddonCard = 0xA2,\r | |
1428 | MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r | |
1429 | } MEMORY_ARRAY_LOCATION;\r | |
1430 | \r | |
1431 | ///\r | |
af2dc6a7 | 1432 | /// Physical Memory Array - Use.\r |
98cb9ae8 | 1433 | ///\r |
1434 | typedef enum {\r | |
1435 | MemoryArrayUseOther = 0x01,\r | |
1436 | MemoryArrayUseUnknown = 0x02,\r | |
1437 | MemoryArrayUseSystemMemory = 0x03,\r | |
1438 | MemoryArrayUseVideoMemory = 0x04,\r | |
1439 | MemoryArrayUseFlashMemory = 0x05,\r | |
1440 | MemoryArrayUseNonVolatileRam = 0x06,\r | |
1441 | MemoryArrayUseCacheMemory = 0x07\r | |
1442 | } MEMORY_ARRAY_USE;\r | |
1443 | \r | |
1444 | ///\r | |
af2dc6a7 | 1445 | /// Physical Memory Array - Error Correction Types. \r |
98cb9ae8 | 1446 | ///\r |
1447 | typedef enum {\r | |
1448 | MemoryErrorCorrectionOther = 0x01,\r | |
1449 | MemoryErrorCorrectionUnknown = 0x02,\r | |
1450 | MemoryErrorCorrectionNone = 0x03,\r | |
1451 | MemoryErrorCorrectionParity = 0x04,\r | |
1452 | MemoryErrorCorrectionSingleBitEcc = 0x05,\r | |
1453 | MemoryErrorCorrectionMultiBitEcc = 0x06,\r | |
1454 | MemoryErrorCorrectionCrc = 0x07\r | |
1455 | } MEMORY_ERROR_CORRECTION;\r | |
1456 | \r | |
4135253b | 1457 | ///\r |
af2dc6a7 | 1458 | /// Physical Memory Array (Type 16).\r |
4135253b | 1459 | ///\r |
98cb9ae8 | 1460 | /// This structure describes a collection of memory devices that operate \r |
1461 | /// together to form a memory address space. \r | |
1462 | ///\r | |
61ce5861 | 1463 | typedef struct {\r |
98cb9ae8 | 1464 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1465 | UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r |
1466 | UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r | |
1467 | UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r | |
98cb9ae8 | 1468 | UINT32 MaximumCapacity;\r |
1469 | UINT16 MemoryErrorInformationHandle;\r | |
1470 | UINT16 NumberOfMemoryDevices;\r | |
7ddba202 SZ |
1471 | //\r |
1472 | // Add for smbios 2.7\r | |
1473 | //\r | |
1474 | UINT64 ExtendedMaximumCapacity;\r | |
61ce5861 | 1475 | } SMBIOS_TABLE_TYPE16;\r |
1476 | \r | |
98cb9ae8 | 1477 | ///\r |
af2dc6a7 | 1478 | /// Memory Device - Form Factor.\r |
98cb9ae8 | 1479 | ///\r |
1480 | typedef enum {\r | |
1481 | MemoryFormFactorOther = 0x01,\r | |
1482 | MemoryFormFactorUnknown = 0x02,\r | |
1483 | MemoryFormFactorSimm = 0x03,\r | |
1484 | MemoryFormFactorSip = 0x04,\r | |
1485 | MemoryFormFactorChip = 0x05,\r | |
1486 | MemoryFormFactorDip = 0x06,\r | |
1487 | MemoryFormFactorZip = 0x07,\r | |
1488 | MemoryFormFactorProprietaryCard = 0x08,\r | |
1489 | MemoryFormFactorDimm = 0x09,\r | |
1490 | MemoryFormFactorTsop = 0x0A,\r | |
1491 | MemoryFormFactorRowOfChips = 0x0B,\r | |
1492 | MemoryFormFactorRimm = 0x0C,\r | |
1493 | MemoryFormFactorSodimm = 0x0D,\r | |
1494 | MemoryFormFactorSrimm = 0x0E,\r | |
1495 | MemoryFormFactorFbDimm = 0x0F\r | |
1496 | } MEMORY_FORM_FACTOR;\r | |
1497 | \r | |
1498 | ///\r | |
1499 | /// Memory Device - Type\r | |
1500 | ///\r | |
1501 | typedef enum {\r | |
1502 | MemoryTypeOther = 0x01,\r | |
1503 | MemoryTypeUnknown = 0x02,\r | |
1504 | MemoryTypeDram = 0x03,\r | |
1505 | MemoryTypeEdram = 0x04,\r | |
1506 | MemoryTypeVram = 0x05,\r | |
1507 | MemoryTypeSram = 0x06,\r | |
1508 | MemoryTypeRam = 0x07,\r | |
1509 | MemoryTypeRom = 0x08,\r | |
1510 | MemoryTypeFlash = 0x09,\r | |
1511 | MemoryTypeEeprom = 0x0A,\r | |
1512 | MemoryTypeFeprom = 0x0B,\r | |
1513 | MemoryTypeEprom = 0x0C,\r | |
1514 | MemoryTypeCdram = 0x0D,\r | |
1515 | MemoryType3Dram = 0x0E,\r | |
1516 | MemoryTypeSdram = 0x0F,\r | |
1517 | MemoryTypeSgram = 0x10,\r | |
1518 | MemoryTypeRdram = 0x11,\r | |
1519 | MemoryTypeDdr = 0x12,\r | |
1520 | MemoryTypeDdr2 = 0x13,\r | |
3507ab19 | 1521 | MemoryTypeDdr2FbDimm = 0x14,\r |
1522 | MemoryTypeDdr3 = 0x18,\r | |
6cd35c62 EL |
1523 | MemoryTypeFbd2 = 0x19,\r |
1524 | MemoryTypeDdr4 = 0x1A,\r | |
1525 | MemoryTypeLpddr = 0x1B,\r | |
1526 | MemoryTypeLpddr2 = 0x1C,\r | |
1527 | MemoryTypeLpddr3 = 0x1D,\r | |
1528 | MemoryTypeLpddr4 = 0x1E\r | |
98cb9ae8 | 1529 | } MEMORY_DEVICE_TYPE;\r |
1530 | \r | |
1531 | typedef struct {\r | |
1532 | UINT16 Reserved :1;\r | |
1533 | UINT16 Other :1;\r | |
1534 | UINT16 Unknown :1;\r | |
1535 | UINT16 FastPaged :1;\r | |
1536 | UINT16 StaticColumn :1;\r | |
1537 | UINT16 PseudoStatic :1;\r | |
1538 | UINT16 Rambus :1;\r | |
1539 | UINT16 Synchronous :1;\r | |
1540 | UINT16 Cmos :1;\r | |
1541 | UINT16 Edo :1;\r | |
1542 | UINT16 WindowDram :1;\r | |
1543 | UINT16 CacheDram :1;\r | |
1544 | UINT16 Nonvolatile :1;\r | |
7ddba202 SZ |
1545 | UINT16 Registered :1;\r |
1546 | UINT16 Unbuffered :1;\r | |
4a228334 | 1547 | UINT16 LrDimm :1;\r |
98cb9ae8 | 1548 | } MEMORY_DEVICE_TYPE_DETAIL;\r |
1549 | \r | |
4135253b | 1550 | ///\r |
af2dc6a7 | 1551 | /// Memory Device (Type 17).\r |
4135253b | 1552 | ///\r |
98cb9ae8 | 1553 | /// This structure describes a single memory device that is part of \r |
1554 | /// a larger Physical Memory Array (Type 16).\r | |
1555 | /// Note: If a system includes memory-device sockets, the SMBIOS implementation \r | |
af2dc6a7 | 1556 | /// includes a Memory Device structure instance for each slot, whether or not the \r |
98cb9ae8 | 1557 | /// socket is currently populated.\r |
1558 | ///\r | |
61ce5861 | 1559 | typedef struct {\r |
98cb9ae8 | 1560 | SMBIOS_STRUCTURE Hdr;\r |
1561 | UINT16 MemoryArrayHandle;\r | |
1562 | UINT16 MemoryErrorInformationHandle;\r | |
1563 | UINT16 TotalWidth;\r | |
1564 | UINT16 DataWidth;\r | |
1565 | UINT16 Size;\r | |
af2dc6a7 | 1566 | UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r |
98cb9ae8 | 1567 | UINT8 DeviceSet;\r |
1568 | SMBIOS_TABLE_STRING DeviceLocator;\r | |
1569 | SMBIOS_TABLE_STRING BankLocator;\r | |
af2dc6a7 | 1570 | UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r |
98cb9ae8 | 1571 | MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r |
1572 | UINT16 Speed;\r | |
1573 | SMBIOS_TABLE_STRING Manufacturer;\r | |
1574 | SMBIOS_TABLE_STRING SerialNumber;\r | |
1575 | SMBIOS_TABLE_STRING AssetTag;\r | |
1576 | SMBIOS_TABLE_STRING PartNumber;\r | |
61ce5861 | 1577 | //\r |
1578 | // Add for smbios 2.6\r | |
1579 | // \r | |
7ddba202 SZ |
1580 | UINT8 Attributes;\r |
1581 | //\r | |
1582 | // Add for smbios 2.7\r | |
1583 | //\r | |
1584 | UINT32 ExtendedSize;\r | |
1585 | UINT16 ConfiguredMemoryClockSpeed;\r | |
4a228334 EL |
1586 | //\r |
1587 | // Add for smbios 2.8.0\r | |
1588 | //\r | |
1589 | UINT16 MinimumVoltage;\r | |
1590 | UINT16 MaximumVoltage;\r | |
1591 | UINT16 ConfiguredVoltage;\r | |
61ce5861 | 1592 | } SMBIOS_TABLE_TYPE17;\r |
1593 | \r | |
98cb9ae8 | 1594 | ///\r |
af2dc6a7 | 1595 | /// 32-bit Memory Error Information - Error Type. \r |
98cb9ae8 | 1596 | ///\r |
1597 | typedef enum { \r | |
1598 | MemoryErrorOther = 0x01,\r | |
1599 | MemoryErrorUnknown = 0x02,\r | |
1600 | MemoryErrorOk = 0x03,\r | |
1601 | MemoryErrorBadRead = 0x04,\r | |
1602 | MemoryErrorParity = 0x05,\r | |
1603 | MemoryErrorSigleBit = 0x06,\r | |
1604 | MemoryErrorDoubleBit = 0x07,\r | |
1605 | MemoryErrorMultiBit = 0x08,\r | |
1606 | MemoryErrorNibble = 0x09,\r | |
1607 | MemoryErrorChecksum = 0x0A,\r | |
1608 | MemoryErrorCrc = 0x0B,\r | |
1609 | MemoryErrorCorrectSingleBit = 0x0C,\r | |
1610 | MemoryErrorCorrected = 0x0D,\r | |
1611 | MemoryErrorUnCorrectable = 0x0E\r | |
1612 | } MEMORY_ERROR_TYPE;\r | |
1613 | \r | |
1614 | ///\r | |
af2dc6a7 | 1615 | /// 32-bit Memory Error Information - Error Granularity. \r |
98cb9ae8 | 1616 | ///\r |
1617 | typedef enum { \r | |
1618 | MemoryGranularityOther = 0x01,\r | |
1619 | MemoryGranularityOtherUnknown = 0x02,\r | |
1620 | MemoryGranularityDeviceLevel = 0x03,\r | |
1621 | MemoryGranularityMemPartitionLevel = 0x04\r | |
1622 | } MEMORY_ERROR_GRANULARITY;\r | |
1623 | \r | |
1624 | ///\r | |
af2dc6a7 | 1625 | /// 32-bit Memory Error Information - Error Operation. \r |
98cb9ae8 | 1626 | ///\r |
1627 | typedef enum { \r | |
1628 | MemoryErrorOperationOther = 0x01,\r | |
1629 | MemoryErrorOperationUnknown = 0x02,\r | |
1630 | MemoryErrorOperationRead = 0x03,\r | |
1631 | MemoryErrorOperationWrite = 0x04,\r | |
1632 | MemoryErrorOperationPartialWrite = 0x05\r | |
1633 | } MEMORY_ERROR_OPERATION;\r | |
1634 | \r | |
4135253b | 1635 | ///\r |
af2dc6a7 | 1636 | /// 32-bit Memory Error Information (Type 18).\r |
98cb9ae8 | 1637 | /// \r |
1638 | /// This structure identifies the specifics of an error that might be detected \r | |
1639 | /// within a Physical Memory Array.\r | |
4135253b | 1640 | ///\r |
61ce5861 | 1641 | typedef struct {\r |
98cb9ae8 | 1642 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1643 | UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r |
1644 | UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r | |
1645 | UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r | |
98cb9ae8 | 1646 | UINT32 VendorSyndrome;\r |
1647 | UINT32 MemoryArrayErrorAddress;\r | |
1648 | UINT32 DeviceErrorAddress;\r | |
1649 | UINT32 ErrorResolution;\r | |
61ce5861 | 1650 | } SMBIOS_TABLE_TYPE18;\r |
1651 | \r | |
4135253b | 1652 | ///\r |
af2dc6a7 | 1653 | /// Memory Array Mapped Address (Type 19).\r |
4135253b | 1654 | ///\r |
98cb9ae8 | 1655 | /// This structure provides the address mapping for a Physical Memory Array. \r |
1656 | /// One structure is present for each contiguous address range described.\r | |
1657 | ///\r | |
61ce5861 | 1658 | typedef struct {\r |
1659 | SMBIOS_STRUCTURE Hdr;\r | |
1660 | UINT32 StartingAddress;\r | |
1661 | UINT32 EndingAddress;\r | |
1662 | UINT16 MemoryArrayHandle;\r | |
1663 | UINT8 PartitionWidth;\r | |
7ddba202 SZ |
1664 | //\r |
1665 | // Add for smbios 2.7\r | |
1666 | //\r | |
1667 | UINT64 ExtendedStartingAddress;\r | |
1668 | UINT64 ExtendedEndingAddress;\r | |
61ce5861 | 1669 | } SMBIOS_TABLE_TYPE19;\r |
1670 | \r | |
4135253b | 1671 | ///\r |
af2dc6a7 | 1672 | /// Memory Device Mapped Address (Type 20).\r |
4135253b | 1673 | ///\r |
98cb9ae8 | 1674 | /// This structure maps memory address space usually to a device-level granularity. \r |
1675 | /// One structure is present for each contiguous address range described. \r | |
1676 | ///\r | |
61ce5861 | 1677 | typedef struct {\r |
1678 | SMBIOS_STRUCTURE Hdr;\r | |
1679 | UINT32 StartingAddress;\r | |
1680 | UINT32 EndingAddress;\r | |
1681 | UINT16 MemoryDeviceHandle;\r | |
1682 | UINT16 MemoryArrayMappedAddressHandle;\r | |
1683 | UINT8 PartitionRowPosition;\r | |
1684 | UINT8 InterleavePosition;\r | |
1685 | UINT8 InterleavedDataDepth;\r | |
7ddba202 SZ |
1686 | //\r |
1687 | // Add for smbios 2.7\r | |
1688 | //\r | |
1689 | UINT64 ExtendedStartingAddress;\r | |
1690 | UINT64 ExtendedEndingAddress;\r | |
61ce5861 | 1691 | } SMBIOS_TABLE_TYPE20;\r |
1692 | \r | |
98cb9ae8 | 1693 | ///\r |
1694 | /// Built-in Pointing Device - Type\r | |
1695 | ///\r | |
1696 | typedef enum {\r | |
1697 | PointingDeviceTypeOther = 0x01,\r | |
1698 | PointingDeviceTypeUnknown = 0x02,\r | |
1699 | PointingDeviceTypeMouse = 0x03,\r | |
1700 | PointingDeviceTypeTrackBall = 0x04,\r | |
1701 | PointingDeviceTypeTrackPoint = 0x05,\r | |
1702 | PointingDeviceTypeGlidePoint = 0x06,\r | |
1703 | PointingDeviceTouchPad = 0x07,\r | |
1704 | PointingDeviceTouchScreen = 0x08,\r | |
1705 | PointingDeviceOpticalSensor = 0x09\r | |
1706 | } BUILTIN_POINTING_DEVICE_TYPE;\r | |
1707 | \r | |
1708 | ///\r | |
af2dc6a7 | 1709 | /// Built-in Pointing Device - Interface.\r |
98cb9ae8 | 1710 | ///\r |
1711 | typedef enum {\r | |
1712 | PointingDeviceInterfaceOther = 0x01,\r | |
1713 | PointingDeviceInterfaceUnknown = 0x02,\r | |
1714 | PointingDeviceInterfaceSerial = 0x03,\r | |
1715 | PointingDeviceInterfacePs2 = 0x04,\r | |
1716 | PointingDeviceInterfaceInfrared = 0x05,\r | |
1717 | PointingDeviceInterfaceHpHil = 0x06,\r | |
1718 | PointingDeviceInterfaceBusMouse = 0x07,\r | |
1719 | PointingDeviceInterfaceADB = 0x08,\r | |
1720 | PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r | |
1721 | PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r | |
1722 | PointingDeviceInterfaceUsb = 0xA2\r | |
1723 | } BUILTIN_POINTING_DEVICE_INTERFACE;\r | |
1724 | \r | |
4135253b | 1725 | ///\r |
af2dc6a7 | 1726 | /// Built-in Pointing Device (Type 21).\r |
4135253b | 1727 | ///\r |
98cb9ae8 | 1728 | /// This structure describes the attributes of the built-in pointing device for the \r |
af2dc6a7 | 1729 | /// system. The presence of this structure does not imply that the built-in\r |
98cb9ae8 | 1730 | /// pointing device is active for the system's use! \r |
1731 | ///\r | |
61ce5861 | 1732 | typedef struct {\r |
98cb9ae8 | 1733 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1734 | UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r |
1735 | UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r | |
98cb9ae8 | 1736 | UINT8 NumberOfButtons;\r |
61ce5861 | 1737 | } SMBIOS_TABLE_TYPE21;\r |
1738 | \r | |
98cb9ae8 | 1739 | ///\r |
1740 | /// Portable Battery - Device Chemistry\r | |
1741 | ///\r | |
1742 | typedef enum { \r | |
1743 | PortableBatteryDeviceChemistryOther = 0x01,\r | |
1744 | PortableBatteryDeviceChemistryUnknown = 0x02,\r | |
1745 | PortableBatteryDeviceChemistryLeadAcid = 0x03,\r | |
1746 | PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r | |
1747 | PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r | |
1748 | PortableBatteryDeviceChemistryLithiumIon = 0x06,\r | |
1749 | PortableBatteryDeviceChemistryZincAir = 0x07,\r | |
1750 | PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r | |
1751 | } PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r | |
1752 | \r | |
4135253b | 1753 | ///\r |
af2dc6a7 | 1754 | /// Portable Battery (Type 22).\r |
4135253b | 1755 | ///\r |
98cb9ae8 | 1756 | /// This structure describes the attributes of the portable battery(s) for the system. \r |
1757 | /// The structure contains the static attributes for the group. Each structure describes \r | |
1f9f8414 | 1758 | /// a single battery pack's attributes.\r |
98cb9ae8 | 1759 | ///\r |
61ce5861 | 1760 | typedef struct {\r |
98cb9ae8 | 1761 | SMBIOS_STRUCTURE Hdr;\r |
1762 | SMBIOS_TABLE_STRING Location;\r | |
1763 | SMBIOS_TABLE_STRING Manufacturer;\r | |
1764 | SMBIOS_TABLE_STRING ManufactureDate;\r | |
1765 | SMBIOS_TABLE_STRING SerialNumber;\r | |
1766 | SMBIOS_TABLE_STRING DeviceName;\r | |
af2dc6a7 | 1767 | UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r |
98cb9ae8 | 1768 | UINT16 DeviceCapacity;\r |
1769 | UINT16 DesignVoltage;\r | |
1770 | SMBIOS_TABLE_STRING SBDSVersionNumber;\r | |
1771 | UINT8 MaximumErrorInBatteryData;\r | |
1772 | UINT16 SBDSSerialNumber;\r | |
1773 | UINT16 SBDSManufactureDate;\r | |
1774 | SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r | |
1775 | UINT8 DesignCapacityMultiplier;\r | |
1776 | UINT32 OEMSpecific;\r | |
61ce5861 | 1777 | } SMBIOS_TABLE_TYPE22;\r |
1778 | \r | |
4135253b | 1779 | ///\r |
1780 | /// System Reset (Type 23)\r | |
1781 | ///\r | |
98cb9ae8 | 1782 | /// This structure describes whether Automatic System Reset functions enabled (Status). \r |
1783 | /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r | |
1784 | /// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r | |
1785 | /// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r | |
1786 | /// the system will re-boot according to the Boot Option at Limit. \r | |
1787 | ///\r | |
61ce5861 | 1788 | typedef struct {\r |
1789 | SMBIOS_STRUCTURE Hdr;\r | |
1790 | UINT8 Capabilities;\r | |
1791 | UINT16 ResetCount;\r | |
1792 | UINT16 ResetLimit;\r | |
1793 | UINT16 TimerInterval;\r | |
1794 | UINT16 Timeout;\r | |
1795 | } SMBIOS_TABLE_TYPE23;\r | |
1796 | \r | |
4135253b | 1797 | ///\r |
af2dc6a7 | 1798 | /// Hardware Security (Type 24).\r |
4135253b | 1799 | ///\r |
98cb9ae8 | 1800 | /// This structure describes the system-wide hardware security settings. \r |
1801 | ///\r | |
61ce5861 | 1802 | typedef struct {\r |
1803 | SMBIOS_STRUCTURE Hdr;\r | |
1804 | UINT8 HardwareSecuritySettings;\r | |
1805 | } SMBIOS_TABLE_TYPE24;\r | |
1806 | \r | |
4135253b | 1807 | ///\r |
af2dc6a7 | 1808 | /// System Power Controls (Type 25).\r |
4135253b | 1809 | ///\r |
98cb9ae8 | 1810 | /// This structure describes the attributes for controlling the main power supply to the system. \r |
1811 | /// Software that interprets this structure uses the month, day, hour, minute, and second values \r | |
1812 | /// to determine the number of seconds until the next power-on of the system. The presence of \r | |
1813 | /// this structure implies that a timed power-on facility is available for the system. \r | |
1814 | ///\r | |
61ce5861 | 1815 | typedef struct {\r |
1816 | SMBIOS_STRUCTURE Hdr;\r | |
1817 | UINT8 NextScheduledPowerOnMonth;\r | |
1818 | UINT8 NextScheduledPowerOnDayOfMonth;\r | |
1819 | UINT8 NextScheduledPowerOnHour;\r | |
1820 | UINT8 NextScheduledPowerOnMinute;\r | |
1821 | UINT8 NextScheduledPowerOnSecond;\r | |
1822 | } SMBIOS_TABLE_TYPE25;\r | |
1823 | \r | |
98cb9ae8 | 1824 | ///\r |
af2dc6a7 | 1825 | /// Voltage Probe - Location and Status.\r |
98cb9ae8 | 1826 | ///\r |
1827 | typedef struct {\r | |
1828 | UINT8 VoltageProbeSite :5;\r | |
1829 | UINT8 VoltageProbeStatus :3;\r | |
1830 | } MISC_VOLTAGE_PROBE_LOCATION;\r | |
1831 | \r | |
4135253b | 1832 | ///\r |
1833 | /// Voltage Probe (Type 26)\r | |
1834 | ///\r | |
98cb9ae8 | 1835 | /// This describes the attributes for a voltage probe in the system. \r |
1836 | /// Each structure describes a single voltage probe.\r | |
1837 | ///\r | |
61ce5861 | 1838 | typedef struct {\r |
98cb9ae8 | 1839 | SMBIOS_STRUCTURE Hdr;\r |
1840 | SMBIOS_TABLE_STRING Description;\r | |
1841 | MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r | |
1842 | UINT16 MaximumValue;\r | |
1843 | UINT16 MinimumValue;\r | |
1844 | UINT16 Resolution;\r | |
1845 | UINT16 Tolerance;\r | |
1846 | UINT16 Accuracy;\r | |
1847 | UINT32 OEMDefined;\r | |
1848 | UINT16 NominalValue;\r | |
61ce5861 | 1849 | } SMBIOS_TABLE_TYPE26;\r |
1850 | \r | |
98cb9ae8 | 1851 | ///\r |
af2dc6a7 | 1852 | /// Cooling Device - Device Type and Status.\r |
98cb9ae8 | 1853 | ///\r |
1854 | typedef struct {\r | |
1855 | UINT8 CoolingDevice :5;\r | |
1856 | UINT8 CoolingDeviceStatus :3;\r | |
1857 | } MISC_COOLING_DEVICE_TYPE;\r | |
1858 | \r | |
4135253b | 1859 | ///\r |
1860 | /// Cooling Device (Type 27)\r | |
1861 | ///\r | |
98cb9ae8 | 1862 | /// This structure describes the attributes for a cooling device in the system. \r |
1863 | /// Each structure describes a single cooling device. \r | |
1864 | /// \r | |
61ce5861 | 1865 | typedef struct {\r |
98cb9ae8 | 1866 | SMBIOS_STRUCTURE Hdr;\r |
1867 | UINT16 TemperatureProbeHandle;\r | |
1868 | MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r | |
1869 | UINT8 CoolingUnitGroup;\r | |
1870 | UINT32 OEMDefined;\r | |
1871 | UINT16 NominalSpeed;\r | |
7ddba202 SZ |
1872 | //\r |
1873 | // Add for smbios 2.7\r | |
1874 | //\r | |
1875 | SMBIOS_TABLE_STRING Description;\r | |
61ce5861 | 1876 | } SMBIOS_TABLE_TYPE27;\r |
1877 | \r | |
98cb9ae8 | 1878 | ///\r |
af2dc6a7 | 1879 | /// Temperature Probe - Location and Status.\r |
98cb9ae8 | 1880 | ///\r |
1881 | typedef struct {\r | |
1882 | UINT8 TemperatureProbeSite :5;\r | |
1883 | UINT8 TemperatureProbeStatus :3;\r | |
1884 | } MISC_TEMPERATURE_PROBE_LOCATION;\r | |
1885 | \r | |
4135253b | 1886 | ///\r |
af2dc6a7 | 1887 | /// Temperature Probe (Type 28).\r |
4135253b | 1888 | ///\r |
98cb9ae8 | 1889 | /// This structure describes the attributes for a temperature probe in the system. \r |
1890 | /// Each structure describes a single temperature probe. \r | |
1891 | ///\r | |
61ce5861 | 1892 | typedef struct {\r |
98cb9ae8 | 1893 | SMBIOS_STRUCTURE Hdr;\r |
1894 | SMBIOS_TABLE_STRING Description;\r | |
1895 | MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r | |
1896 | UINT16 MaximumValue;\r | |
1897 | UINT16 MinimumValue;\r | |
1898 | UINT16 Resolution;\r | |
1899 | UINT16 Tolerance;\r | |
1900 | UINT16 Accuracy;\r | |
1901 | UINT32 OEMDefined;\r | |
1902 | UINT16 NominalValue;\r | |
61ce5861 | 1903 | } SMBIOS_TABLE_TYPE28;\r |
1904 | \r | |
98cb9ae8 | 1905 | ///\r |
af2dc6a7 | 1906 | /// Electrical Current Probe - Location and Status.\r |
98cb9ae8 | 1907 | ///\r |
1908 | typedef struct {\r | |
1909 | UINT8 ElectricalCurrentProbeSite :5;\r | |
1910 | UINT8 ElectricalCurrentProbeStatus :3;\r | |
1911 | } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r | |
1912 | \r | |
4135253b | 1913 | ///\r |
af2dc6a7 | 1914 | /// Electrical Current Probe (Type 29).\r |
4135253b | 1915 | ///\r |
98cb9ae8 | 1916 | /// This structure describes the attributes for an electrical current probe in the system.\r |
1917 | /// Each structure describes a single electrical current probe. \r | |
1918 | ///\r | |
61ce5861 | 1919 | typedef struct {\r |
98cb9ae8 | 1920 | SMBIOS_STRUCTURE Hdr;\r |
1921 | SMBIOS_TABLE_STRING Description;\r | |
1922 | MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r | |
1923 | UINT16 MaximumValue;\r | |
1924 | UINT16 MinimumValue;\r | |
1925 | UINT16 Resolution;\r | |
1926 | UINT16 Tolerance;\r | |
1927 | UINT16 Accuracy;\r | |
1928 | UINT32 OEMDefined;\r | |
1929 | UINT16 NominalValue;\r | |
61ce5861 | 1930 | } SMBIOS_TABLE_TYPE29;\r |
1931 | \r | |
4135253b | 1932 | ///\r |
af2dc6a7 | 1933 | /// Out-of-Band Remote Access (Type 30).\r |
4135253b | 1934 | ///\r |
98cb9ae8 | 1935 | /// This structure describes the attributes and policy settings of a hardware facility \r |
1936 | /// that may be used to gain remote access to a hardware system when the operating system \r | |
1937 | /// is not available due to power-down status, hardware failures, or boot failures. \r | |
1938 | ///\r | |
61ce5861 | 1939 | typedef struct {\r |
1940 | SMBIOS_STRUCTURE Hdr;\r | |
1941 | SMBIOS_TABLE_STRING ManufacturerName;\r | |
1942 | UINT8 Connections;\r | |
1943 | } SMBIOS_TABLE_TYPE30;\r | |
1944 | \r | |
4135253b | 1945 | ///\r |
af2dc6a7 | 1946 | /// Boot Integrity Services (BIS) Entry Point (Type 31).\r |
4135253b | 1947 | ///\r |
98cb9ae8 | 1948 | /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r |
1949 | /// \r | |
61ce5861 | 1950 | typedef struct {\r |
1951 | SMBIOS_STRUCTURE Hdr;\r | |
1952 | UINT8 Checksum;\r | |
1953 | UINT8 Reserved1;\r | |
1954 | UINT16 Reserved2;\r | |
1955 | UINT32 BisEntry16;\r | |
1956 | UINT32 BisEntry32;\r | |
1957 | UINT64 Reserved3;\r | |
1958 | UINT32 Reserved4;\r | |
1959 | } SMBIOS_TABLE_TYPE31;\r | |
1960 | \r | |
98cb9ae8 | 1961 | ///\r |
af2dc6a7 | 1962 | /// System Boot Information - System Boot Status.\r |
98cb9ae8 | 1963 | ///\r |
1964 | typedef enum {\r | |
1965 | BootInformationStatusNoError = 0x00,\r | |
1966 | BootInformationStatusNoBootableMedia = 0x01,\r | |
1967 | BootInformationStatusNormalOSFailedLoading = 0x02,\r | |
1968 | BootInformationStatusFirmwareDetectedFailure = 0x03,\r | |
1969 | BootInformationStatusOSDetectedFailure = 0x04,\r | |
1970 | BootInformationStatusUserRequestedBoot = 0x05,\r | |
1971 | BootInformationStatusSystemSecurityViolation = 0x06,\r | |
1972 | BootInformationStatusPreviousRequestedImage = 0x07,\r | |
1973 | BootInformationStatusWatchdogTimerExpired = 0x08,\r | |
1974 | BootInformationStatusStartReserved = 0x09,\r | |
1975 | BootInformationStatusStartOemSpecific = 0x80,\r | |
1976 | BootInformationStatusStartProductSpecific = 0xC0\r | |
1977 | } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r | |
1978 | \r | |
4135253b | 1979 | ///\r |
af2dc6a7 | 1980 | /// System Boot Information (Type 32).\r |
4135253b | 1981 | ///\r |
98cb9ae8 | 1982 | /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r |
1983 | /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r | |
1984 | /// application via this structure. When used in the PXE environment, for example, \r | |
1985 | /// this code identifies the reason the PXE was initiated and can be used by boot-image \r | |
1f9f8414 | 1986 | /// software to further automate an enterprise's PXE sessions. For example, an enterprise \r |
98cb9ae8 | 1987 | /// could choose to automatically download a hardware-diagnostic image to a client whose \r |
1988 | /// reason code indicated either a firmware- or operating system-detected hardware failure.\r | |
1989 | ///\r | |
61ce5861 | 1990 | typedef struct {\r |
98cb9ae8 | 1991 | SMBIOS_STRUCTURE Hdr;\r |
1992 | UINT8 Reserved[6];\r | |
af2dc6a7 | 1993 | UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r |
61ce5861 | 1994 | } SMBIOS_TABLE_TYPE32;\r |
1995 | \r | |
4135253b | 1996 | ///\r |
af2dc6a7 | 1997 | /// 64-bit Memory Error Information (Type 33).\r |
4135253b | 1998 | ///\r |
98cb9ae8 | 1999 | /// This structure describes an error within a Physical Memory Array, \r |
2000 | /// when the error address is above 4G (0xFFFFFFFF).\r | |
2001 | /// \r | |
61ce5861 | 2002 | typedef struct {\r |
98cb9ae8 | 2003 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 2004 | UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r |
2005 | UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r | |
2006 | UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r | |
98cb9ae8 | 2007 | UINT32 VendorSyndrome;\r |
2008 | UINT64 MemoryArrayErrorAddress;\r | |
2009 | UINT64 DeviceErrorAddress;\r | |
2010 | UINT32 ErrorResolution;\r | |
61ce5861 | 2011 | } SMBIOS_TABLE_TYPE33;\r |
2012 | \r | |
98cb9ae8 | 2013 | ///\r |
af2dc6a7 | 2014 | /// Management Device - Type. \r |
98cb9ae8 | 2015 | ///\r |
2016 | typedef enum {\r | |
2017 | ManagementDeviceTypeOther = 0x01,\r | |
2018 | ManagementDeviceTypeUnknown = 0x02,\r | |
2019 | ManagementDeviceTypeLm75 = 0x03,\r | |
2020 | ManagementDeviceTypeLm78 = 0x04,\r | |
2021 | ManagementDeviceTypeLm79 = 0x05,\r | |
2022 | ManagementDeviceTypeLm80 = 0x06,\r | |
2023 | ManagementDeviceTypeLm81 = 0x07,\r | |
2024 | ManagementDeviceTypeAdm9240 = 0x08,\r | |
2025 | ManagementDeviceTypeDs1780 = 0x09,\r | |
2026 | ManagementDeviceTypeMaxim1617 = 0x0A,\r | |
2027 | ManagementDeviceTypeGl518Sm = 0x0B,\r | |
2028 | ManagementDeviceTypeW83781D = 0x0C,\r | |
2029 | ManagementDeviceTypeHt82H791 = 0x0D\r | |
2030 | } MISC_MANAGEMENT_DEVICE_TYPE;\r | |
2031 | \r | |
2032 | ///\r | |
af2dc6a7 | 2033 | /// Management Device - Address Type. \r |
98cb9ae8 | 2034 | ///\r |
2035 | typedef enum {\r | |
2036 | ManagementDeviceAddressTypeOther = 0x01,\r | |
2037 | ManagementDeviceAddressTypeUnknown = 0x02,\r | |
2038 | ManagementDeviceAddressTypeIOPort = 0x03,\r | |
2039 | ManagementDeviceAddressTypeMemory = 0x04,\r | |
2040 | ManagementDeviceAddressTypeSmbus = 0x05\r | |
2041 | } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r | |
2042 | \r | |
4135253b | 2043 | ///\r |
af2dc6a7 | 2044 | /// Management Device (Type 34).\r |
4135253b | 2045 | ///\r |
98cb9ae8 | 2046 | /// The information in this structure defines the attributes of a Management Device. \r |
2047 | /// A Management Device might control one or more fans or voltage, current, or temperature\r | |
2048 | /// probes as defined by one or more Management Device Component structures.\r | |
2049 | ///\r | |
61ce5861 | 2050 | typedef struct {\r |
98cb9ae8 | 2051 | SMBIOS_STRUCTURE Hdr;\r |
2052 | SMBIOS_TABLE_STRING Description;\r | |
af2dc6a7 | 2053 | UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r |
98cb9ae8 | 2054 | UINT32 Address;\r |
af2dc6a7 | 2055 | UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r |
61ce5861 | 2056 | } SMBIOS_TABLE_TYPE34;\r |
2057 | \r | |
4135253b | 2058 | ///\r |
2059 | /// Management Device Component (Type 35)\r | |
2060 | ///\r | |
98cb9ae8 | 2061 | /// This structure associates a cooling device or environmental probe with structures \r |
2062 | /// that define the controlling hardware device and (optionally) the component's thresholds. \r | |
2063 | ///\r | |
61ce5861 | 2064 | typedef struct {\r |
2065 | SMBIOS_STRUCTURE Hdr;\r | |
2066 | SMBIOS_TABLE_STRING Description;\r | |
2067 | UINT16 ManagementDeviceHandle;\r | |
2068 | UINT16 ComponentHandle;\r | |
2069 | UINT16 ThresholdHandle;\r | |
2070 | } SMBIOS_TABLE_TYPE35;\r | |
2071 | \r | |
4135253b | 2072 | ///\r |
af2dc6a7 | 2073 | /// Management Device Threshold Data (Type 36).\r |
4135253b | 2074 | ///\r |
98cb9ae8 | 2075 | /// The information in this structure defines threshold information for \r |
2076 | /// a component (probe or cooling-unit) contained within a Management Device. \r | |
2077 | ///\r | |
61ce5861 | 2078 | typedef struct {\r |
2079 | SMBIOS_STRUCTURE Hdr;\r | |
2080 | UINT16 LowerThresholdNonCritical;\r | |
2081 | UINT16 UpperThresholdNonCritical;\r | |
2082 | UINT16 LowerThresholdCritical;\r | |
2083 | UINT16 UpperThresholdCritical;\r | |
2084 | UINT16 LowerThresholdNonRecoverable;\r | |
2085 | UINT16 UpperThresholdNonRecoverable;\r | |
2086 | } SMBIOS_TABLE_TYPE36;\r | |
2087 | \r | |
bf7ea009 | 2088 | ///\r |
af2dc6a7 | 2089 | /// Memory Channel Entry.\r |
bf7ea009 | 2090 | ///\r |
61ce5861 | 2091 | typedef struct {\r |
2092 | UINT8 DeviceLoad;\r | |
2093 | UINT16 DeviceHandle;\r | |
2094 | } MEMORY_DEVICE;\r | |
2095 | \r | |
98cb9ae8 | 2096 | ///\r |
af2dc6a7 | 2097 | /// Memory Channel - Channel Type.\r |
98cb9ae8 | 2098 | ///\r |
2099 | typedef enum {\r | |
2100 | MemoryChannelTypeOther = 0x01,\r | |
2101 | MemoryChannelTypeUnknown = 0x02,\r | |
2102 | MemoryChannelTypeRambus = 0x03,\r | |
2103 | MemoryChannelTypeSyncLink = 0x04\r | |
2104 | } MEMORY_CHANNEL_TYPE;\r | |
2105 | \r | |
4135253b | 2106 | ///\r |
2107 | /// Memory Channel (Type 37)\r | |
2108 | ///\r | |
98cb9ae8 | 2109 | /// The information in this structure provides the correlation between a Memory Channel\r |
af2dc6a7 | 2110 | /// and its associated Memory Devices. Each device presents one or more loads to the channel. \r |
2111 | /// The sum of all device loads cannot exceed the channel's defined maximum.\r | |
98cb9ae8 | 2112 | ///\r |
61ce5861 | 2113 | typedef struct {\r |
2114 | SMBIOS_STRUCTURE Hdr;\r | |
2115 | UINT8 ChannelType;\r | |
2116 | UINT8 MaximumChannelLoad;\r | |
2117 | UINT8 MemoryDeviceCount;\r | |
2118 | MEMORY_DEVICE MemoryDevice[1];\r | |
2119 | } SMBIOS_TABLE_TYPE37;\r | |
2120 | \r | |
98cb9ae8 | 2121 | ///\r |
2122 | /// IPMI Device Information - BMC Interface Type\r | |
2123 | ///\r | |
2124 | typedef enum {\r | |
2125 | IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r | |
af2dc6a7 | 2126 | IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r |
2127 | IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r | |
2128 | IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r | |
98cb9ae8 | 2129 | IPMIDeviceInfoInterfaceTypeReserved = 0x04\r |
2130 | } BMC_INTERFACE_TYPE;\r | |
2131 | \r | |
4135253b | 2132 | ///\r |
af2dc6a7 | 2133 | /// IPMI Device Information (Type 38).\r |
4135253b | 2134 | ///\r |
7ddba202 | 2135 | /// The information in this structure defines the attributes of an\r |
98cb9ae8 | 2136 | /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r |
7ddba202 SZ |
2137 | ///\r |
2138 | /// The Type 42 structure can also be used to describe a physical management controller\r | |
2139 | /// host interface and one or more protocols that share that interface. If IPMI is not\r | |
2140 | /// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r | |
2141 | /// Providing Type 38 is recommended for backward compatibility.\r | |
2142 | ///\r | |
61ce5861 | 2143 | typedef struct {\r |
2144 | SMBIOS_STRUCTURE Hdr;\r | |
af2dc6a7 | 2145 | UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r |
61ce5861 | 2146 | UINT8 IPMISpecificationRevision;\r |
2147 | UINT8 I2CSlaveAddress;\r | |
2148 | UINT8 NVStorageDeviceAddress;\r | |
2149 | UINT64 BaseAddress;\r | |
2150 | UINT8 BaseAddressModifier_InterruptInfo;\r | |
2151 | UINT8 InterruptNumber;\r | |
2152 | } SMBIOS_TABLE_TYPE38;\r | |
2153 | \r | |
98cb9ae8 | 2154 | ///\r |
af2dc6a7 | 2155 | /// System Power Supply - Power Supply Characteristics.\r |
98cb9ae8 | 2156 | ///\r |
2157 | typedef struct {\r | |
2158 | UINT16 PowerSupplyHotReplaceable:1;\r | |
2159 | UINT16 PowerSupplyPresent :1;\r | |
2160 | UINT16 PowerSupplyUnplugged :1;\r | |
2161 | UINT16 InputVoltageRangeSwitch :4;\r | |
2162 | UINT16 PowerSupplyStatus :3;\r | |
2163 | UINT16 PowerSupplyType :4;\r | |
2164 | UINT16 Reserved :2;\r | |
2165 | } SYS_POWER_SUPPLY_CHARACTERISTICS;\r | |
2166 | \r | |
4135253b | 2167 | ///\r |
af2dc6a7 | 2168 | /// System Power Supply (Type 39).\r |
4135253b | 2169 | ///\r |
7ddba202 SZ |
2170 | /// This structure identifies attributes of a system power supply. One instance\r |
2171 | /// of this record is present for each possible power supply in a system.\r | |
98cb9ae8 | 2172 | ///\r |
61ce5861 | 2173 | typedef struct {\r |
98cb9ae8 | 2174 | SMBIOS_STRUCTURE Hdr;\r |
2175 | UINT8 PowerUnitGroup;\r | |
2176 | SMBIOS_TABLE_STRING Location;\r | |
2177 | SMBIOS_TABLE_STRING DeviceName;\r | |
2178 | SMBIOS_TABLE_STRING Manufacturer;\r | |
2179 | SMBIOS_TABLE_STRING SerialNumber;\r | |
2180 | SMBIOS_TABLE_STRING AssetTagNumber;\r | |
2181 | SMBIOS_TABLE_STRING ModelPartNumber;\r | |
2182 | SMBIOS_TABLE_STRING RevisionLevel;\r | |
2183 | UINT16 MaxPowerCapacity;\r | |
2184 | SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r | |
2185 | UINT16 InputVoltageProbeHandle;\r | |
2186 | UINT16 CoolingDeviceHandle;\r | |
2187 | UINT16 InputCurrentProbeHandle;\r | |
61ce5861 | 2188 | } SMBIOS_TABLE_TYPE39;\r |
2189 | \r | |
bf7ea009 | 2190 | ///\r |
af2dc6a7 | 2191 | /// Additional Information Entry Format. \r |
bf7ea009 | 2192 | ///\r |
61ce5861 | 2193 | typedef struct { \r |
2194 | UINT8 EntryLength; \r | |
2195 | UINT16 ReferencedHandle;\r | |
2196 | UINT8 ReferencedOffset;\r | |
2197 | SMBIOS_TABLE_STRING EntryString;\r | |
2198 | UINT8 Value[1];\r | |
2199 | }ADDITIONAL_INFORMATION_ENTRY;\r | |
2200 | \r | |
4135253b | 2201 | ///\r |
af2dc6a7 | 2202 | /// Additional Information (Type 40).\r |
4135253b | 2203 | ///\r |
98cb9ae8 | 2204 | /// This structure is intended to provide additional information for handling unspecified \r |
2205 | /// enumerated values and interim field updates in another structure. \r | |
2206 | ///\r | |
61ce5861 | 2207 | typedef struct {\r |
2208 | SMBIOS_STRUCTURE Hdr;\r | |
2209 | UINT8 NumberOfAdditionalInformationEntries;\r | |
2210 | ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r | |
2211 | } SMBIOS_TABLE_TYPE40;\r | |
2212 | \r | |
98cb9ae8 | 2213 | ///\r |
af2dc6a7 | 2214 | /// Onboard Devices Extended Information - Onboard Device Types.\r |
98cb9ae8 | 2215 | ///\r |
2216 | typedef enum{\r | |
2217 | OnBoardDeviceExtendedTypeOther = 0x01,\r | |
2218 | OnBoardDeviceExtendedTypeUnknown = 0x02,\r | |
2219 | OnBoardDeviceExtendedTypeVideo = 0x03,\r | |
2220 | OnBoardDeviceExtendedTypeScsiController = 0x04,\r | |
2221 | OnBoardDeviceExtendedTypeEthernet = 0x05,\r | |
2222 | OnBoardDeviceExtendedTypeTokenRing = 0x06,\r | |
2223 | OnBoardDeviceExtendedTypeSound = 0x07,\r | |
2224 | OnBoardDeviceExtendedTypePATAController = 0x08,\r | |
2225 | OnBoardDeviceExtendedTypeSATAController = 0x09,\r | |
2226 | OnBoardDeviceExtendedTypeSASController = 0x0A\r | |
2227 | } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r | |
2228 | \r | |
4135253b | 2229 | ///\r |
af2dc6a7 | 2230 | /// Onboard Devices Extended Information (Type 41).\r |
4135253b | 2231 | ///\r |
98cb9ae8 | 2232 | /// The information in this structure defines the attributes of devices that \r |
2233 | /// are onboard (soldered onto) a system element, usually the baseboard. \r | |
2234 | /// In general, an entry in this table implies that the BIOS has some level of \r | |
2235 | /// control over the enabling of the associated device for use by the system. \r | |
2236 | ///\r | |
61ce5861 | 2237 | typedef struct {\r |
98cb9ae8 | 2238 | SMBIOS_STRUCTURE Hdr;\r |
2239 | SMBIOS_TABLE_STRING ReferenceDesignation;\r | |
af2dc6a7 | 2240 | UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r |
98cb9ae8 | 2241 | UINT8 DeviceTypeInstance;\r |
2242 | UINT16 SegmentGroupNum;\r | |
2243 | UINT8 BusNum;\r | |
7ddba202 | 2244 | UINT8 DevFuncNum;\r |
61ce5861 | 2245 | } SMBIOS_TABLE_TYPE41;\r |
2246 | \r | |
7ddba202 SZ |
2247 | ///\r |
2248 | /// Management Controller Host Interface (Type 42).\r | |
2249 | ///\r | |
2250 | /// The information in this structure defines the attributes of a Management\r | |
2251 | /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r | |
2252 | ///\r | |
2253 | /// Type 42 should be used for management controller host interfaces that use protocols\r | |
2254 | /// other than IPMI or that use multiple protocols on a single host interface type.\r | |
2255 | ///\r | |
2256 | /// This structure should also be provided if IPMI is shared with other protocols\r | |
2257 | /// over the same interface hardware. If IPMI is not shared with other protocols,\r | |
2258 | /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r | |
2259 | /// recommended for backward compatibility. The structures are not required to\r | |
2260 | /// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r | |
2261 | /// simultaneously to provide backward compatibility with IPMI applications or drivers\r | |
2262 | /// that do not yet recognize the Type 42 structure.\r | |
2263 | ///\r | |
2264 | typedef struct {\r | |
2265 | SMBIOS_STRUCTURE Hdr;\r | |
2266 | UINT8 InterfaceType;\r | |
2267 | UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes\r | |
2268 | } SMBIOS_TABLE_TYPE42;\r | |
2269 | \r | |
4135253b | 2270 | ///\r |
2271 | /// Inactive (Type 126)\r | |
2272 | ///\r | |
61ce5861 | 2273 | typedef struct {\r |
2274 | SMBIOS_STRUCTURE Hdr;\r | |
2275 | } SMBIOS_TABLE_TYPE126;\r | |
2276 | \r | |
4135253b | 2277 | ///\r |
2278 | /// End-of-Table (Type 127)\r | |
2279 | ///\r | |
61ce5861 | 2280 | typedef struct {\r |
2281 | SMBIOS_STRUCTURE Hdr;\r | |
2282 | } SMBIOS_TABLE_TYPE127;\r | |
2283 | \r | |
4135253b | 2284 | ///\r |
af2dc6a7 | 2285 | /// Union of all the possible SMBIOS record types.\r |
4135253b | 2286 | ///\r |
61ce5861 | 2287 | typedef union {\r |
2288 | SMBIOS_STRUCTURE *Hdr;\r | |
2289 | SMBIOS_TABLE_TYPE0 *Type0;\r | |
2290 | SMBIOS_TABLE_TYPE1 *Type1;\r | |
2291 | SMBIOS_TABLE_TYPE2 *Type2;\r | |
2292 | SMBIOS_TABLE_TYPE3 *Type3;\r | |
2293 | SMBIOS_TABLE_TYPE4 *Type4;\r | |
2294 | SMBIOS_TABLE_TYPE5 *Type5;\r | |
2295 | SMBIOS_TABLE_TYPE6 *Type6;\r | |
2296 | SMBIOS_TABLE_TYPE7 *Type7;\r | |
2297 | SMBIOS_TABLE_TYPE8 *Type8;\r | |
2298 | SMBIOS_TABLE_TYPE9 *Type9;\r | |
2299 | SMBIOS_TABLE_TYPE10 *Type10;\r | |
2300 | SMBIOS_TABLE_TYPE11 *Type11;\r | |
2301 | SMBIOS_TABLE_TYPE12 *Type12;\r | |
2302 | SMBIOS_TABLE_TYPE13 *Type13;\r | |
2303 | SMBIOS_TABLE_TYPE14 *Type14;\r | |
2304 | SMBIOS_TABLE_TYPE15 *Type15;\r | |
2305 | SMBIOS_TABLE_TYPE16 *Type16;\r | |
2306 | SMBIOS_TABLE_TYPE17 *Type17;\r | |
2307 | SMBIOS_TABLE_TYPE18 *Type18;\r | |
2308 | SMBIOS_TABLE_TYPE19 *Type19;\r | |
2309 | SMBIOS_TABLE_TYPE20 *Type20;\r | |
2310 | SMBIOS_TABLE_TYPE21 *Type21;\r | |
2311 | SMBIOS_TABLE_TYPE22 *Type22;\r | |
2312 | SMBIOS_TABLE_TYPE23 *Type23;\r | |
2313 | SMBIOS_TABLE_TYPE24 *Type24;\r | |
2314 | SMBIOS_TABLE_TYPE25 *Type25;\r | |
2315 | SMBIOS_TABLE_TYPE26 *Type26;\r | |
2316 | SMBIOS_TABLE_TYPE27 *Type27;\r | |
2317 | SMBIOS_TABLE_TYPE28 *Type28;\r | |
2318 | SMBIOS_TABLE_TYPE29 *Type29;\r | |
2319 | SMBIOS_TABLE_TYPE30 *Type30;\r | |
2320 | SMBIOS_TABLE_TYPE31 *Type31;\r | |
2321 | SMBIOS_TABLE_TYPE32 *Type32;\r | |
2322 | SMBIOS_TABLE_TYPE33 *Type33;\r | |
2323 | SMBIOS_TABLE_TYPE34 *Type34;\r | |
2324 | SMBIOS_TABLE_TYPE35 *Type35;\r | |
2325 | SMBIOS_TABLE_TYPE36 *Type36;\r | |
2326 | SMBIOS_TABLE_TYPE37 *Type37;\r | |
2327 | SMBIOS_TABLE_TYPE38 *Type38;\r | |
2328 | SMBIOS_TABLE_TYPE39 *Type39;\r | |
2329 | SMBIOS_TABLE_TYPE40 *Type40;\r | |
2330 | SMBIOS_TABLE_TYPE41 *Type41;\r | |
884f9295 | 2331 | SMBIOS_TABLE_TYPE42 *Type42;\r |
61ce5861 | 2332 | SMBIOS_TABLE_TYPE126 *Type126;\r |
2333 | SMBIOS_TABLE_TYPE127 *Type127;\r | |
2334 | UINT8 *Raw;\r | |
2335 | } SMBIOS_STRUCTURE_POINTER;\r | |
2336 | \r | |
766f4bc1 | 2337 | #pragma pack()\r |
2338 | \r | |
a7ed1e2e | 2339 | #endif\r |