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a7ed1e2e | 1 | /** @file\r |
4a228334 | 2 | Industry Standard Definitions of SMBIOS Table Specification v2.8.0.\r |
a7ed1e2e | 3 | \r |
f9ed6c93 | 4 | Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r |
af2dc6a7 | 5 | This program and the accompanying materials are licensed and made available under \r |
6 | the terms and conditions of the BSD License that accompanies this distribution. \r | |
7 | The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php. \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
a7ed1e2e | 12 | \r |
a7ed1e2e | 13 | **/\r |
14 | \r | |
15 | #ifndef __SMBIOS_STANDARD_H__\r | |
16 | #define __SMBIOS_STANDARD_H__\r | |
98cb9ae8 | 17 | \r |
f2d0889f | 18 | ///\r |
19 | /// Reference SMBIOS 2.6, chapter 3.1.2.\r | |
20 | /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r | |
21 | /// use by this specification.\r | |
22 | ///\r | |
23 | #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r | |
24 | \r | |
7ddba202 SZ |
25 | ///\r |
26 | /// Reference SMBIOS 2.7, chapter 6.1.2.\r | |
27 | /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r | |
28 | /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r | |
29 | /// This number is not used for any other purpose by the SMBIOS specification.\r | |
30 | ///\r | |
31 | #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r | |
32 | \r | |
f2d0889f | 33 | ///\r |
af2dc6a7 | 34 | /// Reference SMBIOS 2.6, chapter 3.1.3.\r |
35 | /// Each text string is limited to 64 significant characters due to system MIF limitations.\r | |
7ddba202 SZ |
36 | /// Reference SMBIOS 2.7, chapter 6.1.3.\r |
37 | /// It will have no limit on the length of each individual text string.\r | |
f2d0889f | 38 | ///\r |
39 | #define SMBIOS_STRING_MAX_LENGTH 64\r | |
40 | \r | |
41 | ///\r | |
42 | /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r | |
43 | /// Upper-level software that interprets the SMBIOS structure-table should bypass an \r | |
44 | /// Inactive structure just like a structure type that the software does not recognize.\r | |
45 | ///\r | |
46 | #define SMBIOS_TYPE_INACTIVE 0x007E \r | |
47 | \r | |
48 | ///\r | |
49 | /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r | |
50 | /// The end-of-table indicator is used in the last physical structure in a table\r | |
51 | ///\r | |
52 | #define SMBIOS_TYPE_END_OF_TABLE 0x007F\r | |
53 | \r | |
4135253b | 54 | ///\r |
af2dc6a7 | 55 | /// Smbios Table Entry Point Structure.\r |
4135253b | 56 | ///\r |
766f4bc1 | 57 | #pragma pack(1)\r |
a7ed1e2e | 58 | typedef struct {\r |
59 | UINT8 AnchorString[4];\r | |
60 | UINT8 EntryPointStructureChecksum;\r | |
61 | UINT8 EntryPointLength;\r | |
62 | UINT8 MajorVersion;\r | |
63 | UINT8 MinorVersion;\r | |
64 | UINT16 MaxStructureSize;\r | |
65 | UINT8 EntryPointRevision;\r | |
66 | UINT8 FormattedArea[5];\r | |
67 | UINT8 IntermediateAnchorString[5];\r | |
68 | UINT8 IntermediateChecksum;\r | |
69 | UINT16 TableLength;\r | |
70 | UINT32 TableAddress;\r | |
71 | UINT16 NumberOfSmbiosStructures;\r | |
72 | UINT8 SmbiosBcdRevision;\r | |
73 | } SMBIOS_TABLE_ENTRY_POINT;\r | |
74 | \r | |
ec8432e5 | 75 | ///\r |
af2dc6a7 | 76 | /// The Smbios structure header.\r |
ec8432e5 | 77 | ///\r |
a7ed1e2e | 78 | typedef struct {\r |
79 | UINT8 Type;\r | |
80 | UINT8 Length;\r | |
81 | UINT16 Handle;\r | |
82 | } SMBIOS_STRUCTURE;\r | |
83 | \r | |
bf7ea009 | 84 | ///\r |
85 | /// String Number for a Null terminated string, 00h stands for no string available.\r | |
86 | ///\r | |
61ce5861 | 87 | typedef UINT8 SMBIOS_TABLE_STRING;\r |
88 | \r | |
98cb9ae8 | 89 | ///\r |
7ddba202 SZ |
90 | /// BIOS Characteristics\r |
91 | /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r | |
98cb9ae8 | 92 | ///\r |
93 | typedef struct {\r | |
af2dc6a7 | 94 | UINT32 Reserved :2; ///< Bits 0-1.\r |
7ddba202 SZ |
95 | UINT32 Unknown :1;\r |
96 | UINT32 BiosCharacteristicsNotSupported :1;\r | |
97 | UINT32 IsaIsSupported :1;\r | |
98cb9ae8 | 98 | UINT32 McaIsSupported :1;\r |
99 | UINT32 EisaIsSupported :1;\r | |
100 | UINT32 PciIsSupported :1;\r | |
101 | UINT32 PcmciaIsSupported :1;\r | |
102 | UINT32 PlugAndPlayIsSupported :1;\r | |
103 | UINT32 ApmIsSupported :1;\r | |
104 | UINT32 BiosIsUpgradable :1;\r | |
105 | UINT32 BiosShadowingAllowed :1;\r | |
106 | UINT32 VlVesaIsSupported :1;\r | |
107 | UINT32 EscdSupportIsAvailable :1;\r | |
108 | UINT32 BootFromCdIsSupported :1;\r | |
109 | UINT32 SelectableBootIsSupported :1;\r | |
110 | UINT32 RomBiosIsSocketed :1;\r | |
111 | UINT32 BootFromPcmciaIsSupported :1;\r | |
112 | UINT32 EDDSpecificationIsSupported :1;\r | |
113 | UINT32 JapaneseNecFloppyIsSupported :1;\r | |
114 | UINT32 JapaneseToshibaFloppyIsSupported :1;\r | |
115 | UINT32 Floppy525_360IsSupported :1;\r | |
116 | UINT32 Floppy525_12IsSupported :1;\r | |
117 | UINT32 Floppy35_720IsSupported :1;\r | |
118 | UINT32 Floppy35_288IsSupported :1;\r | |
119 | UINT32 PrintScreenIsSupported :1;\r | |
120 | UINT32 Keyboard8042IsSupported :1;\r | |
121 | UINT32 SerialIsSupported :1;\r | |
122 | UINT32 PrinterIsSupported :1;\r | |
123 | UINT32 CgaMonoIsSupported :1;\r | |
124 | UINT32 NecPc98 :1;\r | |
6800ac83 | 125 | UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r |
126 | ///< and bits 48-63 reserved for System Vendor. \r | |
98cb9ae8 | 127 | } MISC_BIOS_CHARACTERISTICS;\r |
128 | \r | |
129 | ///\r | |
7ddba202 SZ |
130 | /// BIOS Characteristics Extension Byte 1.\r |
131 | /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r | |
132 | /// within the BIOS Information structure.\r | |
98cb9ae8 | 133 | ///\r |
134 | typedef struct {\r | |
135 | UINT8 AcpiIsSupported :1;\r | |
7ddba202 SZ |
136 | UINT8 UsbLegacyIsSupported :1;\r |
137 | UINT8 AgpIsSupported :1;\r | |
119c1688 | 138 | UINT8 I2OBootIsSupported :1;\r |
98cb9ae8 | 139 | UINT8 Ls120BootIsSupported :1;\r |
140 | UINT8 AtapiZipDriveBootIsSupported :1;\r | |
141 | UINT8 Boot1394IsSupported :1;\r | |
142 | UINT8 SmartBatteryIsSupported :1;\r | |
143 | } MBCE_BIOS_RESERVED;\r | |
144 | \r | |
145 | ///\r | |
af2dc6a7 | 146 | /// BIOS Characteristics Extension Byte 2.\r |
7ddba202 | 147 | /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r |
98cb9ae8 | 148 | /// within the BIOS Information structure.\r |
149 | ///\r | |
150 | typedef struct {\r | |
151 | UINT8 BiosBootSpecIsSupported :1;\r | |
7ddba202 SZ |
152 | UINT8 FunctionKeyNetworkBootIsSupported :1;\r |
153 | UINT8 TargetContentDistributionEnabled :1;\r | |
154 | UINT8 UefiSpecificationSupported :1;\r | |
155 | UINT8 VirtualMachineSupported :1;\r | |
156 | UINT8 ExtensionByte2Reserved :3;\r | |
98cb9ae8 | 157 | } MBCE_SYSTEM_RESERVED;\r |
158 | \r | |
159 | ///\r | |
af2dc6a7 | 160 | /// BIOS Characteristics Extension Bytes.\r |
98cb9ae8 | 161 | ///\r |
162 | typedef struct {\r | |
163 | MBCE_BIOS_RESERVED BiosReserved;\r | |
164 | MBCE_SYSTEM_RESERVED SystemReserved;\r | |
98cb9ae8 | 165 | } MISC_BIOS_CHARACTERISTICS_EXTENSION;\r |
166 | \r | |
4135253b | 167 | ///\r |
af2dc6a7 | 168 | /// BIOS Information (Type 0).\r |
4135253b | 169 | ///\r |
61ce5861 | 170 | typedef struct {\r |
98cb9ae8 | 171 | SMBIOS_STRUCTURE Hdr;\r |
172 | SMBIOS_TABLE_STRING Vendor;\r | |
173 | SMBIOS_TABLE_STRING BiosVersion;\r | |
174 | UINT16 BiosSegment;\r | |
175 | SMBIOS_TABLE_STRING BiosReleaseDate;\r | |
176 | UINT8 BiosSize;\r | |
177 | MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r | |
178 | UINT8 BIOSCharacteristicsExtensionBytes[2];\r | |
179 | UINT8 SystemBiosMajorRelease;\r | |
180 | UINT8 SystemBiosMinorRelease;\r | |
181 | UINT8 EmbeddedControllerFirmwareMajorRelease;\r | |
182 | UINT8 EmbeddedControllerFirmwareMinorRelease;\r | |
61ce5861 | 183 | } SMBIOS_TABLE_TYPE0;\r |
184 | \r | |
98cb9ae8 | 185 | ///\r |
af2dc6a7 | 186 | /// System Wake-up Type.\r |
98cb9ae8 | 187 | ///\r |
188 | typedef enum { \r | |
189 | SystemWakeupTypeReserved = 0x00,\r | |
190 | SystemWakeupTypeOther = 0x01,\r | |
191 | SystemWakeupTypeUnknown = 0x02,\r | |
192 | SystemWakeupTypeApmTimer = 0x03,\r | |
193 | SystemWakeupTypeModemRing = 0x04,\r | |
194 | SystemWakeupTypeLanRemote = 0x05,\r | |
195 | SystemWakeupTypePowerSwitch = 0x06,\r | |
196 | SystemWakeupTypePciPme = 0x07,\r | |
197 | SystemWakeupTypeAcPowerRestored = 0x08\r | |
198 | } MISC_SYSTEM_WAKEUP_TYPE;\r | |
199 | \r | |
4135253b | 200 | ///\r |
af2dc6a7 | 201 | /// System Information (Type 1).\r |
98cb9ae8 | 202 | /// \r |
203 | /// The information in this structure defines attributes of the overall system and is \r | |
204 | /// intended to be associated with the Component ID group of the system's MIF.\r | |
205 | /// An SMBIOS implementation is associated with a single system instance and contains \r | |
206 | /// one and only one System Information (Type 1) structure.\r | |
4135253b | 207 | ///\r |
61ce5861 | 208 | typedef struct {\r |
98cb9ae8 | 209 | SMBIOS_STRUCTURE Hdr;\r |
210 | SMBIOS_TABLE_STRING Manufacturer;\r | |
211 | SMBIOS_TABLE_STRING ProductName;\r | |
212 | SMBIOS_TABLE_STRING Version;\r | |
213 | SMBIOS_TABLE_STRING SerialNumber;\r | |
214 | GUID Uuid;\r | |
af2dc6a7 | 215 | UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r |
98cb9ae8 | 216 | SMBIOS_TABLE_STRING SKUNumber;\r |
217 | SMBIOS_TABLE_STRING Family;\r | |
61ce5861 | 218 | } SMBIOS_TABLE_TYPE1;\r |
219 | \r | |
98cb9ae8 | 220 | ///\r |
af2dc6a7 | 221 | /// Base Board - Feature Flags. \r |
98cb9ae8 | 222 | ///\r |
223 | typedef struct {\r | |
224 | UINT8 Motherboard :1;\r | |
225 | UINT8 RequiresDaughterCard :1;\r | |
226 | UINT8 Removable :1;\r | |
227 | UINT8 Replaceable :1;\r | |
228 | UINT8 HotSwappable :1;\r | |
229 | UINT8 Reserved :3;\r | |
230 | } BASE_BOARD_FEATURE_FLAGS;\r | |
231 | \r | |
232 | ///\r | |
af2dc6a7 | 233 | /// Base Board - Board Type.\r |
98cb9ae8 | 234 | ///\r |
235 | typedef enum { \r | |
236 | BaseBoardTypeUnknown = 0x1,\r | |
237 | BaseBoardTypeOther = 0x2,\r | |
238 | BaseBoardTypeServerBlade = 0x3,\r | |
239 | BaseBoardTypeConnectivitySwitch = 0x4,\r | |
240 | BaseBoardTypeSystemManagementModule = 0x5,\r | |
241 | BaseBoardTypeProcessorModule = 0x6,\r | |
242 | BaseBoardTypeIOModule = 0x7,\r | |
243 | BaseBoardTypeMemoryModule = 0x8,\r | |
244 | BaseBoardTypeDaughterBoard = 0x9,\r | |
245 | BaseBoardTypeMotherBoard = 0xA,\r | |
246 | BaseBoardTypeProcessorMemoryModule = 0xB,\r | |
247 | BaseBoardTypeProcessorIOModule = 0xC,\r | |
248 | BaseBoardTypeInterconnectBoard = 0xD\r | |
249 | } BASE_BOARD_TYPE;\r | |
250 | \r | |
4135253b | 251 | ///\r |
af2dc6a7 | 252 | /// Base Board (or Module) Information (Type 2).\r |
4135253b | 253 | ///\r |
1f9f8414 | 254 | /// The information in this structure defines attributes of a system baseboard - \r |
98cb9ae8 | 255 | /// for example a motherboard, planar, or server blade or other standard system module.\r |
256 | ///\r | |
61ce5861 | 257 | typedef struct {\r |
98cb9ae8 | 258 | SMBIOS_STRUCTURE Hdr;\r |
259 | SMBIOS_TABLE_STRING Manufacturer;\r | |
260 | SMBIOS_TABLE_STRING ProductName;\r | |
261 | SMBIOS_TABLE_STRING Version;\r | |
262 | SMBIOS_TABLE_STRING SerialNumber;\r | |
263 | SMBIOS_TABLE_STRING AssetTag;\r | |
264 | BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r | |
265 | SMBIOS_TABLE_STRING LocationInChassis;\r | |
266 | UINT16 ChassisHandle;\r | |
af2dc6a7 | 267 | UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r |
98cb9ae8 | 268 | UINT8 NumberOfContainedObjectHandles;\r |
269 | UINT16 ContainedObjectHandles[1];\r | |
61ce5861 | 270 | } SMBIOS_TABLE_TYPE2;\r |
271 | \r | |
98cb9ae8 | 272 | ///\r |
273 | /// System Enclosure or Chassis Types\r | |
274 | ///\r | |
275 | typedef enum { \r | |
276 | MiscChassisTypeOther = 0x01,\r | |
277 | MiscChassisTypeUnknown = 0x02,\r | |
278 | MiscChassisTypeDeskTop = 0x03,\r | |
279 | MiscChassisTypeLowProfileDesktop = 0x04,\r | |
280 | MiscChassisTypePizzaBox = 0x05,\r | |
281 | MiscChassisTypeMiniTower = 0x06,\r | |
282 | MiscChassisTypeTower = 0x07,\r | |
283 | MiscChassisTypePortable = 0x08,\r | |
284 | MiscChassisTypeLapTop = 0x09,\r | |
285 | MiscChassisTypeNotebook = 0x0A,\r | |
286 | MiscChassisTypeHandHeld = 0x0B,\r | |
287 | MiscChassisTypeDockingStation = 0x0C,\r | |
288 | MiscChassisTypeAllInOne = 0x0D,\r | |
289 | MiscChassisTypeSubNotebook = 0x0E,\r | |
290 | MiscChassisTypeSpaceSaving = 0x0F,\r | |
291 | MiscChassisTypeLunchBox = 0x10,\r | |
292 | MiscChassisTypeMainServerChassis = 0x11,\r | |
293 | MiscChassisTypeExpansionChassis = 0x12,\r | |
294 | MiscChassisTypeSubChassis = 0x13,\r | |
295 | MiscChassisTypeBusExpansionChassis = 0x14,\r | |
296 | MiscChassisTypePeripheralChassis = 0x15,\r | |
297 | MiscChassisTypeRaidChassis = 0x16,\r | |
298 | MiscChassisTypeRackMountChassis = 0x17,\r | |
299 | MiscChassisTypeSealedCasePc = 0x18,\r | |
300 | MiscChassisMultiSystemChassis = 0x19,\r | |
301 | MiscChassisCompactPCI = 0x1A,\r | |
302 | MiscChassisAdvancedTCA = 0x1B,\r | |
303 | MiscChassisBlade = 0x1C,\r | |
304 | MiscChassisBladeEnclosure = 0x1D\r | |
305 | } MISC_CHASSIS_TYPE;\r | |
306 | \r | |
307 | ///\r | |
af2dc6a7 | 308 | /// System Enclosure or Chassis States .\r |
98cb9ae8 | 309 | ///\r |
310 | typedef enum { \r | |
311 | ChassisStateOther = 0x01,\r | |
312 | ChassisStateUnknown = 0x02,\r | |
313 | ChassisStateSafe = 0x03,\r | |
314 | ChassisStateWarning = 0x04,\r | |
315 | ChassisStateCritical = 0x05,\r | |
316 | ChassisStateNonRecoverable = 0x06\r | |
317 | } MISC_CHASSIS_STATE;\r | |
318 | \r | |
319 | ///\r | |
af2dc6a7 | 320 | /// System Enclosure or Chassis Security Status.\r |
98cb9ae8 | 321 | ///\r |
322 | typedef enum { \r | |
323 | ChassisSecurityStatusOther = 0x01,\r | |
324 | ChassisSecurityStatusUnknown = 0x02,\r | |
325 | ChassisSecurityStatusNone = 0x03,\r | |
326 | ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r | |
327 | ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r | |
328 | } MISC_CHASSIS_SECURITY_STATE;\r | |
329 | \r | |
bf7ea009 | 330 | ///\r |
331 | /// Contained Element record\r | |
332 | ///\r | |
61ce5861 | 333 | typedef struct {\r |
334 | UINT8 ContainedElementType;\r | |
335 | UINT8 ContainedElementMinimum;\r | |
336 | UINT8 ContainedElementMaximum;\r | |
337 | } CONTAINED_ELEMENT;\r | |
338 | \r | |
98cb9ae8 | 339 | \r |
4135253b | 340 | ///\r |
af2dc6a7 | 341 | /// System Enclosure or Chassis (Type 3).\r |
4135253b | 342 | ///\r |
98cb9ae8 | 343 | /// The information in this structure defines attributes of the system's mechanical enclosure(s). \r |
344 | /// For example, if a system included a separate enclosure for its peripheral devices, \r | |
345 | /// two structures would be returned: one for the main, system enclosure and the second for\r | |
346 | /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r | |
347 | /// support the population of the CIM_Chassis class. \r | |
348 | ///\r | |
61ce5861 | 349 | typedef struct {\r |
98cb9ae8 | 350 | SMBIOS_STRUCTURE Hdr;\r |
351 | SMBIOS_TABLE_STRING Manufacturer;\r | |
352 | UINT8 Type;\r | |
353 | SMBIOS_TABLE_STRING Version;\r | |
354 | SMBIOS_TABLE_STRING SerialNumber;\r | |
355 | SMBIOS_TABLE_STRING AssetTag;\r | |
af2dc6a7 | 356 | UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r |
357 | UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r | |
358 | UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r | |
359 | UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r | |
98cb9ae8 | 360 | UINT8 OemDefined[4];\r |
361 | UINT8 Height;\r | |
362 | UINT8 NumberofPowerCords;\r | |
363 | UINT8 ContainedElementCount;\r | |
364 | UINT8 ContainedElementRecordLength;\r | |
365 | CONTAINED_ELEMENT ContainedElements[1];\r | |
61ce5861 | 366 | } SMBIOS_TABLE_TYPE3;\r |
367 | \r | |
98cb9ae8 | 368 | ///\r |
af2dc6a7 | 369 | /// Processor Information - Processor Type.\r |
98cb9ae8 | 370 | ///\r |
371 | typedef enum {\r | |
372 | ProcessorOther = 0x01,\r | |
373 | ProcessorUnknown = 0x02,\r | |
374 | CentralProcessor = 0x03,\r | |
375 | MathProcessor = 0x04,\r | |
376 | DspProcessor = 0x05,\r | |
377 | VideoProcessor = 0x06\r | |
378 | } PROCESSOR_TYPE_DATA;\r | |
379 | \r | |
380 | ///\r | |
af2dc6a7 | 381 | /// Processor Information - Processor Family.\r |
98cb9ae8 | 382 | ///\r |
383 | typedef enum {\r | |
384 | ProcessorFamilyOther = 0x01, \r | |
385 | ProcessorFamilyUnknown = 0x02,\r | |
386 | ProcessorFamily8086 = 0x03, \r | |
387 | ProcessorFamily80286 = 0x04,\r | |
388 | ProcessorFamilyIntel386 = 0x05, \r | |
389 | ProcessorFamilyIntel486 = 0x06,\r | |
390 | ProcessorFamily8087 = 0x07,\r | |
391 | ProcessorFamily80287 = 0x08,\r | |
392 | ProcessorFamily80387 = 0x09, \r | |
393 | ProcessorFamily80487 = 0x0A,\r | |
394 | ProcessorFamilyPentium = 0x0B, \r | |
395 | ProcessorFamilyPentiumPro = 0x0C,\r | |
396 | ProcessorFamilyPentiumII = 0x0D,\r | |
397 | ProcessorFamilyPentiumMMX = 0x0E,\r | |
398 | ProcessorFamilyCeleron = 0x0F,\r | |
399 | ProcessorFamilyPentiumIIXeon = 0x10,\r | |
400 | ProcessorFamilyPentiumIII = 0x11, \r | |
401 | ProcessorFamilyM1 = 0x12,\r | |
402 | ProcessorFamilyM2 = 0x13,\r | |
119c1688 SZ |
403 | ProcessorFamilyIntelCeleronM = 0x14,\r |
404 | ProcessorFamilyIntelPentium4Ht = 0x15,\r | |
98cb9ae8 | 405 | ProcessorFamilyAmdDuron = 0x18,\r |
406 | ProcessorFamilyK5 = 0x19, \r | |
407 | ProcessorFamilyK6 = 0x1A,\r | |
408 | ProcessorFamilyK6_2 = 0x1B,\r | |
409 | ProcessorFamilyK6_3 = 0x1C,\r | |
410 | ProcessorFamilyAmdAthlon = 0x1D,\r | |
411 | ProcessorFamilyAmd29000 = 0x1E,\r | |
412 | ProcessorFamilyK6_2Plus = 0x1F,\r | |
413 | ProcessorFamilyPowerPC = 0x20,\r | |
414 | ProcessorFamilyPowerPC601 = 0x21,\r | |
415 | ProcessorFamilyPowerPC603 = 0x22,\r | |
416 | ProcessorFamilyPowerPC603Plus = 0x23,\r | |
417 | ProcessorFamilyPowerPC604 = 0x24,\r | |
418 | ProcessorFamilyPowerPC620 = 0x25,\r | |
419 | ProcessorFamilyPowerPCx704 = 0x26,\r | |
420 | ProcessorFamilyPowerPC750 = 0x27,\r | |
3507ab19 | 421 | ProcessorFamilyIntelCoreDuo = 0x28,\r |
422 | ProcessorFamilyIntelCoreDuoMobile = 0x29,\r | |
423 | ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r | |
424 | ProcessorFamilyIntelAtom = 0x2B,\r | |
4a228334 | 425 | ProcessorFamilyAlpha = 0x30,\r |
98cb9ae8 | 426 | ProcessorFamilyAlpha21064 = 0x31,\r |
427 | ProcessorFamilyAlpha21066 = 0x32,\r | |
428 | ProcessorFamilyAlpha21164 = 0x33,\r | |
429 | ProcessorFamilyAlpha21164PC = 0x34,\r | |
430 | ProcessorFamilyAlpha21164a = 0x35,\r | |
431 | ProcessorFamilyAlpha21264 = 0x36,\r | |
432 | ProcessorFamilyAlpha21364 = 0x37,\r | |
7ddba202 SZ |
433 | ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r |
434 | ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r | |
435 | ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r | |
436 | ProcessorFamilyAmdOpteron6100Series = 0x3B,\r | |
437 | ProcessorFamilyAmdOpteron4100Series = 0x3C,\r | |
438 | ProcessorFamilyAmdOpteron6200Series = 0x3D,\r | |
439 | ProcessorFamilyAmdOpteron4200Series = 0x3E,\r | |
4a228334 | 440 | ProcessorFamilyAmdFxSeries = 0x3F,\r |
98cb9ae8 | 441 | ProcessorFamilyMips = 0x40,\r |
442 | ProcessorFamilyMIPSR4000 = 0x41,\r | |
443 | ProcessorFamilyMIPSR4200 = 0x42,\r | |
444 | ProcessorFamilyMIPSR4400 = 0x43,\r | |
445 | ProcessorFamilyMIPSR4600 = 0x44,\r | |
446 | ProcessorFamilyMIPSR10000 = 0x45,\r | |
7ddba202 SZ |
447 | ProcessorFamilyAmdCSeries = 0x46,\r |
448 | ProcessorFamilyAmdESeries = 0x47,\r | |
4a228334 | 449 | ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r |
7ddba202 | 450 | ProcessorFamilyAmdGSeries = 0x49,\r |
4a228334 EL |
451 | ProcessorFamilyAmdZSeries = 0x4A,\r |
452 | ProcessorFamilyAmdRSeries = 0x4B,\r | |
453 | ProcessorFamilyAmdOpteron4300 = 0x4C,\r | |
454 | ProcessorFamilyAmdOpteron6300 = 0x4D,\r | |
455 | ProcessorFamilyAmdOpteron3300 = 0x4E,\r | |
456 | ProcessorFamilyAmdFireProSeries = 0x4F,\r | |
98cb9ae8 | 457 | ProcessorFamilySparc = 0x50,\r |
458 | ProcessorFamilySuperSparc = 0x51,\r | |
459 | ProcessorFamilymicroSparcII = 0x52,\r | |
460 | ProcessorFamilymicroSparcIIep = 0x53,\r | |
461 | ProcessorFamilyUltraSparc = 0x54,\r | |
462 | ProcessorFamilyUltraSparcII = 0x55,\r | |
4a228334 | 463 | ProcessorFamilyUltraSparcIii = 0x56,\r |
98cb9ae8 | 464 | ProcessorFamilyUltraSparcIII = 0x57,\r |
465 | ProcessorFamilyUltraSparcIIIi = 0x58,\r | |
466 | ProcessorFamily68040 = 0x60,\r | |
467 | ProcessorFamily68xxx = 0x61,\r | |
468 | ProcessorFamily68000 = 0x62,\r | |
469 | ProcessorFamily68010 = 0x63,\r | |
470 | ProcessorFamily68020 = 0x64,\r | |
471 | ProcessorFamily68030 = 0x65,\r | |
472 | ProcessorFamilyHobbit = 0x70,\r | |
473 | ProcessorFamilyCrusoeTM5000 = 0x78,\r | |
474 | ProcessorFamilyCrusoeTM3000 = 0x79,\r | |
475 | ProcessorFamilyEfficeonTM8000 = 0x7A,\r | |
476 | ProcessorFamilyWeitek = 0x80,\r | |
477 | ProcessorFamilyItanium = 0x82,\r | |
478 | ProcessorFamilyAmdAthlon64 = 0x83,\r | |
479 | ProcessorFamilyAmdOpteron = 0x84,\r | |
480 | ProcessorFamilyAmdSempron = 0x85,\r | |
481 | ProcessorFamilyAmdTurion64Mobile = 0x86,\r | |
482 | ProcessorFamilyDualCoreAmdOpteron = 0x87,\r | |
483 | ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r | |
484 | ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r | |
3507ab19 | 485 | ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r |
486 | ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r | |
487 | ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r | |
488 | ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r | |
489 | ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r | |
490 | ProcessorFamilyAmdAthlonX2DualCore = 0x8F, \r | |
98cb9ae8 | 491 | ProcessorFamilyPARISC = 0x90,\r |
492 | ProcessorFamilyPaRisc8500 = 0x91,\r | |
493 | ProcessorFamilyPaRisc8000 = 0x92,\r | |
494 | ProcessorFamilyPaRisc7300LC = 0x93,\r | |
495 | ProcessorFamilyPaRisc7200 = 0x94,\r | |
496 | ProcessorFamilyPaRisc7100LC = 0x95,\r | |
497 | ProcessorFamilyPaRisc7100 = 0x96,\r | |
498 | ProcessorFamilyV30 = 0xA0,\r | |
3507ab19 | 499 | ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r |
500 | ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r | |
501 | ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r | |
502 | ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r | |
503 | ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r | |
504 | ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r | |
505 | ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r | |
506 | ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r | |
507 | ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r | |
508 | ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r | |
509 | ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r | |
510 | ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r | |
511 | ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r | |
512 | ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r | |
513 | ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r | |
98cb9ae8 | 514 | ProcessorFamilyPentiumIIIXeon = 0xB0,\r |
515 | ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r | |
516 | ProcessorFamilyPentium4 = 0xB2,\r | |
517 | ProcessorFamilyIntelXeon = 0xB3,\r | |
518 | ProcessorFamilyAS400 = 0xB4,\r | |
519 | ProcessorFamilyIntelXeonMP = 0xB5,\r | |
520 | ProcessorFamilyAMDAthlonXP = 0xB6,\r | |
521 | ProcessorFamilyAMDAthlonMP = 0xB7,\r | |
522 | ProcessorFamilyIntelItanium2 = 0xB8,\r | |
523 | ProcessorFamilyIntelPentiumM = 0xB9,\r | |
524 | ProcessorFamilyIntelCeleronD = 0xBA,\r | |
525 | ProcessorFamilyIntelPentiumD = 0xBB,\r | |
526 | ProcessorFamilyIntelPentiumEx = 0xBC,\r | |
4a228334 | 527 | ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r |
98cb9ae8 | 528 | ProcessorFamilyReserved = 0xBE,\r |
529 | ProcessorFamilyIntelCore2 = 0xBF,\r | |
3507ab19 | 530 | ProcessorFamilyIntelCore2Solo = 0xC0,\r |
531 | ProcessorFamilyIntelCore2Extreme = 0xC1,\r | |
532 | ProcessorFamilyIntelCore2Quad = 0xC2,\r | |
533 | ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r | |
534 | ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r | |
535 | ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r | |
536 | ProcessorFamilyIntelCoreI7 = 0xC6,\r | |
537 | ProcessorFamilyDualCoreIntelCeleron = 0xC7, \r | |
98cb9ae8 | 538 | ProcessorFamilyIBM390 = 0xC8,\r |
539 | ProcessorFamilyG4 = 0xC9,\r | |
540 | ProcessorFamilyG5 = 0xCA,\r | |
541 | ProcessorFamilyG6 = 0xCB,\r | |
4a228334 | 542 | ProcessorFamilyzArchitecture = 0xCC,\r |
7ddba202 SZ |
543 | ProcessorFamilyIntelCoreI5 = 0xCD,\r |
544 | ProcessorFamilyIntelCoreI3 = 0xCE,\r | |
98cb9ae8 | 545 | ProcessorFamilyViaC7M = 0xD2,\r |
546 | ProcessorFamilyViaC7D = 0xD3,\r | |
547 | ProcessorFamilyViaC7 = 0xD4,\r | |
548 | ProcessorFamilyViaEden = 0xD5,\r | |
3507ab19 | 549 | ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r |
550 | ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r | |
551 | ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r | |
7ddba202 | 552 | ProcessorFamilyViaNano = 0xD9,\r |
3507ab19 | 553 | ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r |
554 | ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r | |
555 | ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r | |
556 | ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r | |
557 | ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r | |
7ddba202 | 558 | ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r |
4a228334 EL |
559 | ProcessorFamilyAmdOpteron3000Series = 0xE4,\r |
560 | ProcessorFamilyAmdSempronII = 0xE5,\r | |
3507ab19 | 561 | ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r |
562 | ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r | |
563 | ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r | |
564 | ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r | |
565 | ProcessorFamilyAmdAthlonDualCore = 0xEA,\r | |
566 | ProcessorFamilyAmdSempronSI = 0xEB,\r | |
7ddba202 SZ |
567 | ProcessorFamilyAmdPhenomII = 0xEC,\r |
568 | ProcessorFamilyAmdAthlonII = 0xED,\r | |
569 | ProcessorFamilySixCoreAmdOpteron = 0xEE,\r | |
570 | ProcessorFamilyAmdSempronM = 0xEF,\r | |
98cb9ae8 | 571 | ProcessorFamilyi860 = 0xFA,\r |
572 | ProcessorFamilyi960 = 0xFB,\r | |
573 | ProcessorFamilyIndicatorFamily2 = 0xFE,\r | |
574 | ProcessorFamilyReserved1 = 0xFF\r | |
575 | } PROCESSOR_FAMILY_DATA;\r | |
576 | \r | |
f9ed6c93 YL |
577 | ///\r |
578 | /// Processor Information2 - Processor Family2.\r | |
579 | ///\r | |
580 | typedef enum {\r | |
581 | ProcessorFamilySH3 = 0x0104,\r | |
582 | ProcessorFamilySH4 = 0x0105,\r | |
583 | ProcessorFamilyARM = 0x0118,\r | |
584 | ProcessorFamilyStrongARM = 0x0119,\r | |
585 | ProcessorFamily6x86 = 0x012C,\r | |
586 | ProcessorFamilyMediaGX = 0x012D,\r | |
587 | ProcessorFamilyMII = 0x012E,\r | |
588 | ProcessorFamilyWinChip = 0x0140,\r | |
589 | ProcessorFamilyDSP = 0x015E,\r | |
590 | ProcessorFamilyVideoProcessor = 0x01F4\r | |
591 | } PROCESSOR_FAMILY2_DATA;\r | |
592 | \r | |
98cb9ae8 | 593 | ///\r |
af2dc6a7 | 594 | /// Processor Information - Voltage. \r |
98cb9ae8 | 595 | ///\r |
596 | typedef struct {\r | |
6800ac83 | 597 | UINT8 ProcessorVoltageCapability5V :1; \r |
598 | UINT8 ProcessorVoltageCapability3_3V :1; \r | |
599 | UINT8 ProcessorVoltageCapability2_9V :1; \r | |
600 | UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r | |
601 | UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r | |
602 | UINT8 ProcessorVoltageIndicateLegacy :1;\r | |
98cb9ae8 | 603 | } PROCESSOR_VOLTAGE;\r |
604 | \r | |
605 | ///\r | |
af2dc6a7 | 606 | /// Processor Information - Processor Upgrade.\r |
98cb9ae8 | 607 | ///\r |
608 | typedef enum {\r | |
609 | ProcessorUpgradeOther = 0x01,\r | |
610 | ProcessorUpgradeUnknown = 0x02,\r | |
611 | ProcessorUpgradeDaughterBoard = 0x03,\r | |
612 | ProcessorUpgradeZIFSocket = 0x04,\r | |
af2dc6a7 | 613 | ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r |
98cb9ae8 | 614 | ProcessorUpgradeNone = 0x06,\r |
615 | ProcessorUpgradeLIFSocket = 0x07,\r | |
616 | ProcessorUpgradeSlot1 = 0x08,\r | |
617 | ProcessorUpgradeSlot2 = 0x09,\r | |
618 | ProcessorUpgrade370PinSocket = 0x0A,\r | |
619 | ProcessorUpgradeSlotA = 0x0B,\r | |
620 | ProcessorUpgradeSlotM = 0x0C,\r | |
621 | ProcessorUpgradeSocket423 = 0x0D,\r | |
af2dc6a7 | 622 | ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r |
98cb9ae8 | 623 | ProcessorUpgradeSocket478 = 0x0F,\r |
624 | ProcessorUpgradeSocket754 = 0x10,\r | |
625 | ProcessorUpgradeSocket940 = 0x11,\r | |
626 | ProcessorUpgradeSocket939 = 0x12,\r | |
627 | ProcessorUpgradeSocketmPGA604 = 0x13,\r | |
628 | ProcessorUpgradeSocketLGA771 = 0x14,\r | |
629 | ProcessorUpgradeSocketLGA775 = 0x15,\r | |
630 | ProcessorUpgradeSocketS1 = 0x16,\r | |
631 | ProcessorUpgradeAM2 = 0x17,\r | |
3507ab19 | 632 | ProcessorUpgradeF1207 = 0x18,\r |
7ddba202 SZ |
633 | ProcessorSocketLGA1366 = 0x19,\r |
634 | ProcessorUpgradeSocketG34 = 0x1A,\r | |
635 | ProcessorUpgradeSocketAM3 = 0x1B,\r | |
636 | ProcessorUpgradeSocketC32 = 0x1C,\r | |
637 | ProcessorUpgradeSocketLGA1156 = 0x1D,\r | |
638 | ProcessorUpgradeSocketLGA1567 = 0x1E,\r | |
639 | ProcessorUpgradeSocketPGA988A = 0x1F,\r | |
640 | ProcessorUpgradeSocketBGA1288 = 0x20,\r | |
641 | ProcessorUpgradeSocketrPGA988B = 0x21,\r | |
642 | ProcessorUpgradeSocketBGA1023 = 0x22,\r | |
643 | ProcessorUpgradeSocketBGA1224 = 0x23,\r | |
4a228334 | 644 | ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r |
7ddba202 SZ |
645 | ProcessorUpgradeSocketLGA1356 = 0x25,\r |
646 | ProcessorUpgradeSocketLGA2011 = 0x26,\r | |
647 | ProcessorUpgradeSocketFS1 = 0x27,\r | |
648 | ProcessorUpgradeSocketFS2 = 0x28,\r | |
649 | ProcessorUpgradeSocketFM1 = 0x29,\r | |
4a228334 EL |
650 | ProcessorUpgradeSocketFM2 = 0x2A,\r |
651 | ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r | |
652 | ProcessorUpgradeSocketLGA1356_3 = 0x2C\r | |
98cb9ae8 | 653 | } PROCESSOR_UPGRADE;\r |
654 | \r | |
655 | ///\r | |
656 | /// Processor ID Field Description\r | |
657 | ///\r | |
658 | typedef struct {\r | |
659 | UINT32 ProcessorSteppingId:4;\r | |
660 | UINT32 ProcessorModel: 4;\r | |
661 | UINT32 ProcessorFamily: 4;\r | |
662 | UINT32 ProcessorType: 2;\r | |
663 | UINT32 ProcessorReserved1: 2;\r | |
664 | UINT32 ProcessorXModel: 4;\r | |
665 | UINT32 ProcessorXFamily: 8;\r | |
666 | UINT32 ProcessorReserved2: 4;\r | |
667 | } PROCESSOR_SIGNATURE;\r | |
668 | \r | |
98cb9ae8 | 669 | typedef struct {\r |
670 | UINT32 ProcessorFpu :1;\r | |
671 | UINT32 ProcessorVme :1;\r | |
672 | UINT32 ProcessorDe :1;\r | |
673 | UINT32 ProcessorPse :1;\r | |
674 | UINT32 ProcessorTsc :1;\r | |
675 | UINT32 ProcessorMsr :1;\r | |
676 | UINT32 ProcessorPae :1;\r | |
677 | UINT32 ProcessorMce :1;\r | |
678 | UINT32 ProcessorCx8 :1;\r | |
679 | UINT32 ProcessorApic :1;\r | |
680 | UINT32 ProcessorReserved1 :1;\r | |
681 | UINT32 ProcessorSep :1;\r | |
682 | UINT32 ProcessorMtrr :1;\r | |
683 | UINT32 ProcessorPge :1;\r | |
684 | UINT32 ProcessorMca :1;\r | |
685 | UINT32 ProcessorCmov :1;\r | |
686 | UINT32 ProcessorPat :1;\r | |
687 | UINT32 ProcessorPse36 :1;\r | |
688 | UINT32 ProcessorPsn :1;\r | |
689 | UINT32 ProcessorClfsh :1;\r | |
690 | UINT32 ProcessorReserved2 :1;\r | |
691 | UINT32 ProcessorDs :1;\r | |
692 | UINT32 ProcessorAcpi :1;\r | |
693 | UINT32 ProcessorMmx :1;\r | |
694 | UINT32 ProcessorFxsr :1;\r | |
695 | UINT32 ProcessorSse :1;\r | |
696 | UINT32 ProcessorSse2 :1;\r | |
697 | UINT32 ProcessorSs :1;\r | |
698 | UINT32 ProcessorReserved3 :1;\r | |
699 | UINT32 ProcessorTm :1;\r | |
700 | UINT32 ProcessorReserved4 :2;\r | |
701 | } PROCESSOR_FEATURE_FLAGS;\r | |
702 | \r | |
703 | typedef struct {\r | |
704 | PROCESSOR_SIGNATURE Signature;\r | |
98cb9ae8 | 705 | PROCESSOR_FEATURE_FLAGS FeatureFlags;\r |
6800ac83 | 706 | } PROCESSOR_ID_DATA;\r |
98cb9ae8 | 707 | \r |
4135253b | 708 | ///\r |
af2dc6a7 | 709 | /// Processor Information (Type 4).\r |
4135253b | 710 | ///\r |
98cb9ae8 | 711 | /// The information in this structure defines the attributes of a single processor; \r |
712 | /// a separate structure instance is provided for each system processor socket/slot. \r | |
713 | /// For example, a system with an IntelDX2 processor would have a single \r | |
af2dc6a7 | 714 | /// structure instance, while a system with an IntelSX2 processor would have a structure\r |
715 | /// to describe the main CPU, and a second structure to describe the 80487 co-processor. \r | |
98cb9ae8 | 716 | ///\r |
61ce5861 | 717 | typedef struct { \r |
718 | SMBIOS_STRUCTURE Hdr;\r | |
2d5e30ef | 719 | SMBIOS_TABLE_STRING Socket;\r |
af2dc6a7 | 720 | UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r |
721 | UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r | |
61ce5861 | 722 | SMBIOS_TABLE_STRING ProcessorManufacture;\r |
98cb9ae8 | 723 | PROCESSOR_ID_DATA ProcessorId;\r |
61ce5861 | 724 | SMBIOS_TABLE_STRING ProcessorVersion;\r |
98cb9ae8 | 725 | PROCESSOR_VOLTAGE Voltage;\r |
61ce5861 | 726 | UINT16 ExternalClock;\r |
727 | UINT16 MaxSpeed;\r | |
728 | UINT16 CurrentSpeed;\r | |
729 | UINT8 Status;\r | |
af2dc6a7 | 730 | UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r |
61ce5861 | 731 | UINT16 L1CacheHandle;\r |
732 | UINT16 L2CacheHandle;\r | |
733 | UINT16 L3CacheHandle;\r | |
734 | SMBIOS_TABLE_STRING SerialNumber;\r | |
735 | SMBIOS_TABLE_STRING AssetTag;\r | |
736 | SMBIOS_TABLE_STRING PartNumber;\r | |
737 | //\r | |
738 | // Add for smbios 2.5\r | |
739 | //\r | |
740 | UINT8 CoreCount;\r | |
741 | UINT8 EnabledCoreCount;\r | |
742 | UINT8 ThreadCount;\r | |
743 | UINT16 ProcessorCharacteristics;\r | |
744 | //\r | |
745 | // Add for smbios 2.6\r | |
746 | //\r | |
747 | UINT16 ProcessorFamily2;\r | |
748 | } SMBIOS_TABLE_TYPE4;\r | |
749 | \r | |
98cb9ae8 | 750 | ///\r |
af2dc6a7 | 751 | /// Memory Controller Error Detecting Method.\r |
98cb9ae8 | 752 | ///\r |
753 | typedef enum { \r | |
754 | ErrorDetectingMethodOther = 0x01,\r | |
755 | ErrorDetectingMethodUnknown = 0x02,\r | |
756 | ErrorDetectingMethodNone = 0x03,\r | |
757 | ErrorDetectingMethodParity = 0x04,\r | |
758 | ErrorDetectingMethod32Ecc = 0x05,\r | |
759 | ErrorDetectingMethod64Ecc = 0x06,\r | |
760 | ErrorDetectingMethod128Ecc = 0x07,\r | |
761 | ErrorDetectingMethodCrc = 0x08\r | |
762 | } MEMORY_ERROR_DETECT_METHOD;\r | |
763 | \r | |
764 | ///\r | |
af2dc6a7 | 765 | /// Memory Controller Error Correcting Capability.\r |
98cb9ae8 | 766 | ///\r |
767 | typedef struct {\r | |
768 | UINT8 Other :1;\r | |
769 | UINT8 Unknown :1;\r | |
770 | UINT8 None :1;\r | |
771 | UINT8 SingleBitErrorCorrect :1;\r | |
772 | UINT8 DoubleBitErrorCorrect :1;\r | |
773 | UINT8 ErrorScrubbing :1;\r | |
774 | UINT8 Reserved :2;\r | |
775 | } MEMORY_ERROR_CORRECT_CAPABILITY;\r | |
776 | \r | |
777 | ///\r | |
af2dc6a7 | 778 | /// Memory Controller Information - Interleave Support.\r |
98cb9ae8 | 779 | ///\r |
780 | typedef enum { \r | |
781 | MemoryInterleaveOther = 0x01,\r | |
782 | MemoryInterleaveUnknown = 0x02,\r | |
783 | MemoryInterleaveOneWay = 0x03,\r | |
784 | MemoryInterleaveTwoWay = 0x04,\r | |
785 | MemoryInterleaveFourWay = 0x05,\r | |
786 | MemoryInterleaveEightWay = 0x06,\r | |
787 | MemoryInterleaveSixteenWay = 0x07\r | |
788 | } MEMORY_SUPPORT_INTERLEAVE_TYPE;\r | |
789 | \r | |
790 | ///\r | |
af2dc6a7 | 791 | /// Memory Controller Information - Memory Speeds.\r |
98cb9ae8 | 792 | ///\r |
793 | typedef struct {\r | |
794 | UINT16 Other :1;\r | |
795 | UINT16 Unknown :1;\r | |
796 | UINT16 SeventyNs:1;\r | |
797 | UINT16 SixtyNs :1;\r | |
798 | UINT16 FiftyNs :1;\r | |
799 | UINT16 Reserved :11;\r | |
800 | } MEMORY_SPEED_TYPE;\r | |
801 | \r | |
4135253b | 802 | ///\r |
af2dc6a7 | 803 | /// Memory Controller Information (Type 5, Obsolete).\r |
4135253b | 804 | ///\r |
98cb9ae8 | 805 | /// The information in this structure defines the attributes of the system's memory controller(s) \r |
806 | /// and the supported attributes of any memory-modules present in the sockets controlled by \r | |
807 | /// this controller. \r | |
808 | /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r | |
af2dc6a7 | 809 | /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r |
98cb9ae8 | 810 | /// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r |
811 | /// choose to implement both memory description types to allow existing DMI browsers\r | |
812 | /// to properly display the system's memory attributes.\r | |
813 | ///\r | |
61ce5861 | 814 | typedef struct {\r |
98cb9ae8 | 815 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 816 | UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r |
98cb9ae8 | 817 | MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r |
af2dc6a7 | 818 | UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r |
819 | UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE . \r | |
98cb9ae8 | 820 | UINT8 MaxMemoryModuleSize;\r |
821 | MEMORY_SPEED_TYPE SupportSpeed;\r | |
822 | UINT16 SupportMemoryType;\r | |
823 | UINT8 MemoryModuleVoltage;\r | |
824 | UINT8 AssociatedMemorySlotNum;\r | |
825 | UINT16 MemoryModuleConfigHandles[1];\r | |
61ce5861 | 826 | } SMBIOS_TABLE_TYPE5;\r |
827 | \r | |
98cb9ae8 | 828 | ///\r |
829 | /// Memory Module Information - Memory Types\r | |
830 | ///\r | |
831 | typedef struct {\r | |
832 | UINT16 Other :1;\r | |
833 | UINT16 Unknown :1;\r | |
834 | UINT16 Standard :1;\r | |
835 | UINT16 FastPageMode:1;\r | |
b4ab47ec | 836 | UINT16 Edo :1;\r |
98cb9ae8 | 837 | UINT16 Parity :1;\r |
b4ab47ec | 838 | UINT16 Ecc :1;\r |
839 | UINT16 Simm :1;\r | |
840 | UINT16 Dimm :1;\r | |
98cb9ae8 | 841 | UINT16 BurstEdo :1;\r |
b4ab47ec | 842 | UINT16 Sdram :1;\r |
98cb9ae8 | 843 | UINT16 Reserved :5;\r |
844 | } MEMORY_CURRENT_TYPE;\r | |
845 | \r | |
846 | ///\r | |
af2dc6a7 | 847 | /// Memory Module Information - Memory Size.\r |
98cb9ae8 | 848 | ///\r |
849 | typedef struct {\r | |
6800ac83 | 850 | UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r |
98cb9ae8 | 851 | UINT8 SingleOrDoubleBank :1;\r |
852 | } MEMORY_INSTALLED_ENABLED_SIZE;\r | |
853 | \r | |
4135253b | 854 | ///\r |
855 | /// Memory Module Information (Type 6, Obsolete)\r | |
856 | ///\r | |
98cb9ae8 | 857 | /// One Memory Module Information structure is included for each memory-module socket \r |
858 | /// in the system. The structure describes the speed, type, size, and error status\r | |
859 | /// of each system memory module. The supported attributes of each module are described \r | |
860 | /// by the "owning" Memory Controller Information structure. \r | |
861 | /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r | |
af2dc6a7 | 862 | /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r |
98cb9ae8 | 863 | /// and Memory Device (Type 17) structures should be used instead.\r |
864 | ///\r | |
61ce5861 | 865 | typedef struct {\r |
98cb9ae8 | 866 | SMBIOS_STRUCTURE Hdr;\r |
867 | SMBIOS_TABLE_STRING SocketDesignation;\r | |
868 | UINT8 BankConnections;\r | |
869 | UINT8 CurrentSpeed;\r | |
870 | MEMORY_CURRENT_TYPE CurrentMemoryType;\r | |
871 | MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r | |
872 | MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r | |
873 | UINT8 ErrorStatus;\r | |
61ce5861 | 874 | } SMBIOS_TABLE_TYPE6;\r |
875 | \r | |
98cb9ae8 | 876 | ///\r |
af2dc6a7 | 877 | /// Cache Information - SRAM Type.\r |
98cb9ae8 | 878 | ///\r |
879 | typedef struct {\r | |
880 | UINT16 Other :1;\r | |
881 | UINT16 Unknown :1;\r | |
882 | UINT16 NonBurst :1;\r | |
883 | UINT16 Burst :1;\r | |
884 | UINT16 PipelineBurst :1;\r | |
98cb9ae8 | 885 | UINT16 Synchronous :1;\r |
53d90f04 | 886 | UINT16 Asynchronous :1;\r |
98cb9ae8 | 887 | UINT16 Reserved :9;\r |
888 | } CACHE_SRAM_TYPE_DATA;\r | |
889 | \r | |
890 | ///\r | |
af2dc6a7 | 891 | /// Cache Information - Error Correction Type.\r |
98cb9ae8 | 892 | ///\r |
893 | typedef enum {\r | |
894 | CacheErrorOther = 0x01,\r | |
895 | CacheErrorUnknown = 0x02,\r | |
896 | CacheErrorNone = 0x03,\r | |
897 | CacheErrorParity = 0x04,\r | |
6800ac83 | 898 | CacheErrorSingleBit = 0x05, ///< ECC\r |
899 | CacheErrorMultiBit = 0x06 ///< ECC\r | |
98cb9ae8 | 900 | } CACHE_ERROR_TYPE_DATA;\r |
901 | \r | |
902 | ///\r | |
af2dc6a7 | 903 | /// Cache Information - System Cache Type. \r |
98cb9ae8 | 904 | ///\r |
905 | typedef enum {\r | |
906 | CacheTypeOther = 0x01,\r | |
907 | CacheTypeUnknown = 0x02,\r | |
908 | CacheTypeInstruction = 0x03,\r | |
909 | CacheTypeData = 0x04,\r | |
910 | CacheTypeUnified = 0x05\r | |
911 | } CACHE_TYPE_DATA;\r | |
912 | \r | |
913 | ///\r | |
af2dc6a7 | 914 | /// Cache Information - Associativity. \r |
98cb9ae8 | 915 | ///\r |
916 | typedef enum {\r | |
917 | CacheAssociativityOther = 0x01,\r | |
918 | CacheAssociativityUnknown = 0x02,\r | |
919 | CacheAssociativityDirectMapped = 0x03,\r | |
920 | CacheAssociativity2Way = 0x04,\r | |
921 | CacheAssociativity4Way = 0x05,\r | |
922 | CacheAssociativityFully = 0x06,\r | |
923 | CacheAssociativity8Way = 0x07,\r | |
924 | CacheAssociativity16Way = 0x08,\r | |
3507ab19 | 925 | CacheAssociativity12Way = 0x09,\r |
926 | CacheAssociativity24Way = 0x0A,\r | |
927 | CacheAssociativity32Way = 0x0B,\r | |
928 | CacheAssociativity48Way = 0x0C,\r | |
7ddba202 SZ |
929 | CacheAssociativity64Way = 0x0D,\r |
930 | CacheAssociativity20Way = 0x0E\r | |
98cb9ae8 | 931 | } CACHE_ASSOCIATIVITY_DATA;\r |
932 | \r | |
4135253b | 933 | ///\r |
af2dc6a7 | 934 | /// Cache Information (Type 7).\r |
4135253b | 935 | ///\r |
af2dc6a7 | 936 | /// The information in this structure defines the attributes of CPU cache device in the system. \r |
98cb9ae8 | 937 | /// One structure is specified for each such device, whether the device is internal to\r |
938 | /// or external to the CPU module. Cache modules can be associated with a processor structure\r | |
af2dc6a7 | 939 | /// in one or two ways, depending on the SMBIOS version.\r |
98cb9ae8 | 940 | ///\r |
61ce5861 | 941 | typedef struct {\r |
98cb9ae8 | 942 | SMBIOS_STRUCTURE Hdr;\r |
943 | SMBIOS_TABLE_STRING SocketDesignation;\r | |
944 | UINT16 CacheConfiguration;\r | |
945 | UINT16 MaximumCacheSize;\r | |
946 | UINT16 InstalledSize;\r | |
947 | CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r | |
948 | CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r | |
949 | UINT8 CacheSpeed;\r | |
af2dc6a7 | 950 | UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r |
951 | UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r | |
952 | UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r | |
61ce5861 | 953 | } SMBIOS_TABLE_TYPE7;\r |
954 | \r | |
98cb9ae8 | 955 | ///\r |
af2dc6a7 | 956 | /// Port Connector Information - Connector Types. \r |
98cb9ae8 | 957 | ///\r |
958 | typedef enum {\r | |
959 | PortConnectorTypeNone = 0x00,\r | |
960 | PortConnectorTypeCentronics = 0x01,\r | |
961 | PortConnectorTypeMiniCentronics = 0x02,\r | |
962 | PortConnectorTypeProprietary = 0x03,\r | |
963 | PortConnectorTypeDB25Male = 0x04,\r | |
964 | PortConnectorTypeDB25Female = 0x05,\r | |
965 | PortConnectorTypeDB15Male = 0x06,\r | |
966 | PortConnectorTypeDB15Female = 0x07,\r | |
967 | PortConnectorTypeDB9Male = 0x08,\r | |
968 | PortConnectorTypeDB9Female = 0x09,\r | |
969 | PortConnectorTypeRJ11 = 0x0A,\r | |
970 | PortConnectorTypeRJ45 = 0x0B,\r | |
971 | PortConnectorType50PinMiniScsi = 0x0C,\r | |
972 | PortConnectorTypeMiniDin = 0x0D,\r | |
119c1688 | 973 | PortConnectorTypeMicroDin = 0x0E,\r |
98cb9ae8 | 974 | PortConnectorTypePS2 = 0x0F,\r |
975 | PortConnectorTypeInfrared = 0x10,\r | |
976 | PortConnectorTypeHpHil = 0x11,\r | |
977 | PortConnectorTypeUsb = 0x12,\r | |
978 | PortConnectorTypeSsaScsi = 0x13,\r | |
979 | PortConnectorTypeCircularDin8Male = 0x14,\r | |
980 | PortConnectorTypeCircularDin8Female = 0x15,\r | |
981 | PortConnectorTypeOnboardIde = 0x16,\r | |
982 | PortConnectorTypeOnboardFloppy = 0x17,\r | |
983 | PortConnectorType9PinDualInline = 0x18,\r | |
984 | PortConnectorType25PinDualInline = 0x19,\r | |
985 | PortConnectorType50PinDualInline = 0x1A,\r | |
986 | PortConnectorType68PinDualInline = 0x1B,\r | |
987 | PortConnectorTypeOnboardSoundInput = 0x1C,\r | |
988 | PortConnectorTypeMiniCentronicsType14 = 0x1D,\r | |
989 | PortConnectorTypeMiniCentronicsType26 = 0x1E,\r | |
990 | PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r | |
991 | PortConnectorTypeBNC = 0x20,\r | |
992 | PortConnectorType1394 = 0x21,\r | |
119c1688 | 993 | PortConnectorTypeSasSata = 0x22,\r |
98cb9ae8 | 994 | PortConnectorTypePC98 = 0xA0,\r |
995 | PortConnectorTypePC98Hireso = 0xA1,\r | |
996 | PortConnectorTypePCH98 = 0xA2,\r | |
997 | PortConnectorTypePC98Note = 0xA3,\r | |
998 | PortConnectorTypePC98Full = 0xA4,\r | |
999 | PortConnectorTypeOther = 0xFF\r | |
1000 | } MISC_PORT_CONNECTOR_TYPE;\r | |
1001 | \r | |
1002 | ///\r | |
1003 | /// Port Connector Information - Port Types \r | |
1004 | ///\r | |
1005 | typedef enum {\r | |
1006 | PortTypeNone = 0x00,\r | |
1007 | PortTypeParallelXtAtCompatible = 0x01,\r | |
1008 | PortTypeParallelPortPs2 = 0x02,\r | |
1009 | PortTypeParallelPortEcp = 0x03,\r | |
1010 | PortTypeParallelPortEpp = 0x04,\r | |
1011 | PortTypeParallelPortEcpEpp = 0x05,\r | |
1012 | PortTypeSerialXtAtCompatible = 0x06,\r | |
1013 | PortTypeSerial16450Compatible = 0x07,\r | |
1014 | PortTypeSerial16550Compatible = 0x08,\r | |
1015 | PortTypeSerial16550ACompatible = 0x09,\r | |
1016 | PortTypeScsi = 0x0A,\r | |
1017 | PortTypeMidi = 0x0B,\r | |
1018 | PortTypeJoyStick = 0x0C,\r | |
1019 | PortTypeKeyboard = 0x0D,\r | |
1020 | PortTypeMouse = 0x0E,\r | |
1021 | PortTypeSsaScsi = 0x0F,\r | |
1022 | PortTypeUsb = 0x10,\r | |
1023 | PortTypeFireWire = 0x11,\r | |
1024 | PortTypePcmciaTypeI = 0x12,\r | |
1025 | PortTypePcmciaTypeII = 0x13,\r | |
1026 | PortTypePcmciaTypeIII = 0x14,\r | |
1027 | PortTypeCardBus = 0x15,\r | |
1028 | PortTypeAccessBusPort = 0x16,\r | |
1029 | PortTypeScsiII = 0x17,\r | |
1030 | PortTypeScsiWide = 0x18,\r | |
1031 | PortTypePC98 = 0x19,\r | |
1032 | PortTypePC98Hireso = 0x1A,\r | |
1033 | PortTypePCH98 = 0x1B,\r | |
1034 | PortTypeVideoPort = 0x1C,\r | |
1035 | PortTypeAudioPort = 0x1D,\r | |
1036 | PortTypeModemPort = 0x1E,\r | |
1037 | PortTypeNetworkPort = 0x1F,\r | |
1038 | PortType8251Compatible = 0xA0,\r | |
1039 | PortType8251FifoCompatible = 0xA1,\r | |
1040 | PortTypeOther = 0xFF\r | |
1041 | } MISC_PORT_TYPE;\r | |
1042 | \r | |
4135253b | 1043 | ///\r |
af2dc6a7 | 1044 | /// Port Connector Information (Type 8).\r |
4135253b | 1045 | ///\r |
98cb9ae8 | 1046 | /// The information in this structure defines the attributes of a system port connector, \r |
1f9f8414 | 1047 | /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r |
98cb9ae8 | 1048 | /// are provided. One structure is present for each port provided by the system.\r |
1049 | ///\r | |
61ce5861 | 1050 | typedef struct {\r |
98cb9ae8 | 1051 | SMBIOS_STRUCTURE Hdr;\r |
1052 | SMBIOS_TABLE_STRING InternalReferenceDesignator;\r | |
af2dc6a7 | 1053 | UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r |
98cb9ae8 | 1054 | SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r |
af2dc6a7 | 1055 | UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r |
1056 | UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r | |
61ce5861 | 1057 | } SMBIOS_TABLE_TYPE8;\r |
1058 | \r | |
98cb9ae8 | 1059 | ///\r |
1060 | /// System Slots - Slot Type\r | |
1061 | ///\r | |
1062 | typedef enum {\r | |
1063 | SlotTypeOther = 0x01,\r | |
1064 | SlotTypeUnknown = 0x02,\r | |
1065 | SlotTypeIsa = 0x03,\r | |
1066 | SlotTypeMca = 0x04,\r | |
1067 | SlotTypeEisa = 0x05,\r | |
1068 | SlotTypePci = 0x06,\r | |
1069 | SlotTypePcmcia = 0x07,\r | |
1070 | SlotTypeVlVesa = 0x08,\r | |
1071 | SlotTypeProprietary = 0x09,\r | |
1072 | SlotTypeProcessorCardSlot = 0x0A,\r | |
1073 | SlotTypeProprietaryMemoryCardSlot = 0x0B,\r | |
1074 | SlotTypeIORiserCardSlot = 0x0C,\r | |
1075 | SlotTypeNuBus = 0x0D,\r | |
1076 | SlotTypePci66MhzCapable = 0x0E,\r | |
1077 | SlotTypeAgp = 0x0F,\r | |
1078 | SlotTypeApg2X = 0x10,\r | |
1079 | SlotTypeAgp4X = 0x11,\r | |
1080 | SlotTypePciX = 0x12,\r | |
1081 | SlotTypeAgp4x = 0x13,\r | |
1082 | SlotTypePC98C20 = 0xA0,\r | |
1083 | SlotTypePC98C24 = 0xA1,\r | |
1084 | SlotTypePC98E = 0xA2,\r | |
1085 | SlotTypePC98LocalBus = 0xA3,\r | |
1086 | SlotTypePC98Card = 0xA4,\r | |
1087 | SlotTypePciExpress = 0xA5,\r | |
1088 | SlotTypePciExpressX1 = 0xA6,\r | |
1089 | SlotTypePciExpressX2 = 0xA7,\r | |
1090 | SlotTypePciExpressX4 = 0xA8,\r | |
1091 | SlotTypePciExpressX8 = 0xA9,\r | |
3507ab19 | 1092 | SlotTypePciExpressX16 = 0xAA,\r |
1093 | SlotTypePciExpressGen2 = 0xAB,\r | |
1094 | SlotTypePciExpressGen2X1 = 0xAC,\r | |
1095 | SlotTypePciExpressGen2X2 = 0xAD,\r | |
1096 | SlotTypePciExpressGen2X4 = 0xAE,\r | |
1097 | SlotTypePciExpressGen2X8 = 0xAF,\r | |
7ddba202 SZ |
1098 | SlotTypePciExpressGen2X16 = 0xB0,\r |
1099 | SlotTypePciExpressGen3 = 0xB1,\r | |
1100 | SlotTypePciExpressGen3X1 = 0xB2,\r | |
1101 | SlotTypePciExpressGen3X2 = 0xB3,\r | |
1102 | SlotTypePciExpressGen3X4 = 0xB4,\r | |
1103 | SlotTypePciExpressGen3X8 = 0xB5,\r | |
1104 | SlotTypePciExpressGen3X16 = 0xB6\r | |
98cb9ae8 | 1105 | } MISC_SLOT_TYPE;\r |
1106 | \r | |
1107 | ///\r | |
af2dc6a7 | 1108 | /// System Slots - Slot Data Bus Width.\r |
98cb9ae8 | 1109 | ///\r |
1110 | typedef enum {\r | |
1111 | SlotDataBusWidthOther = 0x01,\r | |
1112 | SlotDataBusWidthUnknown = 0x02,\r | |
1113 | SlotDataBusWidth8Bit = 0x03,\r | |
1114 | SlotDataBusWidth16Bit = 0x04,\r | |
1115 | SlotDataBusWidth32Bit = 0x05,\r | |
1116 | SlotDataBusWidth64Bit = 0x06,\r | |
1117 | SlotDataBusWidth128Bit = 0x07,\r | |
6800ac83 | 1118 | SlotDataBusWidth1X = 0x08, ///< Or X1\r |
1119 | SlotDataBusWidth2X = 0x09, ///< Or X2\r | |
1120 | SlotDataBusWidth4X = 0x0A, ///< Or X4\r | |
1121 | SlotDataBusWidth8X = 0x0B, ///< Or X8\r | |
1122 | SlotDataBusWidth12X = 0x0C, ///< Or X12\r | |
1123 | SlotDataBusWidth16X = 0x0D, ///< Or X16\r | |
1124 | SlotDataBusWidth32X = 0x0E ///< Or X32\r | |
98cb9ae8 | 1125 | } MISC_SLOT_DATA_BUS_WIDTH;\r |
1126 | \r | |
1127 | ///\r | |
af2dc6a7 | 1128 | /// System Slots - Current Usage.\r |
98cb9ae8 | 1129 | ///\r |
1130 | typedef enum {\r | |
1131 | SlotUsageOther = 0x01,\r | |
1132 | SlotUsageUnknown = 0x02,\r | |
1133 | SlotUsageAvailable = 0x03,\r | |
1134 | SlotUsageInUse = 0x04\r | |
1135 | } MISC_SLOT_USAGE;\r | |
1136 | \r | |
1137 | ///\r | |
af2dc6a7 | 1138 | /// System Slots - Slot Length. \r |
98cb9ae8 | 1139 | ///\r |
1140 | typedef enum {\r | |
1141 | SlotLengthOther = 0x01,\r | |
1142 | SlotLengthUnknown = 0x02,\r | |
1143 | SlotLengthShort = 0x03,\r | |
1144 | SlotLengthLong = 0x04\r | |
1145 | } MISC_SLOT_LENGTH;\r | |
1146 | \r | |
1147 | ///\r | |
af2dc6a7 | 1148 | /// System Slots - Slot Characteristics 1. \r |
98cb9ae8 | 1149 | ///\r |
1150 | typedef struct {\r | |
1151 | UINT8 CharacteristicsUnknown :1;\r | |
1152 | UINT8 Provides50Volts :1;\r | |
1153 | UINT8 Provides33Volts :1;\r | |
1154 | UINT8 SharedSlot :1;\r | |
1155 | UINT8 PcCard16Supported :1;\r | |
1156 | UINT8 CardBusSupported :1;\r | |
1157 | UINT8 ZoomVideoSupported :1;\r | |
1158 | UINT8 ModemRingResumeSupported:1;\r | |
1159 | } MISC_SLOT_CHARACTERISTICS1;\r | |
1160 | ///\r | |
af2dc6a7 | 1161 | /// System Slots - Slot Characteristics 2. \r |
98cb9ae8 | 1162 | ///\r |
1163 | typedef struct {\r | |
1164 | UINT8 PmeSignalSupported :1;\r | |
1165 | UINT8 HotPlugDevicesSupported :1;\r | |
1166 | UINT8 SmbusSignalSupported :1;\r | |
6800ac83 | 1167 | UINT8 Reserved :5; ///< Set to 0.\r |
98cb9ae8 | 1168 | } MISC_SLOT_CHARACTERISTICS2;\r |
1169 | \r | |
4135253b | 1170 | ///\r |
1171 | /// System Slots (Type 9)\r | |
1172 | ///\r | |
98cb9ae8 | 1173 | /// The information in this structure defines the attributes of a system slot. \r |
1174 | /// One structure is provided for each slot in the system.\r | |
1175 | ///\r | |
1176 | ///\r | |
61ce5861 | 1177 | typedef struct {\r |
98cb9ae8 | 1178 | SMBIOS_STRUCTURE Hdr;\r |
1179 | SMBIOS_TABLE_STRING SlotDesignation;\r | |
af2dc6a7 | 1180 | UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r |
1181 | UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r | |
1182 | UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r | |
1183 | UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r | |
98cb9ae8 | 1184 | UINT16 SlotID;\r |
1185 | MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r | |
1186 | MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r | |
61ce5861 | 1187 | //\r |
1188 | // Add for smbios 2.6\r | |
1189 | //\r | |
98cb9ae8 | 1190 | UINT16 SegmentGroupNum;\r |
1191 | UINT8 BusNum;\r | |
1192 | UINT8 DevFuncNum;\r | |
61ce5861 | 1193 | } SMBIOS_TABLE_TYPE9;\r |
1194 | \r | |
98cb9ae8 | 1195 | ///\r |
af2dc6a7 | 1196 | /// On Board Devices Information - Device Types. \r |
98cb9ae8 | 1197 | ///\r |
1198 | typedef enum {\r | |
1199 | OnBoardDeviceTypeOther = 0x01,\r | |
1200 | OnBoardDeviceTypeUnknown = 0x02,\r | |
1201 | OnBoardDeviceTypeVideo = 0x03,\r | |
1202 | OnBoardDeviceTypeScsiController = 0x04,\r | |
1203 | OnBoardDeviceTypeEthernet = 0x05,\r | |
1204 | OnBoardDeviceTypeTokenRing = 0x06,\r | |
119c1688 SZ |
1205 | OnBoardDeviceTypeSound = 0x07,\r |
1206 | OnBoardDeviceTypePATAController = 0x08,\r | |
1207 | OnBoardDeviceTypeSATAController = 0x09,\r | |
1208 | OnBoardDeviceTypeSASController = 0x0A\r | |
98cb9ae8 | 1209 | } MISC_ONBOARD_DEVICE_TYPE;\r |
1210 | \r | |
bf7ea009 | 1211 | ///\r |
1212 | /// Device Item Entry\r | |
1213 | ///\r | |
61ce5861 | 1214 | typedef struct {\r |
af2dc6a7 | 1215 | UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r |
1216 | ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r | |
98cb9ae8 | 1217 | SMBIOS_TABLE_STRING DescriptionString;\r |
61ce5861 | 1218 | } DEVICE_STRUCT;\r |
1219 | \r | |
4135253b | 1220 | ///\r |
af2dc6a7 | 1221 | /// On Board Devices Information (Type 10, obsolete).\r |
4135253b | 1222 | ///\r |
98cb9ae8 | 1223 | /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r |
1224 | /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r | |
1225 | /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r | |
1226 | /// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r | |
1227 | /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r | |
1228 | /// has some level of control over the enabling of the associated device for use by the system.\r | |
1229 | ///\r | |
61ce5861 | 1230 | typedef struct {\r |
1231 | SMBIOS_STRUCTURE Hdr;\r | |
1232 | DEVICE_STRUCT Device[1];\r | |
1233 | } SMBIOS_TABLE_TYPE10;\r | |
1234 | \r | |
4135253b | 1235 | ///\r |
af2dc6a7 | 1236 | /// OEM Strings (Type 11).\r |
98cb9ae8 | 1237 | /// This structure contains free form strings defined by the OEM. Examples of this are: \r |
1238 | /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r | |
4135253b | 1239 | ///\r |
61ce5861 | 1240 | typedef struct {\r |
1241 | SMBIOS_STRUCTURE Hdr;\r | |
1242 | UINT8 StringCount;\r | |
1243 | } SMBIOS_TABLE_TYPE11;\r | |
1244 | \r | |
4135253b | 1245 | ///\r |
af2dc6a7 | 1246 | /// System Configuration Options (Type 12).\r |
4135253b | 1247 | ///\r |
98cb9ae8 | 1248 | /// This structure contains information required to configure the base board's Jumpers and Switches. \r |
1249 | ///\r | |
61ce5861 | 1250 | typedef struct {\r |
1251 | SMBIOS_STRUCTURE Hdr;\r | |
1252 | UINT8 StringCount;\r | |
1253 | } SMBIOS_TABLE_TYPE12;\r | |
1254 | \r | |
98cb9ae8 | 1255 | \r |
4135253b | 1256 | ///\r |
af2dc6a7 | 1257 | /// BIOS Language Information (Type 13).\r |
4135253b | 1258 | ///\r |
98cb9ae8 | 1259 | /// The information in this structure defines the installable language attributes of the BIOS. \r |
1260 | /// \r | |
61ce5861 | 1261 | typedef struct {\r |
1262 | SMBIOS_STRUCTURE Hdr;\r | |
1263 | UINT8 InstallableLanguages;\r | |
1264 | UINT8 Flags;\r | |
fbfa4a1d | 1265 | UINT8 Reserved[15];\r |
61ce5861 | 1266 | SMBIOS_TABLE_STRING CurrentLanguages;\r |
1267 | } SMBIOS_TABLE_TYPE13;\r | |
1268 | \r | |
119c1688 SZ |
1269 | ///\r |
1270 | /// Group Item Entry\r | |
1271 | ///\r | |
1272 | typedef struct {\r | |
1273 | UINT8 ItemType;\r | |
1274 | UINT16 ItemHandle;\r | |
1275 | } GROUP_STRUCT;\r | |
1276 | \r | |
1277 | ///\r | |
1278 | /// Group Associations (Type 14).\r | |
1279 | ///\r | |
1280 | /// The Group Associations structure is provided for OEMs who want to specify \r | |
1281 | /// the arrangement or hierarchy of certain components (including other Group Associations) \r | |
1282 | /// within the system. \r | |
1283 | ///\r | |
1284 | typedef struct {\r | |
1285 | SMBIOS_STRUCTURE Hdr;\r | |
1286 | SMBIOS_TABLE_STRING GroupName;\r | |
1287 | GROUP_STRUCT Group[1];\r | |
1288 | } SMBIOS_TABLE_TYPE14;\r | |
1289 | \r | |
98cb9ae8 | 1290 | ///\r |
af2dc6a7 | 1291 | /// System Event Log - Event Log Types.\r |
98cb9ae8 | 1292 | /// \r |
1293 | typedef enum {\r | |
1294 | EventLogTypeReserved = 0x00,\r | |
1295 | EventLogTypeSingleBitECC = 0x01,\r | |
1296 | EventLogTypeMultiBitECC = 0x02,\r | |
1297 | EventLogTypeParityMemErr = 0x03,\r | |
1298 | EventLogTypeBusTimeOut = 0x04,\r | |
1299 | EventLogTypeIOChannelCheck = 0x05,\r | |
1300 | EventLogTypeSoftwareNMI = 0x06,\r | |
1301 | EventLogTypePOSTMemResize = 0x07,\r | |
1302 | EventLogTypePOSTErr = 0x08,\r | |
1303 | EventLogTypePCIParityErr = 0x09,\r | |
1304 | EventLogTypePCISystemErr = 0x0A,\r | |
1305 | EventLogTypeCPUFailure = 0x0B,\r | |
1306 | EventLogTypeEISATimeOut = 0x0C,\r | |
1307 | EventLogTypeMemLogDisabled = 0x0D,\r | |
1308 | EventLogTypeLoggingDisabled = 0x0E,\r | |
1309 | EventLogTypeSysLimitExce = 0x10,\r | |
1310 | EventLogTypeAsyncHWTimer = 0x11,\r | |
1311 | EventLogTypeSysConfigInfo = 0x12,\r | |
1312 | EventLogTypeHDInfo = 0x13,\r | |
1313 | EventLogTypeSysReconfig = 0x14,\r | |
1314 | EventLogTypeUncorrectCPUErr = 0x15,\r | |
1315 | EventLogTypeAreaResetAndClr = 0x16,\r | |
1316 | EventLogTypeSystemBoot = 0x17,\r | |
6800ac83 | 1317 | EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r |
1318 | EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r | |
98cb9ae8 | 1319 | EventLogTypeEndOfLog = 0xFF\r |
1320 | } EVENT_LOG_TYPE_DATA;\r | |
1321 | \r | |
1322 | ///\r | |
af2dc6a7 | 1323 | /// System Event Log - Variable Data Format Types. \r |
98cb9ae8 | 1324 | /// \r |
1325 | typedef enum {\r | |
1326 | EventLogVariableNone = 0x00,\r | |
1327 | EventLogVariableHandle = 0x01,\r | |
1328 | EventLogVariableMutilEvent = 0x02,\r | |
1329 | EventLogVariableMutilEventHandle = 0x03,\r | |
1330 | EventLogVariablePOSTResultBitmap = 0x04,\r | |
1331 | EventLogVariableSysManagementType = 0x05,\r | |
1332 | EventLogVariableMutliEventSysManagmentType = 0x06, \r | |
1333 | EventLogVariableUnused = 0x07,\r | |
1334 | EventLogVariableOEMAssigned = 0x80\r | |
55deb978 | 1335 | } EVENT_LOG_VARIABLE_DATA;\r |
98cb9ae8 | 1336 | \r |
98cb9ae8 | 1337 | ///\r |
1338 | /// Event Log Type Descriptors\r | |
1339 | ///\r | |
1340 | typedef struct {\r | |
af2dc6a7 | 1341 | UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r |
98cb9ae8 | 1342 | UINT8 DataFormatType;\r |
1343 | } EVENT_LOG_TYPE;\r | |
1344 | \r | |
4135253b | 1345 | ///\r |
af2dc6a7 | 1346 | /// System Event Log (Type 15).\r |
4135253b | 1347 | ///\r |
98cb9ae8 | 1348 | /// The presence of this structure within the SMBIOS data returned for a system indicates \r |
1349 | /// that the system supports an event log. An event log is a fixed-length area within a \r | |
1350 | /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r | |
1351 | /// record, followed by one or more variable-length log records. \r | |
1352 | ///\r | |
61ce5861 | 1353 | typedef struct {\r |
1354 | SMBIOS_STRUCTURE Hdr;\r | |
1355 | UINT16 LogAreaLength;\r | |
1356 | UINT16 LogHeaderStartOffset;\r | |
1357 | UINT16 LogDataStartOffset;\r | |
1358 | UINT8 AccessMethod;\r | |
1359 | UINT8 LogStatus;\r | |
1360 | UINT32 LogChangeToken;\r | |
1361 | UINT32 AccessMethodAddress;\r | |
1362 | UINT8 LogHeaderFormat;\r | |
1363 | UINT8 NumberOfSupportedLogTypeDescriptors;\r | |
1364 | UINT8 LengthOfLogTypeDescriptor;\r | |
1365 | EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r | |
1366 | } SMBIOS_TABLE_TYPE15;\r | |
1367 | \r | |
98cb9ae8 | 1368 | ///\r |
af2dc6a7 | 1369 | /// Physical Memory Array - Location.\r |
98cb9ae8 | 1370 | ///\r |
1371 | typedef enum {\r | |
1372 | MemoryArrayLocationOther = 0x01,\r | |
1373 | MemoryArrayLocationUnknown = 0x02,\r | |
1374 | MemoryArrayLocationSystemBoard = 0x03,\r | |
1375 | MemoryArrayLocationIsaAddonCard = 0x04,\r | |
1376 | MemoryArrayLocationEisaAddonCard = 0x05,\r | |
1377 | MemoryArrayLocationPciAddonCard = 0x06,\r | |
1378 | MemoryArrayLocationMcaAddonCard = 0x07,\r | |
1379 | MemoryArrayLocationPcmciaAddonCard = 0x08,\r | |
1380 | MemoryArrayLocationProprietaryAddonCard = 0x09,\r | |
1381 | MemoryArrayLocationNuBus = 0x0A,\r | |
1382 | MemoryArrayLocationPc98C20AddonCard = 0xA0,\r | |
1383 | MemoryArrayLocationPc98C24AddonCard = 0xA1,\r | |
1384 | MemoryArrayLocationPc98EAddonCard = 0xA2,\r | |
1385 | MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r | |
1386 | } MEMORY_ARRAY_LOCATION;\r | |
1387 | \r | |
1388 | ///\r | |
af2dc6a7 | 1389 | /// Physical Memory Array - Use.\r |
98cb9ae8 | 1390 | ///\r |
1391 | typedef enum {\r | |
1392 | MemoryArrayUseOther = 0x01,\r | |
1393 | MemoryArrayUseUnknown = 0x02,\r | |
1394 | MemoryArrayUseSystemMemory = 0x03,\r | |
1395 | MemoryArrayUseVideoMemory = 0x04,\r | |
1396 | MemoryArrayUseFlashMemory = 0x05,\r | |
1397 | MemoryArrayUseNonVolatileRam = 0x06,\r | |
1398 | MemoryArrayUseCacheMemory = 0x07\r | |
1399 | } MEMORY_ARRAY_USE;\r | |
1400 | \r | |
1401 | ///\r | |
af2dc6a7 | 1402 | /// Physical Memory Array - Error Correction Types. \r |
98cb9ae8 | 1403 | ///\r |
1404 | typedef enum {\r | |
1405 | MemoryErrorCorrectionOther = 0x01,\r | |
1406 | MemoryErrorCorrectionUnknown = 0x02,\r | |
1407 | MemoryErrorCorrectionNone = 0x03,\r | |
1408 | MemoryErrorCorrectionParity = 0x04,\r | |
1409 | MemoryErrorCorrectionSingleBitEcc = 0x05,\r | |
1410 | MemoryErrorCorrectionMultiBitEcc = 0x06,\r | |
1411 | MemoryErrorCorrectionCrc = 0x07\r | |
1412 | } MEMORY_ERROR_CORRECTION;\r | |
1413 | \r | |
4135253b | 1414 | ///\r |
af2dc6a7 | 1415 | /// Physical Memory Array (Type 16).\r |
4135253b | 1416 | ///\r |
98cb9ae8 | 1417 | /// This structure describes a collection of memory devices that operate \r |
1418 | /// together to form a memory address space. \r | |
1419 | ///\r | |
61ce5861 | 1420 | typedef struct {\r |
98cb9ae8 | 1421 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1422 | UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r |
1423 | UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r | |
1424 | UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r | |
98cb9ae8 | 1425 | UINT32 MaximumCapacity;\r |
1426 | UINT16 MemoryErrorInformationHandle;\r | |
1427 | UINT16 NumberOfMemoryDevices;\r | |
7ddba202 SZ |
1428 | //\r |
1429 | // Add for smbios 2.7\r | |
1430 | //\r | |
1431 | UINT64 ExtendedMaximumCapacity;\r | |
61ce5861 | 1432 | } SMBIOS_TABLE_TYPE16;\r |
1433 | \r | |
98cb9ae8 | 1434 | ///\r |
af2dc6a7 | 1435 | /// Memory Device - Form Factor.\r |
98cb9ae8 | 1436 | ///\r |
1437 | typedef enum {\r | |
1438 | MemoryFormFactorOther = 0x01,\r | |
1439 | MemoryFormFactorUnknown = 0x02,\r | |
1440 | MemoryFormFactorSimm = 0x03,\r | |
1441 | MemoryFormFactorSip = 0x04,\r | |
1442 | MemoryFormFactorChip = 0x05,\r | |
1443 | MemoryFormFactorDip = 0x06,\r | |
1444 | MemoryFormFactorZip = 0x07,\r | |
1445 | MemoryFormFactorProprietaryCard = 0x08,\r | |
1446 | MemoryFormFactorDimm = 0x09,\r | |
1447 | MemoryFormFactorTsop = 0x0A,\r | |
1448 | MemoryFormFactorRowOfChips = 0x0B,\r | |
1449 | MemoryFormFactorRimm = 0x0C,\r | |
1450 | MemoryFormFactorSodimm = 0x0D,\r | |
1451 | MemoryFormFactorSrimm = 0x0E,\r | |
1452 | MemoryFormFactorFbDimm = 0x0F\r | |
1453 | } MEMORY_FORM_FACTOR;\r | |
1454 | \r | |
1455 | ///\r | |
1456 | /// Memory Device - Type\r | |
1457 | ///\r | |
1458 | typedef enum {\r | |
1459 | MemoryTypeOther = 0x01,\r | |
1460 | MemoryTypeUnknown = 0x02,\r | |
1461 | MemoryTypeDram = 0x03,\r | |
1462 | MemoryTypeEdram = 0x04,\r | |
1463 | MemoryTypeVram = 0x05,\r | |
1464 | MemoryTypeSram = 0x06,\r | |
1465 | MemoryTypeRam = 0x07,\r | |
1466 | MemoryTypeRom = 0x08,\r | |
1467 | MemoryTypeFlash = 0x09,\r | |
1468 | MemoryTypeEeprom = 0x0A,\r | |
1469 | MemoryTypeFeprom = 0x0B,\r | |
1470 | MemoryTypeEprom = 0x0C,\r | |
1471 | MemoryTypeCdram = 0x0D,\r | |
1472 | MemoryType3Dram = 0x0E,\r | |
1473 | MemoryTypeSdram = 0x0F,\r | |
1474 | MemoryTypeSgram = 0x10,\r | |
1475 | MemoryTypeRdram = 0x11,\r | |
1476 | MemoryTypeDdr = 0x12,\r | |
1477 | MemoryTypeDdr2 = 0x13,\r | |
3507ab19 | 1478 | MemoryTypeDdr2FbDimm = 0x14,\r |
1479 | MemoryTypeDdr3 = 0x18,\r | |
1480 | MemoryTypeFbd2 = 0x19\r | |
98cb9ae8 | 1481 | } MEMORY_DEVICE_TYPE;\r |
1482 | \r | |
1483 | typedef struct {\r | |
1484 | UINT16 Reserved :1;\r | |
1485 | UINT16 Other :1;\r | |
1486 | UINT16 Unknown :1;\r | |
1487 | UINT16 FastPaged :1;\r | |
1488 | UINT16 StaticColumn :1;\r | |
1489 | UINT16 PseudoStatic :1;\r | |
1490 | UINT16 Rambus :1;\r | |
1491 | UINT16 Synchronous :1;\r | |
1492 | UINT16 Cmos :1;\r | |
1493 | UINT16 Edo :1;\r | |
1494 | UINT16 WindowDram :1;\r | |
1495 | UINT16 CacheDram :1;\r | |
1496 | UINT16 Nonvolatile :1;\r | |
7ddba202 SZ |
1497 | UINT16 Registered :1;\r |
1498 | UINT16 Unbuffered :1;\r | |
4a228334 | 1499 | UINT16 LrDimm :1;\r |
98cb9ae8 | 1500 | } MEMORY_DEVICE_TYPE_DETAIL;\r |
1501 | \r | |
4135253b | 1502 | ///\r |
af2dc6a7 | 1503 | /// Memory Device (Type 17).\r |
4135253b | 1504 | ///\r |
98cb9ae8 | 1505 | /// This structure describes a single memory device that is part of \r |
1506 | /// a larger Physical Memory Array (Type 16).\r | |
1507 | /// Note: If a system includes memory-device sockets, the SMBIOS implementation \r | |
af2dc6a7 | 1508 | /// includes a Memory Device structure instance for each slot, whether or not the \r |
98cb9ae8 | 1509 | /// socket is currently populated.\r |
1510 | ///\r | |
61ce5861 | 1511 | typedef struct {\r |
98cb9ae8 | 1512 | SMBIOS_STRUCTURE Hdr;\r |
1513 | UINT16 MemoryArrayHandle;\r | |
1514 | UINT16 MemoryErrorInformationHandle;\r | |
1515 | UINT16 TotalWidth;\r | |
1516 | UINT16 DataWidth;\r | |
1517 | UINT16 Size;\r | |
af2dc6a7 | 1518 | UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r |
98cb9ae8 | 1519 | UINT8 DeviceSet;\r |
1520 | SMBIOS_TABLE_STRING DeviceLocator;\r | |
1521 | SMBIOS_TABLE_STRING BankLocator;\r | |
af2dc6a7 | 1522 | UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r |
98cb9ae8 | 1523 | MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r |
1524 | UINT16 Speed;\r | |
1525 | SMBIOS_TABLE_STRING Manufacturer;\r | |
1526 | SMBIOS_TABLE_STRING SerialNumber;\r | |
1527 | SMBIOS_TABLE_STRING AssetTag;\r | |
1528 | SMBIOS_TABLE_STRING PartNumber;\r | |
61ce5861 | 1529 | //\r |
1530 | // Add for smbios 2.6\r | |
1531 | // \r | |
7ddba202 SZ |
1532 | UINT8 Attributes;\r |
1533 | //\r | |
1534 | // Add for smbios 2.7\r | |
1535 | //\r | |
1536 | UINT32 ExtendedSize;\r | |
1537 | UINT16 ConfiguredMemoryClockSpeed;\r | |
4a228334 EL |
1538 | //\r |
1539 | // Add for smbios 2.8.0\r | |
1540 | //\r | |
1541 | UINT16 MinimumVoltage;\r | |
1542 | UINT16 MaximumVoltage;\r | |
1543 | UINT16 ConfiguredVoltage;\r | |
61ce5861 | 1544 | } SMBIOS_TABLE_TYPE17;\r |
1545 | \r | |
98cb9ae8 | 1546 | ///\r |
af2dc6a7 | 1547 | /// 32-bit Memory Error Information - Error Type. \r |
98cb9ae8 | 1548 | ///\r |
1549 | typedef enum { \r | |
1550 | MemoryErrorOther = 0x01,\r | |
1551 | MemoryErrorUnknown = 0x02,\r | |
1552 | MemoryErrorOk = 0x03,\r | |
1553 | MemoryErrorBadRead = 0x04,\r | |
1554 | MemoryErrorParity = 0x05,\r | |
1555 | MemoryErrorSigleBit = 0x06,\r | |
1556 | MemoryErrorDoubleBit = 0x07,\r | |
1557 | MemoryErrorMultiBit = 0x08,\r | |
1558 | MemoryErrorNibble = 0x09,\r | |
1559 | MemoryErrorChecksum = 0x0A,\r | |
1560 | MemoryErrorCrc = 0x0B,\r | |
1561 | MemoryErrorCorrectSingleBit = 0x0C,\r | |
1562 | MemoryErrorCorrected = 0x0D,\r | |
1563 | MemoryErrorUnCorrectable = 0x0E\r | |
1564 | } MEMORY_ERROR_TYPE;\r | |
1565 | \r | |
1566 | ///\r | |
af2dc6a7 | 1567 | /// 32-bit Memory Error Information - Error Granularity. \r |
98cb9ae8 | 1568 | ///\r |
1569 | typedef enum { \r | |
1570 | MemoryGranularityOther = 0x01,\r | |
1571 | MemoryGranularityOtherUnknown = 0x02,\r | |
1572 | MemoryGranularityDeviceLevel = 0x03,\r | |
1573 | MemoryGranularityMemPartitionLevel = 0x04\r | |
1574 | } MEMORY_ERROR_GRANULARITY;\r | |
1575 | \r | |
1576 | ///\r | |
af2dc6a7 | 1577 | /// 32-bit Memory Error Information - Error Operation. \r |
98cb9ae8 | 1578 | ///\r |
1579 | typedef enum { \r | |
1580 | MemoryErrorOperationOther = 0x01,\r | |
1581 | MemoryErrorOperationUnknown = 0x02,\r | |
1582 | MemoryErrorOperationRead = 0x03,\r | |
1583 | MemoryErrorOperationWrite = 0x04,\r | |
1584 | MemoryErrorOperationPartialWrite = 0x05\r | |
1585 | } MEMORY_ERROR_OPERATION;\r | |
1586 | \r | |
4135253b | 1587 | ///\r |
af2dc6a7 | 1588 | /// 32-bit Memory Error Information (Type 18).\r |
98cb9ae8 | 1589 | /// \r |
1590 | /// This structure identifies the specifics of an error that might be detected \r | |
1591 | /// within a Physical Memory Array.\r | |
4135253b | 1592 | ///\r |
61ce5861 | 1593 | typedef struct {\r |
98cb9ae8 | 1594 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1595 | UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r |
1596 | UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r | |
1597 | UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r | |
98cb9ae8 | 1598 | UINT32 VendorSyndrome;\r |
1599 | UINT32 MemoryArrayErrorAddress;\r | |
1600 | UINT32 DeviceErrorAddress;\r | |
1601 | UINT32 ErrorResolution;\r | |
61ce5861 | 1602 | } SMBIOS_TABLE_TYPE18;\r |
1603 | \r | |
4135253b | 1604 | ///\r |
af2dc6a7 | 1605 | /// Memory Array Mapped Address (Type 19).\r |
4135253b | 1606 | ///\r |
98cb9ae8 | 1607 | /// This structure provides the address mapping for a Physical Memory Array. \r |
1608 | /// One structure is present for each contiguous address range described.\r | |
1609 | ///\r | |
61ce5861 | 1610 | typedef struct {\r |
1611 | SMBIOS_STRUCTURE Hdr;\r | |
1612 | UINT32 StartingAddress;\r | |
1613 | UINT32 EndingAddress;\r | |
1614 | UINT16 MemoryArrayHandle;\r | |
1615 | UINT8 PartitionWidth;\r | |
7ddba202 SZ |
1616 | //\r |
1617 | // Add for smbios 2.7\r | |
1618 | //\r | |
1619 | UINT64 ExtendedStartingAddress;\r | |
1620 | UINT64 ExtendedEndingAddress;\r | |
61ce5861 | 1621 | } SMBIOS_TABLE_TYPE19;\r |
1622 | \r | |
4135253b | 1623 | ///\r |
af2dc6a7 | 1624 | /// Memory Device Mapped Address (Type 20).\r |
4135253b | 1625 | ///\r |
98cb9ae8 | 1626 | /// This structure maps memory address space usually to a device-level granularity. \r |
1627 | /// One structure is present for each contiguous address range described. \r | |
1628 | ///\r | |
61ce5861 | 1629 | typedef struct {\r |
1630 | SMBIOS_STRUCTURE Hdr;\r | |
1631 | UINT32 StartingAddress;\r | |
1632 | UINT32 EndingAddress;\r | |
1633 | UINT16 MemoryDeviceHandle;\r | |
1634 | UINT16 MemoryArrayMappedAddressHandle;\r | |
1635 | UINT8 PartitionRowPosition;\r | |
1636 | UINT8 InterleavePosition;\r | |
1637 | UINT8 InterleavedDataDepth;\r | |
7ddba202 SZ |
1638 | //\r |
1639 | // Add for smbios 2.7\r | |
1640 | //\r | |
1641 | UINT64 ExtendedStartingAddress;\r | |
1642 | UINT64 ExtendedEndingAddress;\r | |
61ce5861 | 1643 | } SMBIOS_TABLE_TYPE20;\r |
1644 | \r | |
98cb9ae8 | 1645 | ///\r |
1646 | /// Built-in Pointing Device - Type\r | |
1647 | ///\r | |
1648 | typedef enum {\r | |
1649 | PointingDeviceTypeOther = 0x01,\r | |
1650 | PointingDeviceTypeUnknown = 0x02,\r | |
1651 | PointingDeviceTypeMouse = 0x03,\r | |
1652 | PointingDeviceTypeTrackBall = 0x04,\r | |
1653 | PointingDeviceTypeTrackPoint = 0x05,\r | |
1654 | PointingDeviceTypeGlidePoint = 0x06,\r | |
1655 | PointingDeviceTouchPad = 0x07,\r | |
1656 | PointingDeviceTouchScreen = 0x08,\r | |
1657 | PointingDeviceOpticalSensor = 0x09\r | |
1658 | } BUILTIN_POINTING_DEVICE_TYPE;\r | |
1659 | \r | |
1660 | ///\r | |
af2dc6a7 | 1661 | /// Built-in Pointing Device - Interface.\r |
98cb9ae8 | 1662 | ///\r |
1663 | typedef enum {\r | |
1664 | PointingDeviceInterfaceOther = 0x01,\r | |
1665 | PointingDeviceInterfaceUnknown = 0x02,\r | |
1666 | PointingDeviceInterfaceSerial = 0x03,\r | |
1667 | PointingDeviceInterfacePs2 = 0x04,\r | |
1668 | PointingDeviceInterfaceInfrared = 0x05,\r | |
1669 | PointingDeviceInterfaceHpHil = 0x06,\r | |
1670 | PointingDeviceInterfaceBusMouse = 0x07,\r | |
1671 | PointingDeviceInterfaceADB = 0x08,\r | |
1672 | PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r | |
1673 | PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r | |
1674 | PointingDeviceInterfaceUsb = 0xA2\r | |
1675 | } BUILTIN_POINTING_DEVICE_INTERFACE;\r | |
1676 | \r | |
4135253b | 1677 | ///\r |
af2dc6a7 | 1678 | /// Built-in Pointing Device (Type 21).\r |
4135253b | 1679 | ///\r |
98cb9ae8 | 1680 | /// This structure describes the attributes of the built-in pointing device for the \r |
af2dc6a7 | 1681 | /// system. The presence of this structure does not imply that the built-in\r |
98cb9ae8 | 1682 | /// pointing device is active for the system's use! \r |
1683 | ///\r | |
61ce5861 | 1684 | typedef struct {\r |
98cb9ae8 | 1685 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1686 | UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r |
1687 | UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r | |
98cb9ae8 | 1688 | UINT8 NumberOfButtons;\r |
61ce5861 | 1689 | } SMBIOS_TABLE_TYPE21;\r |
1690 | \r | |
98cb9ae8 | 1691 | ///\r |
1692 | /// Portable Battery - Device Chemistry\r | |
1693 | ///\r | |
1694 | typedef enum { \r | |
1695 | PortableBatteryDeviceChemistryOther = 0x01,\r | |
1696 | PortableBatteryDeviceChemistryUnknown = 0x02,\r | |
1697 | PortableBatteryDeviceChemistryLeadAcid = 0x03,\r | |
1698 | PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r | |
1699 | PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r | |
1700 | PortableBatteryDeviceChemistryLithiumIon = 0x06,\r | |
1701 | PortableBatteryDeviceChemistryZincAir = 0x07,\r | |
1702 | PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r | |
1703 | } PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r | |
1704 | \r | |
4135253b | 1705 | ///\r |
af2dc6a7 | 1706 | /// Portable Battery (Type 22).\r |
4135253b | 1707 | ///\r |
98cb9ae8 | 1708 | /// This structure describes the attributes of the portable battery(s) for the system. \r |
1709 | /// The structure contains the static attributes for the group. Each structure describes \r | |
1f9f8414 | 1710 | /// a single battery pack's attributes.\r |
98cb9ae8 | 1711 | ///\r |
61ce5861 | 1712 | typedef struct {\r |
98cb9ae8 | 1713 | SMBIOS_STRUCTURE Hdr;\r |
1714 | SMBIOS_TABLE_STRING Location;\r | |
1715 | SMBIOS_TABLE_STRING Manufacturer;\r | |
1716 | SMBIOS_TABLE_STRING ManufactureDate;\r | |
1717 | SMBIOS_TABLE_STRING SerialNumber;\r | |
1718 | SMBIOS_TABLE_STRING DeviceName;\r | |
af2dc6a7 | 1719 | UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r |
98cb9ae8 | 1720 | UINT16 DeviceCapacity;\r |
1721 | UINT16 DesignVoltage;\r | |
1722 | SMBIOS_TABLE_STRING SBDSVersionNumber;\r | |
1723 | UINT8 MaximumErrorInBatteryData;\r | |
1724 | UINT16 SBDSSerialNumber;\r | |
1725 | UINT16 SBDSManufactureDate;\r | |
1726 | SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r | |
1727 | UINT8 DesignCapacityMultiplier;\r | |
1728 | UINT32 OEMSpecific;\r | |
61ce5861 | 1729 | } SMBIOS_TABLE_TYPE22;\r |
1730 | \r | |
4135253b | 1731 | ///\r |
1732 | /// System Reset (Type 23)\r | |
1733 | ///\r | |
98cb9ae8 | 1734 | /// This structure describes whether Automatic System Reset functions enabled (Status). \r |
1735 | /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r | |
1736 | /// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r | |
1737 | /// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r | |
1738 | /// the system will re-boot according to the Boot Option at Limit. \r | |
1739 | ///\r | |
61ce5861 | 1740 | typedef struct {\r |
1741 | SMBIOS_STRUCTURE Hdr;\r | |
1742 | UINT8 Capabilities;\r | |
1743 | UINT16 ResetCount;\r | |
1744 | UINT16 ResetLimit;\r | |
1745 | UINT16 TimerInterval;\r | |
1746 | UINT16 Timeout;\r | |
1747 | } SMBIOS_TABLE_TYPE23;\r | |
1748 | \r | |
4135253b | 1749 | ///\r |
af2dc6a7 | 1750 | /// Hardware Security (Type 24).\r |
4135253b | 1751 | ///\r |
98cb9ae8 | 1752 | /// This structure describes the system-wide hardware security settings. \r |
1753 | ///\r | |
61ce5861 | 1754 | typedef struct {\r |
1755 | SMBIOS_STRUCTURE Hdr;\r | |
1756 | UINT8 HardwareSecuritySettings;\r | |
1757 | } SMBIOS_TABLE_TYPE24;\r | |
1758 | \r | |
4135253b | 1759 | ///\r |
af2dc6a7 | 1760 | /// System Power Controls (Type 25).\r |
4135253b | 1761 | ///\r |
98cb9ae8 | 1762 | /// This structure describes the attributes for controlling the main power supply to the system. \r |
1763 | /// Software that interprets this structure uses the month, day, hour, minute, and second values \r | |
1764 | /// to determine the number of seconds until the next power-on of the system. The presence of \r | |
1765 | /// this structure implies that a timed power-on facility is available for the system. \r | |
1766 | ///\r | |
61ce5861 | 1767 | typedef struct {\r |
1768 | SMBIOS_STRUCTURE Hdr;\r | |
1769 | UINT8 NextScheduledPowerOnMonth;\r | |
1770 | UINT8 NextScheduledPowerOnDayOfMonth;\r | |
1771 | UINT8 NextScheduledPowerOnHour;\r | |
1772 | UINT8 NextScheduledPowerOnMinute;\r | |
1773 | UINT8 NextScheduledPowerOnSecond;\r | |
1774 | } SMBIOS_TABLE_TYPE25;\r | |
1775 | \r | |
98cb9ae8 | 1776 | ///\r |
af2dc6a7 | 1777 | /// Voltage Probe - Location and Status.\r |
98cb9ae8 | 1778 | ///\r |
1779 | typedef struct {\r | |
1780 | UINT8 VoltageProbeSite :5;\r | |
1781 | UINT8 VoltageProbeStatus :3;\r | |
1782 | } MISC_VOLTAGE_PROBE_LOCATION;\r | |
1783 | \r | |
4135253b | 1784 | ///\r |
1785 | /// Voltage Probe (Type 26)\r | |
1786 | ///\r | |
98cb9ae8 | 1787 | /// This describes the attributes for a voltage probe in the system. \r |
1788 | /// Each structure describes a single voltage probe.\r | |
1789 | ///\r | |
61ce5861 | 1790 | typedef struct {\r |
98cb9ae8 | 1791 | SMBIOS_STRUCTURE Hdr;\r |
1792 | SMBIOS_TABLE_STRING Description;\r | |
1793 | MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r | |
1794 | UINT16 MaximumValue;\r | |
1795 | UINT16 MinimumValue;\r | |
1796 | UINT16 Resolution;\r | |
1797 | UINT16 Tolerance;\r | |
1798 | UINT16 Accuracy;\r | |
1799 | UINT32 OEMDefined;\r | |
1800 | UINT16 NominalValue;\r | |
61ce5861 | 1801 | } SMBIOS_TABLE_TYPE26;\r |
1802 | \r | |
98cb9ae8 | 1803 | ///\r |
af2dc6a7 | 1804 | /// Cooling Device - Device Type and Status.\r |
98cb9ae8 | 1805 | ///\r |
1806 | typedef struct {\r | |
1807 | UINT8 CoolingDevice :5;\r | |
1808 | UINT8 CoolingDeviceStatus :3;\r | |
1809 | } MISC_COOLING_DEVICE_TYPE;\r | |
1810 | \r | |
4135253b | 1811 | ///\r |
1812 | /// Cooling Device (Type 27)\r | |
1813 | ///\r | |
98cb9ae8 | 1814 | /// This structure describes the attributes for a cooling device in the system. \r |
1815 | /// Each structure describes a single cooling device. \r | |
1816 | /// \r | |
61ce5861 | 1817 | typedef struct {\r |
98cb9ae8 | 1818 | SMBIOS_STRUCTURE Hdr;\r |
1819 | UINT16 TemperatureProbeHandle;\r | |
1820 | MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r | |
1821 | UINT8 CoolingUnitGroup;\r | |
1822 | UINT32 OEMDefined;\r | |
1823 | UINT16 NominalSpeed;\r | |
7ddba202 SZ |
1824 | //\r |
1825 | // Add for smbios 2.7\r | |
1826 | //\r | |
1827 | SMBIOS_TABLE_STRING Description;\r | |
61ce5861 | 1828 | } SMBIOS_TABLE_TYPE27;\r |
1829 | \r | |
98cb9ae8 | 1830 | ///\r |
af2dc6a7 | 1831 | /// Temperature Probe - Location and Status.\r |
98cb9ae8 | 1832 | ///\r |
1833 | typedef struct {\r | |
1834 | UINT8 TemperatureProbeSite :5;\r | |
1835 | UINT8 TemperatureProbeStatus :3;\r | |
1836 | } MISC_TEMPERATURE_PROBE_LOCATION;\r | |
1837 | \r | |
4135253b | 1838 | ///\r |
af2dc6a7 | 1839 | /// Temperature Probe (Type 28).\r |
4135253b | 1840 | ///\r |
98cb9ae8 | 1841 | /// This structure describes the attributes for a temperature probe in the system. \r |
1842 | /// Each structure describes a single temperature probe. \r | |
1843 | ///\r | |
61ce5861 | 1844 | typedef struct {\r |
98cb9ae8 | 1845 | SMBIOS_STRUCTURE Hdr;\r |
1846 | SMBIOS_TABLE_STRING Description;\r | |
1847 | MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r | |
1848 | UINT16 MaximumValue;\r | |
1849 | UINT16 MinimumValue;\r | |
1850 | UINT16 Resolution;\r | |
1851 | UINT16 Tolerance;\r | |
1852 | UINT16 Accuracy;\r | |
1853 | UINT32 OEMDefined;\r | |
1854 | UINT16 NominalValue;\r | |
61ce5861 | 1855 | } SMBIOS_TABLE_TYPE28;\r |
1856 | \r | |
98cb9ae8 | 1857 | ///\r |
af2dc6a7 | 1858 | /// Electrical Current Probe - Location and Status.\r |
98cb9ae8 | 1859 | ///\r |
1860 | typedef struct {\r | |
1861 | UINT8 ElectricalCurrentProbeSite :5;\r | |
1862 | UINT8 ElectricalCurrentProbeStatus :3;\r | |
1863 | } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r | |
1864 | \r | |
4135253b | 1865 | ///\r |
af2dc6a7 | 1866 | /// Electrical Current Probe (Type 29).\r |
4135253b | 1867 | ///\r |
98cb9ae8 | 1868 | /// This structure describes the attributes for an electrical current probe in the system.\r |
1869 | /// Each structure describes a single electrical current probe. \r | |
1870 | ///\r | |
61ce5861 | 1871 | typedef struct {\r |
98cb9ae8 | 1872 | SMBIOS_STRUCTURE Hdr;\r |
1873 | SMBIOS_TABLE_STRING Description;\r | |
1874 | MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r | |
1875 | UINT16 MaximumValue;\r | |
1876 | UINT16 MinimumValue;\r | |
1877 | UINT16 Resolution;\r | |
1878 | UINT16 Tolerance;\r | |
1879 | UINT16 Accuracy;\r | |
1880 | UINT32 OEMDefined;\r | |
1881 | UINT16 NominalValue;\r | |
61ce5861 | 1882 | } SMBIOS_TABLE_TYPE29;\r |
1883 | \r | |
4135253b | 1884 | ///\r |
af2dc6a7 | 1885 | /// Out-of-Band Remote Access (Type 30).\r |
4135253b | 1886 | ///\r |
98cb9ae8 | 1887 | /// This structure describes the attributes and policy settings of a hardware facility \r |
1888 | /// that may be used to gain remote access to a hardware system when the operating system \r | |
1889 | /// is not available due to power-down status, hardware failures, or boot failures. \r | |
1890 | ///\r | |
61ce5861 | 1891 | typedef struct {\r |
1892 | SMBIOS_STRUCTURE Hdr;\r | |
1893 | SMBIOS_TABLE_STRING ManufacturerName;\r | |
1894 | UINT8 Connections;\r | |
1895 | } SMBIOS_TABLE_TYPE30;\r | |
1896 | \r | |
4135253b | 1897 | ///\r |
af2dc6a7 | 1898 | /// Boot Integrity Services (BIS) Entry Point (Type 31).\r |
4135253b | 1899 | ///\r |
98cb9ae8 | 1900 | /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r |
1901 | /// \r | |
61ce5861 | 1902 | typedef struct {\r |
1903 | SMBIOS_STRUCTURE Hdr;\r | |
1904 | UINT8 Checksum;\r | |
1905 | UINT8 Reserved1;\r | |
1906 | UINT16 Reserved2;\r | |
1907 | UINT32 BisEntry16;\r | |
1908 | UINT32 BisEntry32;\r | |
1909 | UINT64 Reserved3;\r | |
1910 | UINT32 Reserved4;\r | |
1911 | } SMBIOS_TABLE_TYPE31;\r | |
1912 | \r | |
98cb9ae8 | 1913 | ///\r |
af2dc6a7 | 1914 | /// System Boot Information - System Boot Status.\r |
98cb9ae8 | 1915 | ///\r |
1916 | typedef enum {\r | |
1917 | BootInformationStatusNoError = 0x00,\r | |
1918 | BootInformationStatusNoBootableMedia = 0x01,\r | |
1919 | BootInformationStatusNormalOSFailedLoading = 0x02,\r | |
1920 | BootInformationStatusFirmwareDetectedFailure = 0x03,\r | |
1921 | BootInformationStatusOSDetectedFailure = 0x04,\r | |
1922 | BootInformationStatusUserRequestedBoot = 0x05,\r | |
1923 | BootInformationStatusSystemSecurityViolation = 0x06,\r | |
1924 | BootInformationStatusPreviousRequestedImage = 0x07,\r | |
1925 | BootInformationStatusWatchdogTimerExpired = 0x08,\r | |
1926 | BootInformationStatusStartReserved = 0x09,\r | |
1927 | BootInformationStatusStartOemSpecific = 0x80,\r | |
1928 | BootInformationStatusStartProductSpecific = 0xC0\r | |
1929 | } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r | |
1930 | \r | |
4135253b | 1931 | ///\r |
af2dc6a7 | 1932 | /// System Boot Information (Type 32).\r |
4135253b | 1933 | ///\r |
98cb9ae8 | 1934 | /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r |
1935 | /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r | |
1936 | /// application via this structure. When used in the PXE environment, for example, \r | |
1937 | /// this code identifies the reason the PXE was initiated and can be used by boot-image \r | |
1f9f8414 | 1938 | /// software to further automate an enterprise's PXE sessions. For example, an enterprise \r |
98cb9ae8 | 1939 | /// could choose to automatically download a hardware-diagnostic image to a client whose \r |
1940 | /// reason code indicated either a firmware- or operating system-detected hardware failure.\r | |
1941 | ///\r | |
61ce5861 | 1942 | typedef struct {\r |
98cb9ae8 | 1943 | SMBIOS_STRUCTURE Hdr;\r |
1944 | UINT8 Reserved[6];\r | |
af2dc6a7 | 1945 | UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r |
61ce5861 | 1946 | } SMBIOS_TABLE_TYPE32;\r |
1947 | \r | |
4135253b | 1948 | ///\r |
af2dc6a7 | 1949 | /// 64-bit Memory Error Information (Type 33).\r |
4135253b | 1950 | ///\r |
98cb9ae8 | 1951 | /// This structure describes an error within a Physical Memory Array, \r |
1952 | /// when the error address is above 4G (0xFFFFFFFF).\r | |
1953 | /// \r | |
61ce5861 | 1954 | typedef struct {\r |
98cb9ae8 | 1955 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1956 | UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r |
1957 | UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r | |
1958 | UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r | |
98cb9ae8 | 1959 | UINT32 VendorSyndrome;\r |
1960 | UINT64 MemoryArrayErrorAddress;\r | |
1961 | UINT64 DeviceErrorAddress;\r | |
1962 | UINT32 ErrorResolution;\r | |
61ce5861 | 1963 | } SMBIOS_TABLE_TYPE33;\r |
1964 | \r | |
98cb9ae8 | 1965 | ///\r |
af2dc6a7 | 1966 | /// Management Device - Type. \r |
98cb9ae8 | 1967 | ///\r |
1968 | typedef enum {\r | |
1969 | ManagementDeviceTypeOther = 0x01,\r | |
1970 | ManagementDeviceTypeUnknown = 0x02,\r | |
1971 | ManagementDeviceTypeLm75 = 0x03,\r | |
1972 | ManagementDeviceTypeLm78 = 0x04,\r | |
1973 | ManagementDeviceTypeLm79 = 0x05,\r | |
1974 | ManagementDeviceTypeLm80 = 0x06,\r | |
1975 | ManagementDeviceTypeLm81 = 0x07,\r | |
1976 | ManagementDeviceTypeAdm9240 = 0x08,\r | |
1977 | ManagementDeviceTypeDs1780 = 0x09,\r | |
1978 | ManagementDeviceTypeMaxim1617 = 0x0A,\r | |
1979 | ManagementDeviceTypeGl518Sm = 0x0B,\r | |
1980 | ManagementDeviceTypeW83781D = 0x0C,\r | |
1981 | ManagementDeviceTypeHt82H791 = 0x0D\r | |
1982 | } MISC_MANAGEMENT_DEVICE_TYPE;\r | |
1983 | \r | |
1984 | ///\r | |
af2dc6a7 | 1985 | /// Management Device - Address Type. \r |
98cb9ae8 | 1986 | ///\r |
1987 | typedef enum {\r | |
1988 | ManagementDeviceAddressTypeOther = 0x01,\r | |
1989 | ManagementDeviceAddressTypeUnknown = 0x02,\r | |
1990 | ManagementDeviceAddressTypeIOPort = 0x03,\r | |
1991 | ManagementDeviceAddressTypeMemory = 0x04,\r | |
1992 | ManagementDeviceAddressTypeSmbus = 0x05\r | |
1993 | } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r | |
1994 | \r | |
4135253b | 1995 | ///\r |
af2dc6a7 | 1996 | /// Management Device (Type 34).\r |
4135253b | 1997 | ///\r |
98cb9ae8 | 1998 | /// The information in this structure defines the attributes of a Management Device. \r |
1999 | /// A Management Device might control one or more fans or voltage, current, or temperature\r | |
2000 | /// probes as defined by one or more Management Device Component structures.\r | |
2001 | ///\r | |
61ce5861 | 2002 | typedef struct {\r |
98cb9ae8 | 2003 | SMBIOS_STRUCTURE Hdr;\r |
2004 | SMBIOS_TABLE_STRING Description;\r | |
af2dc6a7 | 2005 | UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r |
98cb9ae8 | 2006 | UINT32 Address;\r |
af2dc6a7 | 2007 | UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r |
61ce5861 | 2008 | } SMBIOS_TABLE_TYPE34;\r |
2009 | \r | |
4135253b | 2010 | ///\r |
2011 | /// Management Device Component (Type 35)\r | |
2012 | ///\r | |
98cb9ae8 | 2013 | /// This structure associates a cooling device or environmental probe with structures \r |
2014 | /// that define the controlling hardware device and (optionally) the component's thresholds. \r | |
2015 | ///\r | |
61ce5861 | 2016 | typedef struct {\r |
2017 | SMBIOS_STRUCTURE Hdr;\r | |
2018 | SMBIOS_TABLE_STRING Description;\r | |
2019 | UINT16 ManagementDeviceHandle;\r | |
2020 | UINT16 ComponentHandle;\r | |
2021 | UINT16 ThresholdHandle;\r | |
2022 | } SMBIOS_TABLE_TYPE35;\r | |
2023 | \r | |
4135253b | 2024 | ///\r |
af2dc6a7 | 2025 | /// Management Device Threshold Data (Type 36).\r |
4135253b | 2026 | ///\r |
98cb9ae8 | 2027 | /// The information in this structure defines threshold information for \r |
2028 | /// a component (probe or cooling-unit) contained within a Management Device. \r | |
2029 | ///\r | |
61ce5861 | 2030 | typedef struct {\r |
2031 | SMBIOS_STRUCTURE Hdr;\r | |
2032 | UINT16 LowerThresholdNonCritical;\r | |
2033 | UINT16 UpperThresholdNonCritical;\r | |
2034 | UINT16 LowerThresholdCritical;\r | |
2035 | UINT16 UpperThresholdCritical;\r | |
2036 | UINT16 LowerThresholdNonRecoverable;\r | |
2037 | UINT16 UpperThresholdNonRecoverable;\r | |
2038 | } SMBIOS_TABLE_TYPE36;\r | |
2039 | \r | |
bf7ea009 | 2040 | ///\r |
af2dc6a7 | 2041 | /// Memory Channel Entry.\r |
bf7ea009 | 2042 | ///\r |
61ce5861 | 2043 | typedef struct {\r |
2044 | UINT8 DeviceLoad;\r | |
2045 | UINT16 DeviceHandle;\r | |
2046 | } MEMORY_DEVICE;\r | |
2047 | \r | |
98cb9ae8 | 2048 | ///\r |
af2dc6a7 | 2049 | /// Memory Channel - Channel Type.\r |
98cb9ae8 | 2050 | ///\r |
2051 | typedef enum {\r | |
2052 | MemoryChannelTypeOther = 0x01,\r | |
2053 | MemoryChannelTypeUnknown = 0x02,\r | |
2054 | MemoryChannelTypeRambus = 0x03,\r | |
2055 | MemoryChannelTypeSyncLink = 0x04\r | |
2056 | } MEMORY_CHANNEL_TYPE;\r | |
2057 | \r | |
4135253b | 2058 | ///\r |
2059 | /// Memory Channel (Type 37)\r | |
2060 | ///\r | |
98cb9ae8 | 2061 | /// The information in this structure provides the correlation between a Memory Channel\r |
af2dc6a7 | 2062 | /// and its associated Memory Devices. Each device presents one or more loads to the channel. \r |
2063 | /// The sum of all device loads cannot exceed the channel's defined maximum.\r | |
98cb9ae8 | 2064 | ///\r |
61ce5861 | 2065 | typedef struct {\r |
2066 | SMBIOS_STRUCTURE Hdr;\r | |
2067 | UINT8 ChannelType;\r | |
2068 | UINT8 MaximumChannelLoad;\r | |
2069 | UINT8 MemoryDeviceCount;\r | |
2070 | MEMORY_DEVICE MemoryDevice[1];\r | |
2071 | } SMBIOS_TABLE_TYPE37;\r | |
2072 | \r | |
98cb9ae8 | 2073 | ///\r |
2074 | /// IPMI Device Information - BMC Interface Type\r | |
2075 | ///\r | |
2076 | typedef enum {\r | |
2077 | IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r | |
af2dc6a7 | 2078 | IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r |
2079 | IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r | |
2080 | IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r | |
98cb9ae8 | 2081 | IPMIDeviceInfoInterfaceTypeReserved = 0x04\r |
2082 | } BMC_INTERFACE_TYPE;\r | |
2083 | \r | |
4135253b | 2084 | ///\r |
af2dc6a7 | 2085 | /// IPMI Device Information (Type 38).\r |
4135253b | 2086 | ///\r |
7ddba202 | 2087 | /// The information in this structure defines the attributes of an\r |
98cb9ae8 | 2088 | /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r |
7ddba202 SZ |
2089 | ///\r |
2090 | /// The Type 42 structure can also be used to describe a physical management controller\r | |
2091 | /// host interface and one or more protocols that share that interface. If IPMI is not\r | |
2092 | /// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r | |
2093 | /// Providing Type 38 is recommended for backward compatibility.\r | |
2094 | ///\r | |
61ce5861 | 2095 | typedef struct {\r |
2096 | SMBIOS_STRUCTURE Hdr;\r | |
af2dc6a7 | 2097 | UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r |
61ce5861 | 2098 | UINT8 IPMISpecificationRevision;\r |
2099 | UINT8 I2CSlaveAddress;\r | |
2100 | UINT8 NVStorageDeviceAddress;\r | |
2101 | UINT64 BaseAddress;\r | |
2102 | UINT8 BaseAddressModifier_InterruptInfo;\r | |
2103 | UINT8 InterruptNumber;\r | |
2104 | } SMBIOS_TABLE_TYPE38;\r | |
2105 | \r | |
98cb9ae8 | 2106 | ///\r |
af2dc6a7 | 2107 | /// System Power Supply - Power Supply Characteristics.\r |
98cb9ae8 | 2108 | ///\r |
2109 | typedef struct {\r | |
2110 | UINT16 PowerSupplyHotReplaceable:1;\r | |
2111 | UINT16 PowerSupplyPresent :1;\r | |
2112 | UINT16 PowerSupplyUnplugged :1;\r | |
2113 | UINT16 InputVoltageRangeSwitch :4;\r | |
2114 | UINT16 PowerSupplyStatus :3;\r | |
2115 | UINT16 PowerSupplyType :4;\r | |
2116 | UINT16 Reserved :2;\r | |
2117 | } SYS_POWER_SUPPLY_CHARACTERISTICS;\r | |
2118 | \r | |
4135253b | 2119 | ///\r |
af2dc6a7 | 2120 | /// System Power Supply (Type 39).\r |
4135253b | 2121 | ///\r |
7ddba202 SZ |
2122 | /// This structure identifies attributes of a system power supply. One instance\r |
2123 | /// of this record is present for each possible power supply in a system.\r | |
98cb9ae8 | 2124 | ///\r |
61ce5861 | 2125 | typedef struct {\r |
98cb9ae8 | 2126 | SMBIOS_STRUCTURE Hdr;\r |
2127 | UINT8 PowerUnitGroup;\r | |
2128 | SMBIOS_TABLE_STRING Location;\r | |
2129 | SMBIOS_TABLE_STRING DeviceName;\r | |
2130 | SMBIOS_TABLE_STRING Manufacturer;\r | |
2131 | SMBIOS_TABLE_STRING SerialNumber;\r | |
2132 | SMBIOS_TABLE_STRING AssetTagNumber;\r | |
2133 | SMBIOS_TABLE_STRING ModelPartNumber;\r | |
2134 | SMBIOS_TABLE_STRING RevisionLevel;\r | |
2135 | UINT16 MaxPowerCapacity;\r | |
2136 | SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r | |
2137 | UINT16 InputVoltageProbeHandle;\r | |
2138 | UINT16 CoolingDeviceHandle;\r | |
2139 | UINT16 InputCurrentProbeHandle;\r | |
61ce5861 | 2140 | } SMBIOS_TABLE_TYPE39;\r |
2141 | \r | |
bf7ea009 | 2142 | ///\r |
af2dc6a7 | 2143 | /// Additional Information Entry Format. \r |
bf7ea009 | 2144 | ///\r |
61ce5861 | 2145 | typedef struct { \r |
2146 | UINT8 EntryLength; \r | |
2147 | UINT16 ReferencedHandle;\r | |
2148 | UINT8 ReferencedOffset;\r | |
2149 | SMBIOS_TABLE_STRING EntryString;\r | |
2150 | UINT8 Value[1];\r | |
2151 | }ADDITIONAL_INFORMATION_ENTRY;\r | |
2152 | \r | |
4135253b | 2153 | ///\r |
af2dc6a7 | 2154 | /// Additional Information (Type 40).\r |
4135253b | 2155 | ///\r |
98cb9ae8 | 2156 | /// This structure is intended to provide additional information for handling unspecified \r |
2157 | /// enumerated values and interim field updates in another structure. \r | |
2158 | ///\r | |
61ce5861 | 2159 | typedef struct {\r |
2160 | SMBIOS_STRUCTURE Hdr;\r | |
2161 | UINT8 NumberOfAdditionalInformationEntries;\r | |
2162 | ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r | |
2163 | } SMBIOS_TABLE_TYPE40;\r | |
2164 | \r | |
98cb9ae8 | 2165 | ///\r |
af2dc6a7 | 2166 | /// Onboard Devices Extended Information - Onboard Device Types.\r |
98cb9ae8 | 2167 | ///\r |
2168 | typedef enum{\r | |
2169 | OnBoardDeviceExtendedTypeOther = 0x01,\r | |
2170 | OnBoardDeviceExtendedTypeUnknown = 0x02,\r | |
2171 | OnBoardDeviceExtendedTypeVideo = 0x03,\r | |
2172 | OnBoardDeviceExtendedTypeScsiController = 0x04,\r | |
2173 | OnBoardDeviceExtendedTypeEthernet = 0x05,\r | |
2174 | OnBoardDeviceExtendedTypeTokenRing = 0x06,\r | |
2175 | OnBoardDeviceExtendedTypeSound = 0x07,\r | |
2176 | OnBoardDeviceExtendedTypePATAController = 0x08,\r | |
2177 | OnBoardDeviceExtendedTypeSATAController = 0x09,\r | |
2178 | OnBoardDeviceExtendedTypeSASController = 0x0A\r | |
2179 | } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r | |
2180 | \r | |
4135253b | 2181 | ///\r |
af2dc6a7 | 2182 | /// Onboard Devices Extended Information (Type 41).\r |
4135253b | 2183 | ///\r |
98cb9ae8 | 2184 | /// The information in this structure defines the attributes of devices that \r |
2185 | /// are onboard (soldered onto) a system element, usually the baseboard. \r | |
2186 | /// In general, an entry in this table implies that the BIOS has some level of \r | |
2187 | /// control over the enabling of the associated device for use by the system. \r | |
2188 | ///\r | |
61ce5861 | 2189 | typedef struct {\r |
98cb9ae8 | 2190 | SMBIOS_STRUCTURE Hdr;\r |
2191 | SMBIOS_TABLE_STRING ReferenceDesignation;\r | |
af2dc6a7 | 2192 | UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r |
98cb9ae8 | 2193 | UINT8 DeviceTypeInstance;\r |
2194 | UINT16 SegmentGroupNum;\r | |
2195 | UINT8 BusNum;\r | |
7ddba202 | 2196 | UINT8 DevFuncNum;\r |
61ce5861 | 2197 | } SMBIOS_TABLE_TYPE41;\r |
2198 | \r | |
7ddba202 SZ |
2199 | ///\r |
2200 | /// Management Controller Host Interface (Type 42).\r | |
2201 | ///\r | |
2202 | /// The information in this structure defines the attributes of a Management\r | |
2203 | /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r | |
2204 | ///\r | |
2205 | /// Type 42 should be used for management controller host interfaces that use protocols\r | |
2206 | /// other than IPMI or that use multiple protocols on a single host interface type.\r | |
2207 | ///\r | |
2208 | /// This structure should also be provided if IPMI is shared with other protocols\r | |
2209 | /// over the same interface hardware. If IPMI is not shared with other protocols,\r | |
2210 | /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r | |
2211 | /// recommended for backward compatibility. The structures are not required to\r | |
2212 | /// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r | |
2213 | /// simultaneously to provide backward compatibility with IPMI applications or drivers\r | |
2214 | /// that do not yet recognize the Type 42 structure.\r | |
2215 | ///\r | |
2216 | typedef struct {\r | |
2217 | SMBIOS_STRUCTURE Hdr;\r | |
2218 | UINT8 InterfaceType;\r | |
2219 | UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes\r | |
2220 | } SMBIOS_TABLE_TYPE42;\r | |
2221 | \r | |
4135253b | 2222 | ///\r |
2223 | /// Inactive (Type 126)\r | |
2224 | ///\r | |
61ce5861 | 2225 | typedef struct {\r |
2226 | SMBIOS_STRUCTURE Hdr;\r | |
2227 | } SMBIOS_TABLE_TYPE126;\r | |
2228 | \r | |
4135253b | 2229 | ///\r |
2230 | /// End-of-Table (Type 127)\r | |
2231 | ///\r | |
61ce5861 | 2232 | typedef struct {\r |
2233 | SMBIOS_STRUCTURE Hdr;\r | |
2234 | } SMBIOS_TABLE_TYPE127;\r | |
2235 | \r | |
4135253b | 2236 | ///\r |
af2dc6a7 | 2237 | /// Union of all the possible SMBIOS record types.\r |
4135253b | 2238 | ///\r |
61ce5861 | 2239 | typedef union {\r |
2240 | SMBIOS_STRUCTURE *Hdr;\r | |
2241 | SMBIOS_TABLE_TYPE0 *Type0;\r | |
2242 | SMBIOS_TABLE_TYPE1 *Type1;\r | |
2243 | SMBIOS_TABLE_TYPE2 *Type2;\r | |
2244 | SMBIOS_TABLE_TYPE3 *Type3;\r | |
2245 | SMBIOS_TABLE_TYPE4 *Type4;\r | |
2246 | SMBIOS_TABLE_TYPE5 *Type5;\r | |
2247 | SMBIOS_TABLE_TYPE6 *Type6;\r | |
2248 | SMBIOS_TABLE_TYPE7 *Type7;\r | |
2249 | SMBIOS_TABLE_TYPE8 *Type8;\r | |
2250 | SMBIOS_TABLE_TYPE9 *Type9;\r | |
2251 | SMBIOS_TABLE_TYPE10 *Type10;\r | |
2252 | SMBIOS_TABLE_TYPE11 *Type11;\r | |
2253 | SMBIOS_TABLE_TYPE12 *Type12;\r | |
2254 | SMBIOS_TABLE_TYPE13 *Type13;\r | |
2255 | SMBIOS_TABLE_TYPE14 *Type14;\r | |
2256 | SMBIOS_TABLE_TYPE15 *Type15;\r | |
2257 | SMBIOS_TABLE_TYPE16 *Type16;\r | |
2258 | SMBIOS_TABLE_TYPE17 *Type17;\r | |
2259 | SMBIOS_TABLE_TYPE18 *Type18;\r | |
2260 | SMBIOS_TABLE_TYPE19 *Type19;\r | |
2261 | SMBIOS_TABLE_TYPE20 *Type20;\r | |
2262 | SMBIOS_TABLE_TYPE21 *Type21;\r | |
2263 | SMBIOS_TABLE_TYPE22 *Type22;\r | |
2264 | SMBIOS_TABLE_TYPE23 *Type23;\r | |
2265 | SMBIOS_TABLE_TYPE24 *Type24;\r | |
2266 | SMBIOS_TABLE_TYPE25 *Type25;\r | |
2267 | SMBIOS_TABLE_TYPE26 *Type26;\r | |
2268 | SMBIOS_TABLE_TYPE27 *Type27;\r | |
2269 | SMBIOS_TABLE_TYPE28 *Type28;\r | |
2270 | SMBIOS_TABLE_TYPE29 *Type29;\r | |
2271 | SMBIOS_TABLE_TYPE30 *Type30;\r | |
2272 | SMBIOS_TABLE_TYPE31 *Type31;\r | |
2273 | SMBIOS_TABLE_TYPE32 *Type32;\r | |
2274 | SMBIOS_TABLE_TYPE33 *Type33;\r | |
2275 | SMBIOS_TABLE_TYPE34 *Type34;\r | |
2276 | SMBIOS_TABLE_TYPE35 *Type35;\r | |
2277 | SMBIOS_TABLE_TYPE36 *Type36;\r | |
2278 | SMBIOS_TABLE_TYPE37 *Type37;\r | |
2279 | SMBIOS_TABLE_TYPE38 *Type38;\r | |
2280 | SMBIOS_TABLE_TYPE39 *Type39;\r | |
2281 | SMBIOS_TABLE_TYPE40 *Type40;\r | |
2282 | SMBIOS_TABLE_TYPE41 *Type41;\r | |
884f9295 | 2283 | SMBIOS_TABLE_TYPE42 *Type42;\r |
61ce5861 | 2284 | SMBIOS_TABLE_TYPE126 *Type126;\r |
2285 | SMBIOS_TABLE_TYPE127 *Type127;\r | |
2286 | UINT8 *Raw;\r | |
2287 | } SMBIOS_STRUCTURE_POINTER;\r | |
2288 | \r | |
766f4bc1 | 2289 | #pragma pack()\r |
2290 | \r | |
a7ed1e2e | 2291 | #endif\r |