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MdePkg/SmBios.h: Add new defines for SMBIOS record type 43
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / SmBios.h
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a7ed1e2e 1/** @file\r
6cd35c62 2 Industry Standard Definitions of SMBIOS Table Specification v3.0.0.\r
a7ed1e2e 3\r
6cd35c62 4Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
713e4b00 5(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>\r
af2dc6a7 6This program and the accompanying materials are licensed and made available under \r
7the terms and conditions of the BSD License that accompanies this distribution. \r
8The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php. \r
10 \r
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
a7ed1e2e 13\r
a7ed1e2e 14**/\r
15\r
16#ifndef __SMBIOS_STANDARD_H__\r
17#define __SMBIOS_STANDARD_H__\r
98cb9ae8 18\r
f2d0889f 19///\r
20/// Reference SMBIOS 2.6, chapter 3.1.2.\r
21/// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
22/// use by this specification.\r
23///\r
24#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r
25\r
7ddba202
SZ		 26///\r
27/// Reference SMBIOS 2.7, chapter 6.1.2.\r
28/// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r
29/// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r
30/// This number is not used for any other purpose by the SMBIOS specification.\r
31///\r
32#define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r
33\r
f2d0889f 34///\r
af2dc6a7 35/// Reference SMBIOS 2.6, chapter 3.1.3.\r
36/// Each text string is limited to 64 significant characters due to system MIF limitations.\r
7ddba202
SZ		 37/// Reference SMBIOS 2.7, chapter 6.1.3.\r
38/// It will have no limit on the length of each individual text string.\r
f2d0889f 39///\r
40#define SMBIOS_STRING_MAX_LENGTH 64\r
41\r
7254d134
JY		 42//\r
43// The length of the entire structure table (including all strings) must be reported\r
44// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r
45// which is a WORD field limited to 65,535 bytes.\r
46//\r
47#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r
48\r
49//\r
50// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r
51//\r
52#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r
53\r
bb7051eb
MH		 54//\r
55// SMBIOS type macros which is according to SMBIOS 2.7 specification.\r
56//\r
57#define SMBIOS_TYPE_BIOS_INFORMATION 0\r
58#define SMBIOS_TYPE_SYSTEM_INFORMATION 1\r
59#define SMBIOS_TYPE_BASEBOARD_INFORMATION 2\r
60#define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3\r
61#define SMBIOS_TYPE_PROCESSOR_INFORMATION 4\r
62#define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5\r
63#define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6\r
64#define SMBIOS_TYPE_CACHE_INFORMATION 7\r
65#define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8\r
66#define SMBIOS_TYPE_SYSTEM_SLOTS 9\r
67#define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10\r
68#define SMBIOS_TYPE_OEM_STRINGS 11\r
69#define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12\r
70#define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13\r
71#define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14\r
72#define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15\r
73#define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16\r
74#define SMBIOS_TYPE_MEMORY_DEVICE 17\r
75#define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18\r
76#define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19\r
77#define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20\r
78#define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21\r
79#define SMBIOS_TYPE_PORTABLE_BATTERY 22\r
80#define SMBIOS_TYPE_SYSTEM_RESET 23\r
81#define SMBIOS_TYPE_HARDWARE_SECURITY 24\r
82#define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25\r
83#define SMBIOS_TYPE_VOLTAGE_PROBE 26\r
84#define SMBIOS_TYPE_COOLING_DEVICE 27\r
85#define SMBIOS_TYPE_TEMPERATURE_PROBE 28\r
86#define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29\r
87#define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30\r
88#define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31\r
89#define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32\r
90#define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33\r
91#define SMBIOS_TYPE_MANAGEMENT_DEVICE 34\r
92#define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35\r
93#define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36\r
94#define SMBIOS_TYPE_MEMORY_CHANNEL 37\r
95#define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38\r
96#define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39\r
97#define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40\r
98#define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41\r
99#define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42\r
713e4b00 100#define SMBIOS_TYPE_TPM_DEVICE 43\r
bb7051eb 101\r
f2d0889f 102///\r
103/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
104/// Upper-level software that interprets the SMBIOS structure-table should bypass an \r
105/// Inactive structure just like a structure type that the software does not recognize.\r
106///\r
107#define SMBIOS_TYPE_INACTIVE 0x007E \r
108\r
109///\r
110/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r
111/// The end-of-table indicator is used in the last physical structure in a table\r
112///\r
113#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
114\r
bb7051eb
MH		 115#define SMBIOS_OEM_BEGIN 128\r
116#define SMBIOS_OEM_END 255\r
117\r
118///\r
119/// Types 0 through 127 (7Fh) are reserved for and defined by this\r
120/// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information. \r
121///\r
122typedef UINT8 SMBIOS_TYPE;\r
123\r
124///\r
125/// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version\r
126/// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS\r
127/// Structure function to retrieve a specific structure; the handle numbers are not required to be\r
128/// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
129/// use by this specification.\r
130/// If the system configuration changes, a previously assigned handle might no longer exist.\r
131/// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle\r
132/// number to another structure.\r
133///\r
134typedef UINT16 SMBIOS_HANDLE;\r
135\r
4135253b 136///\r
af2dc6a7 137/// Smbios Table Entry Point Structure.\r
4135253b 138///\r
766f4bc1 139#pragma pack(1)\r
a7ed1e2e 140typedef struct {\r
141 UINT8 AnchorString[4];\r
142 UINT8 EntryPointStructureChecksum;\r
143 UINT8 EntryPointLength;\r
144 UINT8 MajorVersion;\r
145 UINT8 MinorVersion;\r
146 UINT16 MaxStructureSize;\r
147 UINT8 EntryPointRevision;\r
148 UINT8 FormattedArea[5];\r
149 UINT8 IntermediateAnchorString[5];\r
150 UINT8 IntermediateChecksum;\r
151 UINT16 TableLength;\r
152 UINT32 TableAddress;\r
153 UINT16 NumberOfSmbiosStructures;\r
154 UINT8 SmbiosBcdRevision;\r
155} SMBIOS_TABLE_ENTRY_POINT;\r
156\r
6cd35c62
EL		 157typedef struct {\r
158 UINT8 AnchorString[5];\r
159 UINT8 EntryPointStructureChecksum;\r
160 UINT8 EntryPointLength;\r
161 UINT8 MajorVersion;\r
162 UINT8 MinorVersion;\r
163 UINT8 DocRev;\r
164 UINT8 EntryPointRevision;\r
165 UINT8 Reserved;\r
166 UINT32 TableMaximumSize;\r
167 UINT64 TableAddress;\r
168} SMBIOS_TABLE_3_0_ENTRY_POINT;\r
169\r
ec8432e5 170///\r
af2dc6a7 171/// The Smbios structure header.\r
ec8432e5 172///\r
a7ed1e2e 173typedef struct {\r
bb7051eb
MH		 174 SMBIOS_TYPE Type;\r
175 UINT8 Length;\r
176 SMBIOS_HANDLE Handle;\r
a7ed1e2e 177} SMBIOS_STRUCTURE;\r
178\r
bf7ea009 179///\r
bb7051eb
MH		 180/// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after\r
181/// the formatted portion of the structure. This method of returning string information eliminates the need for\r
182/// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null\r
183/// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of\r
184/// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's\r
185/// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion\r
186/// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the\r
187/// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string\r
188/// references), the formatted section of the structure is followed by two null (00h) BYTES.\r
bf7ea009 189///\r
61ce5861 190typedef UINT8 SMBIOS_TABLE_STRING;\r
191\r
98cb9ae8 192///\r
7ddba202
SZ		 193/// BIOS Characteristics\r
194/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r
98cb9ae8 195///\r
196typedef struct {\r
af2dc6a7 197 UINT32 Reserved :2; ///< Bits 0-1.\r
7ddba202
SZ		 198 UINT32 Unknown :1;\r
199 UINT32 BiosCharacteristicsNotSupported :1;\r
200 UINT32 IsaIsSupported :1;\r
98cb9ae8 201 UINT32 McaIsSupported :1;\r
202 UINT32 EisaIsSupported :1;\r
203 UINT32 PciIsSupported :1;\r
204 UINT32 PcmciaIsSupported :1;\r
205 UINT32 PlugAndPlayIsSupported :1;\r
206 UINT32 ApmIsSupported :1;\r
207 UINT32 BiosIsUpgradable :1;\r
208 UINT32 BiosShadowingAllowed :1;\r
209 UINT32 VlVesaIsSupported :1;\r
210 UINT32 EscdSupportIsAvailable :1;\r
211 UINT32 BootFromCdIsSupported :1;\r
212 UINT32 SelectableBootIsSupported :1;\r
213 UINT32 RomBiosIsSocketed :1;\r
214 UINT32 BootFromPcmciaIsSupported :1;\r
215 UINT32 EDDSpecificationIsSupported :1;\r
216 UINT32 JapaneseNecFloppyIsSupported :1;\r
217 UINT32 JapaneseToshibaFloppyIsSupported :1;\r
218 UINT32 Floppy525_360IsSupported :1;\r
219 UINT32 Floppy525_12IsSupported :1;\r
220 UINT32 Floppy35_720IsSupported :1;\r
221 UINT32 Floppy35_288IsSupported :1;\r
222 UINT32 PrintScreenIsSupported :1;\r
223 UINT32 Keyboard8042IsSupported :1;\r
224 UINT32 SerialIsSupported :1;\r
225 UINT32 PrinterIsSupported :1;\r
226 UINT32 CgaMonoIsSupported :1;\r
227 UINT32 NecPc98 :1;\r
6800ac83 228 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r
229 ///< and bits 48-63 reserved for System Vendor. \r
98cb9ae8 230} MISC_BIOS_CHARACTERISTICS;\r
231\r
232///\r
7ddba202
SZ		 233/// BIOS Characteristics Extension Byte 1.\r
234/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r
235/// within the BIOS Information structure.\r
98cb9ae8 236///\r
237typedef struct {\r
238 UINT8 AcpiIsSupported :1;\r
7ddba202
SZ		 239 UINT8 UsbLegacyIsSupported :1;\r
240 UINT8 AgpIsSupported :1;\r
119c1688 241 UINT8 I2OBootIsSupported :1;\r
98cb9ae8 242 UINT8 Ls120BootIsSupported :1;\r
243 UINT8 AtapiZipDriveBootIsSupported :1;\r
244 UINT8 Boot1394IsSupported :1;\r
245 UINT8 SmartBatteryIsSupported :1;\r
246} MBCE_BIOS_RESERVED;\r
247\r
248///\r
af2dc6a7 249/// BIOS Characteristics Extension Byte 2.\r
7ddba202 250/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r
98cb9ae8 251/// within the BIOS Information structure.\r
252///\r
253typedef struct {\r
254 UINT8 BiosBootSpecIsSupported :1;\r
7ddba202
SZ		 255 UINT8 FunctionKeyNetworkBootIsSupported :1;\r
256 UINT8 TargetContentDistributionEnabled :1;\r
257 UINT8 UefiSpecificationSupported :1;\r
258 UINT8 VirtualMachineSupported :1;\r
259 UINT8 ExtensionByte2Reserved :3;\r
98cb9ae8 260} MBCE_SYSTEM_RESERVED;\r
261\r
262///\r
af2dc6a7 263/// BIOS Characteristics Extension Bytes.\r
98cb9ae8 264///\r
265typedef struct {\r
266 MBCE_BIOS_RESERVED BiosReserved;\r
267 MBCE_SYSTEM_RESERVED SystemReserved;\r
98cb9ae8 268} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
269\r
4135253b 270///\r
af2dc6a7 271/// BIOS Information (Type 0).\r
4135253b 272///\r
61ce5861 273typedef struct {\r
98cb9ae8 274 SMBIOS_STRUCTURE Hdr;\r
275 SMBIOS_TABLE_STRING Vendor;\r
276 SMBIOS_TABLE_STRING BiosVersion;\r
277 UINT16 BiosSegment;\r
278 SMBIOS_TABLE_STRING BiosReleaseDate;\r
279 UINT8 BiosSize;\r
280 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
281 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
282 UINT8 SystemBiosMajorRelease;\r
283 UINT8 SystemBiosMinorRelease;\r
284 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
285 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
61ce5861 286} SMBIOS_TABLE_TYPE0;\r
287\r
98cb9ae8 288///\r
af2dc6a7 289/// System Wake-up Type.\r
98cb9ae8 290///\r
291typedef enum { \r
292 SystemWakeupTypeReserved = 0x00,\r
293 SystemWakeupTypeOther = 0x01,\r
294 SystemWakeupTypeUnknown = 0x02,\r
295 SystemWakeupTypeApmTimer = 0x03,\r
296 SystemWakeupTypeModemRing = 0x04,\r
297 SystemWakeupTypeLanRemote = 0x05,\r
298 SystemWakeupTypePowerSwitch = 0x06,\r
299 SystemWakeupTypePciPme = 0x07,\r
300 SystemWakeupTypeAcPowerRestored = 0x08\r
301} MISC_SYSTEM_WAKEUP_TYPE;\r
302\r
4135253b 303///\r
af2dc6a7 304/// System Information (Type 1).\r
98cb9ae8 305/// \r
306/// The information in this structure defines attributes of the overall system and is \r
307/// intended to be associated with the Component ID group of the system's MIF.\r
308/// An SMBIOS implementation is associated with a single system instance and contains \r
309/// one and only one System Information (Type 1) structure.\r
4135253b 310///\r
61ce5861 311typedef struct {\r
98cb9ae8 312 SMBIOS_STRUCTURE Hdr;\r
313 SMBIOS_TABLE_STRING Manufacturer;\r
314 SMBIOS_TABLE_STRING ProductName;\r
315 SMBIOS_TABLE_STRING Version;\r
316 SMBIOS_TABLE_STRING SerialNumber;\r
317 GUID Uuid;\r
af2dc6a7 318 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r
98cb9ae8 319 SMBIOS_TABLE_STRING SKUNumber;\r
320 SMBIOS_TABLE_STRING Family;\r
61ce5861 321} SMBIOS_TABLE_TYPE1;\r
322\r
98cb9ae8 323///\r
af2dc6a7 324/// Base Board - Feature Flags. \r
98cb9ae8 325///\r
326typedef struct {\r
327 UINT8 Motherboard :1;\r
328 UINT8 RequiresDaughterCard :1;\r
329 UINT8 Removable :1;\r
330 UINT8 Replaceable :1;\r
331 UINT8 HotSwappable :1;\r
332 UINT8 Reserved :3;\r
333} BASE_BOARD_FEATURE_FLAGS;\r
334\r
335///\r
af2dc6a7 336/// Base Board - Board Type.\r
98cb9ae8 337///\r
338typedef enum { \r
339 BaseBoardTypeUnknown = 0x1,\r
340 BaseBoardTypeOther = 0x2,\r
341 BaseBoardTypeServerBlade = 0x3,\r
342 BaseBoardTypeConnectivitySwitch = 0x4,\r
343 BaseBoardTypeSystemManagementModule = 0x5,\r
344 BaseBoardTypeProcessorModule = 0x6,\r
345 BaseBoardTypeIOModule = 0x7,\r
346 BaseBoardTypeMemoryModule = 0x8,\r
347 BaseBoardTypeDaughterBoard = 0x9,\r
348 BaseBoardTypeMotherBoard = 0xA,\r
349 BaseBoardTypeProcessorMemoryModule = 0xB,\r
350 BaseBoardTypeProcessorIOModule = 0xC,\r
351 BaseBoardTypeInterconnectBoard = 0xD\r
352} BASE_BOARD_TYPE;\r
353\r
4135253b 354///\r
af2dc6a7 355/// Base Board (or Module) Information (Type 2).\r
4135253b 356///\r
1f9f8414 357/// The information in this structure defines attributes of a system baseboard - \r
98cb9ae8 358/// for example a motherboard, planar, or server blade or other standard system module.\r
359///\r
61ce5861 360typedef struct {\r
98cb9ae8 361 SMBIOS_STRUCTURE Hdr;\r
362 SMBIOS_TABLE_STRING Manufacturer;\r
363 SMBIOS_TABLE_STRING ProductName;\r
364 SMBIOS_TABLE_STRING Version;\r
365 SMBIOS_TABLE_STRING SerialNumber;\r
366 SMBIOS_TABLE_STRING AssetTag;\r
367 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
368 SMBIOS_TABLE_STRING LocationInChassis;\r
369 UINT16 ChassisHandle;\r
af2dc6a7 370 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r
98cb9ae8 371 UINT8 NumberOfContainedObjectHandles;\r
372 UINT16 ContainedObjectHandles[1];\r
61ce5861 373} SMBIOS_TABLE_TYPE2;\r
374\r
98cb9ae8 375///\r
376/// System Enclosure or Chassis Types\r
377///\r
378typedef enum { \r
379 MiscChassisTypeOther = 0x01,\r
380 MiscChassisTypeUnknown = 0x02,\r
381 MiscChassisTypeDeskTop = 0x03,\r
382 MiscChassisTypeLowProfileDesktop = 0x04,\r
383 MiscChassisTypePizzaBox = 0x05,\r
384 MiscChassisTypeMiniTower = 0x06,\r
385 MiscChassisTypeTower = 0x07,\r
386 MiscChassisTypePortable = 0x08,\r
387 MiscChassisTypeLapTop = 0x09,\r
388 MiscChassisTypeNotebook = 0x0A,\r
389 MiscChassisTypeHandHeld = 0x0B,\r
390 MiscChassisTypeDockingStation = 0x0C,\r
391 MiscChassisTypeAllInOne = 0x0D,\r
392 MiscChassisTypeSubNotebook = 0x0E,\r
393 MiscChassisTypeSpaceSaving = 0x0F,\r
394 MiscChassisTypeLunchBox = 0x10,\r
395 MiscChassisTypeMainServerChassis = 0x11,\r
396 MiscChassisTypeExpansionChassis = 0x12,\r
397 MiscChassisTypeSubChassis = 0x13,\r
398 MiscChassisTypeBusExpansionChassis = 0x14,\r
399 MiscChassisTypePeripheralChassis = 0x15,\r
400 MiscChassisTypeRaidChassis = 0x16,\r
401 MiscChassisTypeRackMountChassis = 0x17,\r
402 MiscChassisTypeSealedCasePc = 0x18,\r
403 MiscChassisMultiSystemChassis = 0x19,\r
404 MiscChassisCompactPCI = 0x1A,\r
405 MiscChassisAdvancedTCA = 0x1B,\r
406 MiscChassisBlade = 0x1C,\r
6cd35c62
EL		 407 MiscChassisBladeEnclosure = 0x1D,\r
408 MiscChassisTablet = 0x1E,\r
409 MiscChassisConvertible = 0x1F,\r
410 MiscChassisDetachable = 0x20\r
98cb9ae8 411} MISC_CHASSIS_TYPE;\r
412\r
413///\r
af2dc6a7 414/// System Enclosure or Chassis States .\r
98cb9ae8 415///\r
416typedef enum { \r
417 ChassisStateOther = 0x01,\r
418 ChassisStateUnknown = 0x02,\r
419 ChassisStateSafe = 0x03,\r
420 ChassisStateWarning = 0x04,\r
421 ChassisStateCritical = 0x05,\r
422 ChassisStateNonRecoverable = 0x06\r
423} MISC_CHASSIS_STATE;\r
424\r
425///\r
af2dc6a7 426/// System Enclosure or Chassis Security Status.\r
98cb9ae8 427///\r
428typedef enum { \r
429 ChassisSecurityStatusOther = 0x01,\r
430 ChassisSecurityStatusUnknown = 0x02,\r
431 ChassisSecurityStatusNone = 0x03,\r
432 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
433 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
434} MISC_CHASSIS_SECURITY_STATE;\r
435\r
bf7ea009 436///\r
437/// Contained Element record\r
438///\r
61ce5861 439typedef struct {\r
440 UINT8 ContainedElementType;\r
441 UINT8 ContainedElementMinimum;\r
442 UINT8 ContainedElementMaximum;\r
443} CONTAINED_ELEMENT;\r
444\r
98cb9ae8 445\r
4135253b 446///\r
af2dc6a7 447/// System Enclosure or Chassis (Type 3).\r
4135253b 448///\r
98cb9ae8 449/// The information in this structure defines attributes of the system's mechanical enclosure(s). \r
450/// For example, if a system included a separate enclosure for its peripheral devices, \r
451/// two structures would be returned: one for the main, system enclosure and the second for\r
452/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
453/// support the population of the CIM_Chassis class. \r
454///\r
61ce5861 455typedef struct {\r
98cb9ae8 456 SMBIOS_STRUCTURE Hdr;\r
457 SMBIOS_TABLE_STRING Manufacturer;\r
458 UINT8 Type;\r
459 SMBIOS_TABLE_STRING Version;\r
460 SMBIOS_TABLE_STRING SerialNumber;\r
461 SMBIOS_TABLE_STRING AssetTag;\r
af2dc6a7 462 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
463 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
464 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
465 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r
98cb9ae8 466 UINT8 OemDefined[4];\r
467 UINT8 Height;\r
468 UINT8 NumberofPowerCords;\r
469 UINT8 ContainedElementCount;\r
470 UINT8 ContainedElementRecordLength;\r
471 CONTAINED_ELEMENT ContainedElements[1];\r
61ce5861 472} SMBIOS_TABLE_TYPE3;\r
473\r
98cb9ae8 474///\r
af2dc6a7 475/// Processor Information - Processor Type.\r
98cb9ae8 476///\r
477typedef enum {\r
478 ProcessorOther = 0x01,\r
479 ProcessorUnknown = 0x02,\r
480 CentralProcessor = 0x03,\r
481 MathProcessor = 0x04,\r
482 DspProcessor = 0x05,\r
483 VideoProcessor = 0x06\r
484} PROCESSOR_TYPE_DATA;\r
485\r
486///\r
af2dc6a7 487/// Processor Information - Processor Family.\r
98cb9ae8 488///\r
489typedef enum {\r
490 ProcessorFamilyOther = 0x01, \r
491 ProcessorFamilyUnknown = 0x02,\r
492 ProcessorFamily8086 = 0x03, \r
493 ProcessorFamily80286 = 0x04,\r
494 ProcessorFamilyIntel386 = 0x05, \r
495 ProcessorFamilyIntel486 = 0x06,\r
496 ProcessorFamily8087 = 0x07,\r
497 ProcessorFamily80287 = 0x08,\r
498 ProcessorFamily80387 = 0x09, \r
499 ProcessorFamily80487 = 0x0A,\r
500 ProcessorFamilyPentium = 0x0B, \r
501 ProcessorFamilyPentiumPro = 0x0C,\r
502 ProcessorFamilyPentiumII = 0x0D,\r
503 ProcessorFamilyPentiumMMX = 0x0E,\r
504 ProcessorFamilyCeleron = 0x0F,\r
505 ProcessorFamilyPentiumIIXeon = 0x10,\r
506 ProcessorFamilyPentiumIII = 0x11, \r
507 ProcessorFamilyM1 = 0x12,\r
508 ProcessorFamilyM2 = 0x13,\r
119c1688
SZ		 509 ProcessorFamilyIntelCeleronM = 0x14,\r
510 ProcessorFamilyIntelPentium4Ht = 0x15,\r
98cb9ae8 511 ProcessorFamilyAmdDuron = 0x18,\r
512 ProcessorFamilyK5 = 0x19, \r
513 ProcessorFamilyK6 = 0x1A,\r
514 ProcessorFamilyK6_2 = 0x1B,\r
515 ProcessorFamilyK6_3 = 0x1C,\r
516 ProcessorFamilyAmdAthlon = 0x1D,\r
517 ProcessorFamilyAmd29000 = 0x1E,\r
518 ProcessorFamilyK6_2Plus = 0x1F,\r
519 ProcessorFamilyPowerPC = 0x20,\r
520 ProcessorFamilyPowerPC601 = 0x21,\r
521 ProcessorFamilyPowerPC603 = 0x22,\r
522 ProcessorFamilyPowerPC603Plus = 0x23,\r
523 ProcessorFamilyPowerPC604 = 0x24,\r
524 ProcessorFamilyPowerPC620 = 0x25,\r
525 ProcessorFamilyPowerPCx704 = 0x26,\r
526 ProcessorFamilyPowerPC750 = 0x27,\r
3507ab19 527 ProcessorFamilyIntelCoreDuo = 0x28,\r
528 ProcessorFamilyIntelCoreDuoMobile = 0x29,\r
529 ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r
530 ProcessorFamilyIntelAtom = 0x2B,\r
6cd35c62 531 ProcessorFamilyIntelCoreM = 0x2C,\r
4a228334 532 ProcessorFamilyAlpha = 0x30,\r
98cb9ae8 533 ProcessorFamilyAlpha21064 = 0x31,\r
534 ProcessorFamilyAlpha21066 = 0x32,\r
535 ProcessorFamilyAlpha21164 = 0x33,\r
536 ProcessorFamilyAlpha21164PC = 0x34,\r
537 ProcessorFamilyAlpha21164a = 0x35,\r
538 ProcessorFamilyAlpha21264 = 0x36,\r
539 ProcessorFamilyAlpha21364 = 0x37,\r
7ddba202
SZ		 540 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r
541 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r
542 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r
543 ProcessorFamilyAmdOpteron6100Series = 0x3B,\r
544 ProcessorFamilyAmdOpteron4100Series = 0x3C,\r
545 ProcessorFamilyAmdOpteron6200Series = 0x3D,\r
546 ProcessorFamilyAmdOpteron4200Series = 0x3E,\r
4a228334 547 ProcessorFamilyAmdFxSeries = 0x3F,\r
98cb9ae8 548 ProcessorFamilyMips = 0x40,\r
549 ProcessorFamilyMIPSR4000 = 0x41,\r
550 ProcessorFamilyMIPSR4200 = 0x42,\r
551 ProcessorFamilyMIPSR4400 = 0x43,\r
552 ProcessorFamilyMIPSR4600 = 0x44,\r
553 ProcessorFamilyMIPSR10000 = 0x45,\r
7ddba202
SZ		 554 ProcessorFamilyAmdCSeries = 0x46,\r
555 ProcessorFamilyAmdESeries = 0x47,\r
4a228334 556 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r
7ddba202 557 ProcessorFamilyAmdGSeries = 0x49,\r
4a228334
EL		 558 ProcessorFamilyAmdZSeries = 0x4A,\r
559 ProcessorFamilyAmdRSeries = 0x4B,\r
560 ProcessorFamilyAmdOpteron4300 = 0x4C,\r
561 ProcessorFamilyAmdOpteron6300 = 0x4D,\r
562 ProcessorFamilyAmdOpteron3300 = 0x4E,\r
563 ProcessorFamilyAmdFireProSeries = 0x4F,\r
98cb9ae8 564 ProcessorFamilySparc = 0x50,\r
565 ProcessorFamilySuperSparc = 0x51,\r
566 ProcessorFamilymicroSparcII = 0x52,\r
567 ProcessorFamilymicroSparcIIep = 0x53,\r
568 ProcessorFamilyUltraSparc = 0x54,\r
569 ProcessorFamilyUltraSparcII = 0x55,\r
4a228334 570 ProcessorFamilyUltraSparcIii = 0x56,\r
98cb9ae8 571 ProcessorFamilyUltraSparcIII = 0x57,\r
572 ProcessorFamilyUltraSparcIIIi = 0x58,\r
573 ProcessorFamily68040 = 0x60,\r
574 ProcessorFamily68xxx = 0x61,\r
575 ProcessorFamily68000 = 0x62,\r
576 ProcessorFamily68010 = 0x63,\r
577 ProcessorFamily68020 = 0x64,\r
578 ProcessorFamily68030 = 0x65,\r
6cd35c62
EL		 579 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r
580 ProcessorFamilyAmdOpteronX1000Series = 0x67,\r
581 ProcessorFamilyAmdOpteronX2000Series = 0x68,\r
98cb9ae8 582 ProcessorFamilyHobbit = 0x70,\r
583 ProcessorFamilyCrusoeTM5000 = 0x78,\r
584 ProcessorFamilyCrusoeTM3000 = 0x79,\r
585 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
586 ProcessorFamilyWeitek = 0x80,\r
587 ProcessorFamilyItanium = 0x82,\r
588 ProcessorFamilyAmdAthlon64 = 0x83,\r
589 ProcessorFamilyAmdOpteron = 0x84,\r
590 ProcessorFamilyAmdSempron = 0x85,\r
591 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
592 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
593 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
594 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
3507ab19 595 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r
596 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r
597 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r
598 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r
599 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r
600 ProcessorFamilyAmdAthlonX2DualCore = 0x8F, \r
98cb9ae8 601 ProcessorFamilyPARISC = 0x90,\r
602 ProcessorFamilyPaRisc8500 = 0x91,\r
603 ProcessorFamilyPaRisc8000 = 0x92,\r
604 ProcessorFamilyPaRisc7300LC = 0x93,\r
605 ProcessorFamilyPaRisc7200 = 0x94,\r
606 ProcessorFamilyPaRisc7100LC = 0x95,\r
607 ProcessorFamilyPaRisc7100 = 0x96,\r
608 ProcessorFamilyV30 = 0xA0,\r
3507ab19 609 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r
610 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r
611 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r
612 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r
613 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r
614 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r
615 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r
616 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r
617 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r
618 ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r
619 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r
620 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r
621 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r
622 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r
623 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r
98cb9ae8 624 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
625 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
626 ProcessorFamilyPentium4 = 0xB2,\r
627 ProcessorFamilyIntelXeon = 0xB3,\r
628 ProcessorFamilyAS400 = 0xB4,\r
629 ProcessorFamilyIntelXeonMP = 0xB5,\r
630 ProcessorFamilyAMDAthlonXP = 0xB6,\r
631 ProcessorFamilyAMDAthlonMP = 0xB7,\r
632 ProcessorFamilyIntelItanium2 = 0xB8,\r
633 ProcessorFamilyIntelPentiumM = 0xB9,\r
634 ProcessorFamilyIntelCeleronD = 0xBA,\r
635 ProcessorFamilyIntelPentiumD = 0xBB,\r
636 ProcessorFamilyIntelPentiumEx = 0xBC,\r
4a228334 637 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r
98cb9ae8 638 ProcessorFamilyReserved = 0xBE,\r
639 ProcessorFamilyIntelCore2 = 0xBF,\r
3507ab19 640 ProcessorFamilyIntelCore2Solo = 0xC0,\r
641 ProcessorFamilyIntelCore2Extreme = 0xC1,\r
642 ProcessorFamilyIntelCore2Quad = 0xC2,\r
643 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r
644 ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r
645 ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r
646 ProcessorFamilyIntelCoreI7 = 0xC6,\r
647 ProcessorFamilyDualCoreIntelCeleron = 0xC7, \r
98cb9ae8 648 ProcessorFamilyIBM390 = 0xC8,\r
649 ProcessorFamilyG4 = 0xC9,\r
650 ProcessorFamilyG5 = 0xCA,\r
651 ProcessorFamilyG6 = 0xCB,\r
4a228334 652 ProcessorFamilyzArchitecture = 0xCC,\r
7ddba202
SZ		 653 ProcessorFamilyIntelCoreI5 = 0xCD,\r
654 ProcessorFamilyIntelCoreI3 = 0xCE,\r
98cb9ae8 655 ProcessorFamilyViaC7M = 0xD2,\r
656 ProcessorFamilyViaC7D = 0xD3,\r
657 ProcessorFamilyViaC7 = 0xD4,\r
658 ProcessorFamilyViaEden = 0xD5,\r
3507ab19 659 ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r
660 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r
661 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r
7ddba202 662 ProcessorFamilyViaNano = 0xD9,\r
3507ab19 663 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r
664 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r
665 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r
666 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r
667 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r
7ddba202 668 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r
4a228334
EL		 669 ProcessorFamilyAmdOpteron3000Series = 0xE4,\r
670 ProcessorFamilyAmdSempronII = 0xE5,\r
3507ab19 671 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r
672 ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r
673 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r
674 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r
675 ProcessorFamilyAmdAthlonDualCore = 0xEA,\r
676 ProcessorFamilyAmdSempronSI = 0xEB,\r
7ddba202
SZ		 677 ProcessorFamilyAmdPhenomII = 0xEC,\r
678 ProcessorFamilyAmdAthlonII = 0xED,\r
679 ProcessorFamilySixCoreAmdOpteron = 0xEE,\r
680 ProcessorFamilyAmdSempronM = 0xEF,\r
98cb9ae8 681 ProcessorFamilyi860 = 0xFA,\r
682 ProcessorFamilyi960 = 0xFB,\r
683 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
684 ProcessorFamilyReserved1 = 0xFF\r
685} PROCESSOR_FAMILY_DATA;\r
686\r
f9ed6c93
YL		 687///\r
688/// Processor Information2 - Processor Family2.\r
689///\r
690typedef enum {\r
691 ProcessorFamilySH3 = 0x0104,\r
692 ProcessorFamilySH4 = 0x0105,\r
693 ProcessorFamilyARM = 0x0118,\r
694 ProcessorFamilyStrongARM = 0x0119,\r
695 ProcessorFamily6x86 = 0x012C,\r
696 ProcessorFamilyMediaGX = 0x012D,\r
697 ProcessorFamilyMII = 0x012E,\r
698 ProcessorFamilyWinChip = 0x0140,\r
699 ProcessorFamilyDSP = 0x015E,\r
700 ProcessorFamilyVideoProcessor = 0x01F4\r
701} PROCESSOR_FAMILY2_DATA;\r
702\r
98cb9ae8 703///\r
af2dc6a7 704/// Processor Information - Voltage. \r
98cb9ae8 705///\r
706typedef struct {\r
6800ac83 707 UINT8 ProcessorVoltageCapability5V :1; \r
708 UINT8 ProcessorVoltageCapability3_3V :1; \r
709 UINT8 ProcessorVoltageCapability2_9V :1; \r
710 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
711 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
712 UINT8 ProcessorVoltageIndicateLegacy :1;\r
98cb9ae8 713} PROCESSOR_VOLTAGE;\r
714\r
715///\r
af2dc6a7 716/// Processor Information - Processor Upgrade.\r
98cb9ae8 717///\r
718typedef enum {\r
719 ProcessorUpgradeOther = 0x01,\r
720 ProcessorUpgradeUnknown = 0x02,\r
721 ProcessorUpgradeDaughterBoard = 0x03,\r
722 ProcessorUpgradeZIFSocket = 0x04,\r
af2dc6a7 723 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r
98cb9ae8 724 ProcessorUpgradeNone = 0x06,\r
725 ProcessorUpgradeLIFSocket = 0x07,\r
726 ProcessorUpgradeSlot1 = 0x08,\r
727 ProcessorUpgradeSlot2 = 0x09,\r
728 ProcessorUpgrade370PinSocket = 0x0A,\r
729 ProcessorUpgradeSlotA = 0x0B,\r
730 ProcessorUpgradeSlotM = 0x0C,\r
731 ProcessorUpgradeSocket423 = 0x0D,\r
af2dc6a7 732 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r
98cb9ae8 733 ProcessorUpgradeSocket478 = 0x0F,\r
734 ProcessorUpgradeSocket754 = 0x10,\r
735 ProcessorUpgradeSocket940 = 0x11,\r
736 ProcessorUpgradeSocket939 = 0x12,\r
737 ProcessorUpgradeSocketmPGA604 = 0x13,\r
738 ProcessorUpgradeSocketLGA771 = 0x14,\r
739 ProcessorUpgradeSocketLGA775 = 0x15,\r
740 ProcessorUpgradeSocketS1 = 0x16,\r
741 ProcessorUpgradeAM2 = 0x17,\r
3507ab19 742 ProcessorUpgradeF1207 = 0x18,\r
7ddba202
SZ		 743 ProcessorSocketLGA1366 = 0x19,\r
744 ProcessorUpgradeSocketG34 = 0x1A,\r
745 ProcessorUpgradeSocketAM3 = 0x1B,\r
746 ProcessorUpgradeSocketC32 = 0x1C,\r
747 ProcessorUpgradeSocketLGA1156 = 0x1D,\r
748 ProcessorUpgradeSocketLGA1567 = 0x1E,\r
749 ProcessorUpgradeSocketPGA988A = 0x1F,\r
750 ProcessorUpgradeSocketBGA1288 = 0x20,\r
751 ProcessorUpgradeSocketrPGA988B = 0x21,\r
752 ProcessorUpgradeSocketBGA1023 = 0x22,\r
753 ProcessorUpgradeSocketBGA1224 = 0x23,\r
4a228334 754 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r
7ddba202
SZ		 755 ProcessorUpgradeSocketLGA1356 = 0x25,\r
756 ProcessorUpgradeSocketLGA2011 = 0x26,\r
757 ProcessorUpgradeSocketFS1 = 0x27,\r
758 ProcessorUpgradeSocketFS2 = 0x28,\r
759 ProcessorUpgradeSocketFM1 = 0x29,\r
4a228334
EL		 760 ProcessorUpgradeSocketFM2 = 0x2A,\r
761 ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r
6cd35c62
EL		 762 ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r
763 ProcessorUpgradeSocketLGA1150 = 0x2D,\r
764 ProcessorUpgradeSocketBGA1168 = 0x2E,\r
765 ProcessorUpgradeSocketBGA1234 = 0x2F,\r
766 ProcessorUpgradeSocketBGA1364 = 0x30\r
98cb9ae8 767} PROCESSOR_UPGRADE;\r
768\r
769///\r
770/// Processor ID Field Description\r
771///\r
772typedef struct {\r
773 UINT32 ProcessorSteppingId:4;\r
774 UINT32 ProcessorModel: 4;\r
775 UINT32 ProcessorFamily: 4;\r
776 UINT32 ProcessorType: 2;\r
777 UINT32 ProcessorReserved1: 2;\r
778 UINT32 ProcessorXModel: 4;\r
779 UINT32 ProcessorXFamily: 8;\r
780 UINT32 ProcessorReserved2: 4;\r
781} PROCESSOR_SIGNATURE;\r
782\r
98cb9ae8 783typedef struct {\r
784 UINT32 ProcessorFpu :1;\r
785 UINT32 ProcessorVme :1;\r
786 UINT32 ProcessorDe :1;\r
787 UINT32 ProcessorPse :1;\r
788 UINT32 ProcessorTsc :1;\r
789 UINT32 ProcessorMsr :1;\r
790 UINT32 ProcessorPae :1;\r
791 UINT32 ProcessorMce :1;\r
792 UINT32 ProcessorCx8 :1;\r
793 UINT32 ProcessorApic :1;\r
794 UINT32 ProcessorReserved1 :1;\r
795 UINT32 ProcessorSep :1;\r
796 UINT32 ProcessorMtrr :1;\r
797 UINT32 ProcessorPge :1;\r
798 UINT32 ProcessorMca :1;\r
799 UINT32 ProcessorCmov :1;\r
800 UINT32 ProcessorPat :1;\r
801 UINT32 ProcessorPse36 :1;\r
802 UINT32 ProcessorPsn :1;\r
803 UINT32 ProcessorClfsh :1;\r
804 UINT32 ProcessorReserved2 :1;\r
805 UINT32 ProcessorDs :1;\r
806 UINT32 ProcessorAcpi :1;\r
807 UINT32 ProcessorMmx :1;\r
808 UINT32 ProcessorFxsr :1;\r
809 UINT32 ProcessorSse :1;\r
810 UINT32 ProcessorSse2 :1;\r
811 UINT32 ProcessorSs :1;\r
812 UINT32 ProcessorReserved3 :1;\r
813 UINT32 ProcessorTm :1;\r
814 UINT32 ProcessorReserved4 :2;\r
815} PROCESSOR_FEATURE_FLAGS;\r
816\r
817typedef struct {\r
818 PROCESSOR_SIGNATURE Signature;\r
98cb9ae8 819 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
6800ac83 820} PROCESSOR_ID_DATA;\r
98cb9ae8 821\r
4135253b 822///\r
af2dc6a7 823/// Processor Information (Type 4).\r
4135253b 824///\r
98cb9ae8 825/// The information in this structure defines the attributes of a single processor; \r
826/// a separate structure instance is provided for each system processor socket/slot. \r
827/// For example, a system with an IntelDX2 processor would have a single \r
af2dc6a7 828/// structure instance, while a system with an IntelSX2 processor would have a structure\r
829/// to describe the main CPU, and a second structure to describe the 80487 co-processor. \r
98cb9ae8 830///\r
61ce5861 831typedef struct { \r
832 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 833 SMBIOS_TABLE_STRING Socket;\r
af2dc6a7 834 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
835 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r
61ce5861 836 SMBIOS_TABLE_STRING ProcessorManufacture;\r
98cb9ae8 837 PROCESSOR_ID_DATA ProcessorId;\r
61ce5861 838 SMBIOS_TABLE_STRING ProcessorVersion;\r
98cb9ae8 839 PROCESSOR_VOLTAGE Voltage;\r
61ce5861 840 UINT16 ExternalClock;\r
841 UINT16 MaxSpeed;\r
842 UINT16 CurrentSpeed;\r
843 UINT8 Status;\r
af2dc6a7 844 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r
61ce5861 845 UINT16 L1CacheHandle;\r
846 UINT16 L2CacheHandle;\r
847 UINT16 L3CacheHandle;\r
848 SMBIOS_TABLE_STRING SerialNumber;\r
849 SMBIOS_TABLE_STRING AssetTag;\r
850 SMBIOS_TABLE_STRING PartNumber;\r
851 //\r
852 // Add for smbios 2.5\r
853 //\r
854 UINT8 CoreCount;\r
855 UINT8 EnabledCoreCount;\r
856 UINT8 ThreadCount;\r
857 UINT16 ProcessorCharacteristics;\r
858 //\r
859 // Add for smbios 2.6\r
860 //\r
861 UINT16 ProcessorFamily2;\r
6cd35c62
EL		 862 //\r
863 // Add for smbios 3.0\r
864 //\r
865 UINT16 CoreCount2;\r
866 UINT16 EnabledCoreCount2;\r
867 UINT16 ThreadCount2;\r
61ce5861 868} SMBIOS_TABLE_TYPE4;\r
869\r
98cb9ae8 870///\r
af2dc6a7 871/// Memory Controller Error Detecting Method.\r
98cb9ae8 872///\r
873typedef enum { \r
874 ErrorDetectingMethodOther = 0x01,\r
875 ErrorDetectingMethodUnknown = 0x02,\r
876 ErrorDetectingMethodNone = 0x03,\r
877 ErrorDetectingMethodParity = 0x04,\r
878 ErrorDetectingMethod32Ecc = 0x05,\r
879 ErrorDetectingMethod64Ecc = 0x06,\r
880 ErrorDetectingMethod128Ecc = 0x07,\r
881 ErrorDetectingMethodCrc = 0x08\r
882} MEMORY_ERROR_DETECT_METHOD;\r
883\r
884///\r
af2dc6a7 885/// Memory Controller Error Correcting Capability.\r
98cb9ae8 886///\r
887typedef struct {\r
888 UINT8 Other :1;\r
889 UINT8 Unknown :1;\r
890 UINT8 None :1;\r
891 UINT8 SingleBitErrorCorrect :1;\r
892 UINT8 DoubleBitErrorCorrect :1;\r
893 UINT8 ErrorScrubbing :1;\r
894 UINT8 Reserved :2;\r
895} MEMORY_ERROR_CORRECT_CAPABILITY;\r
896\r
897///\r
af2dc6a7 898/// Memory Controller Information - Interleave Support.\r
98cb9ae8 899///\r
900typedef enum { \r
901 MemoryInterleaveOther = 0x01,\r
902 MemoryInterleaveUnknown = 0x02,\r
903 MemoryInterleaveOneWay = 0x03,\r
904 MemoryInterleaveTwoWay = 0x04,\r
905 MemoryInterleaveFourWay = 0x05,\r
906 MemoryInterleaveEightWay = 0x06,\r
907 MemoryInterleaveSixteenWay = 0x07\r
908} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
909\r
910///\r
af2dc6a7 911/// Memory Controller Information - Memory Speeds.\r
98cb9ae8 912///\r
913typedef struct {\r
914 UINT16 Other :1;\r
915 UINT16 Unknown :1;\r
916 UINT16 SeventyNs:1;\r
917 UINT16 SixtyNs :1;\r
918 UINT16 FiftyNs :1;\r
919 UINT16 Reserved :11;\r
920} MEMORY_SPEED_TYPE;\r
921\r
4135253b 922///\r
af2dc6a7 923/// Memory Controller Information (Type 5, Obsolete).\r
4135253b 924///\r
98cb9ae8 925/// The information in this structure defines the attributes of the system's memory controller(s) \r
926/// and the supported attributes of any memory-modules present in the sockets controlled by \r
927/// this controller. \r
928/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r
af2dc6a7 929/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 930/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
931/// choose to implement both memory description types to allow existing DMI browsers\r
932/// to properly display the system's memory attributes.\r
933///\r
61ce5861 934typedef struct {\r
98cb9ae8 935 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 936 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r
98cb9ae8 937 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
af2dc6a7 938 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r
939 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE . \r
98cb9ae8 940 UINT8 MaxMemoryModuleSize;\r
941 MEMORY_SPEED_TYPE SupportSpeed;\r
942 UINT16 SupportMemoryType;\r
943 UINT8 MemoryModuleVoltage;\r
944 UINT8 AssociatedMemorySlotNum;\r
945 UINT16 MemoryModuleConfigHandles[1];\r
61ce5861 946} SMBIOS_TABLE_TYPE5;\r
947\r
98cb9ae8 948///\r
949/// Memory Module Information - Memory Types\r
950///\r
951typedef struct {\r
952 UINT16 Other :1;\r
953 UINT16 Unknown :1;\r
954 UINT16 Standard :1;\r
955 UINT16 FastPageMode:1;\r
b4ab47ec 956 UINT16 Edo :1;\r
98cb9ae8 957 UINT16 Parity :1;\r
b4ab47ec 958 UINT16 Ecc :1;\r
959 UINT16 Simm :1;\r
960 UINT16 Dimm :1;\r
98cb9ae8 961 UINT16 BurstEdo :1;\r
b4ab47ec 962 UINT16 Sdram :1;\r
98cb9ae8 963 UINT16 Reserved :5;\r
964} MEMORY_CURRENT_TYPE;\r
965\r
966///\r
af2dc6a7 967/// Memory Module Information - Memory Size.\r
98cb9ae8 968///\r
969typedef struct {\r
6800ac83 970 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r
98cb9ae8 971 UINT8 SingleOrDoubleBank :1;\r
972} MEMORY_INSTALLED_ENABLED_SIZE;\r
973\r
4135253b 974///\r
975/// Memory Module Information (Type 6, Obsolete)\r
976///\r
98cb9ae8 977/// One Memory Module Information structure is included for each memory-module socket \r
978/// in the system. The structure describes the speed, type, size, and error status\r
979/// of each system memory module. The supported attributes of each module are described \r
980/// by the "owning" Memory Controller Information structure. \r
981/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r
af2dc6a7 982/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 983/// and Memory Device (Type 17) structures should be used instead.\r
984///\r
61ce5861 985typedef struct {\r
98cb9ae8 986 SMBIOS_STRUCTURE Hdr;\r
987 SMBIOS_TABLE_STRING SocketDesignation;\r
988 UINT8 BankConnections;\r
989 UINT8 CurrentSpeed;\r
990 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
991 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
992 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
993 UINT8 ErrorStatus;\r
61ce5861 994} SMBIOS_TABLE_TYPE6;\r
995\r
98cb9ae8 996///\r
af2dc6a7 997/// Cache Information - SRAM Type.\r
98cb9ae8 998///\r
999typedef struct {\r
1000 UINT16 Other :1;\r
1001 UINT16 Unknown :1;\r
1002 UINT16 NonBurst :1;\r
1003 UINT16 Burst :1;\r
1004 UINT16 PipelineBurst :1;\r
98cb9ae8 1005 UINT16 Synchronous :1;\r
53d90f04 1006 UINT16 Asynchronous :1;\r
98cb9ae8 1007 UINT16 Reserved :9;\r
1008} CACHE_SRAM_TYPE_DATA;\r
1009\r
1010///\r
af2dc6a7 1011/// Cache Information - Error Correction Type.\r
98cb9ae8 1012///\r
1013typedef enum {\r
1014 CacheErrorOther = 0x01,\r
1015 CacheErrorUnknown = 0x02,\r
1016 CacheErrorNone = 0x03,\r
1017 CacheErrorParity = 0x04,\r
6800ac83 1018 CacheErrorSingleBit = 0x05, ///< ECC\r
1019 CacheErrorMultiBit = 0x06 ///< ECC\r
98cb9ae8 1020} CACHE_ERROR_TYPE_DATA;\r
1021\r
1022///\r
af2dc6a7 1023/// Cache Information - System Cache Type. \r
98cb9ae8 1024///\r
1025typedef enum {\r
1026 CacheTypeOther = 0x01,\r
1027 CacheTypeUnknown = 0x02,\r
1028 CacheTypeInstruction = 0x03,\r
1029 CacheTypeData = 0x04,\r
1030 CacheTypeUnified = 0x05\r
1031} CACHE_TYPE_DATA;\r
1032\r
1033///\r
af2dc6a7 1034/// Cache Information - Associativity. \r
98cb9ae8 1035///\r
1036typedef enum {\r
1037 CacheAssociativityOther = 0x01,\r
1038 CacheAssociativityUnknown = 0x02,\r
1039 CacheAssociativityDirectMapped = 0x03,\r
1040 CacheAssociativity2Way = 0x04,\r
1041 CacheAssociativity4Way = 0x05,\r
1042 CacheAssociativityFully = 0x06,\r
1043 CacheAssociativity8Way = 0x07,\r
1044 CacheAssociativity16Way = 0x08,\r
3507ab19 1045 CacheAssociativity12Way = 0x09,\r
1046 CacheAssociativity24Way = 0x0A,\r
1047 CacheAssociativity32Way = 0x0B,\r
1048 CacheAssociativity48Way = 0x0C,\r
7ddba202
SZ		 1049 CacheAssociativity64Way = 0x0D,\r
1050 CacheAssociativity20Way = 0x0E\r
98cb9ae8 1051} CACHE_ASSOCIATIVITY_DATA;\r
1052\r
4135253b 1053///\r
af2dc6a7 1054/// Cache Information (Type 7).\r
4135253b 1055///\r
af2dc6a7 1056/// The information in this structure defines the attributes of CPU cache device in the system. \r
98cb9ae8 1057/// One structure is specified for each such device, whether the device is internal to\r
1058/// or external to the CPU module. Cache modules can be associated with a processor structure\r
af2dc6a7 1059/// in one or two ways, depending on the SMBIOS version.\r
98cb9ae8 1060///\r
61ce5861 1061typedef struct {\r
98cb9ae8 1062 SMBIOS_STRUCTURE Hdr;\r
1063 SMBIOS_TABLE_STRING SocketDesignation;\r
1064 UINT16 CacheConfiguration;\r
1065 UINT16 MaximumCacheSize;\r
1066 UINT16 InstalledSize;\r
1067 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
1068 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
1069 UINT8 CacheSpeed;\r
af2dc6a7 1070 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r
1071 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r
1072 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r
61ce5861 1073} SMBIOS_TABLE_TYPE7;\r
1074\r
98cb9ae8 1075///\r
af2dc6a7 1076/// Port Connector Information - Connector Types. \r
98cb9ae8 1077///\r
1078typedef enum {\r
1079 PortConnectorTypeNone = 0x00,\r
1080 PortConnectorTypeCentronics = 0x01,\r
1081 PortConnectorTypeMiniCentronics = 0x02,\r
1082 PortConnectorTypeProprietary = 0x03,\r
1083 PortConnectorTypeDB25Male = 0x04,\r
1084 PortConnectorTypeDB25Female = 0x05,\r
1085 PortConnectorTypeDB15Male = 0x06,\r
1086 PortConnectorTypeDB15Female = 0x07,\r
1087 PortConnectorTypeDB9Male = 0x08,\r
1088 PortConnectorTypeDB9Female = 0x09,\r
1089 PortConnectorTypeRJ11 = 0x0A,\r
1090 PortConnectorTypeRJ45 = 0x0B,\r
1091 PortConnectorType50PinMiniScsi = 0x0C,\r
1092 PortConnectorTypeMiniDin = 0x0D,\r
119c1688 1093 PortConnectorTypeMicroDin = 0x0E,\r
98cb9ae8 1094 PortConnectorTypePS2 = 0x0F,\r
1095 PortConnectorTypeInfrared = 0x10,\r
1096 PortConnectorTypeHpHil = 0x11,\r
1097 PortConnectorTypeUsb = 0x12,\r
1098 PortConnectorTypeSsaScsi = 0x13,\r
1099 PortConnectorTypeCircularDin8Male = 0x14,\r
1100 PortConnectorTypeCircularDin8Female = 0x15,\r
1101 PortConnectorTypeOnboardIde = 0x16,\r
1102 PortConnectorTypeOnboardFloppy = 0x17,\r
1103 PortConnectorType9PinDualInline = 0x18,\r
1104 PortConnectorType25PinDualInline = 0x19,\r
1105 PortConnectorType50PinDualInline = 0x1A,\r
1106 PortConnectorType68PinDualInline = 0x1B,\r
1107 PortConnectorTypeOnboardSoundInput = 0x1C,\r
1108 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
1109 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
1110 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
1111 PortConnectorTypeBNC = 0x20,\r
1112 PortConnectorType1394 = 0x21,\r
119c1688 1113 PortConnectorTypeSasSata = 0x22,\r
98cb9ae8 1114 PortConnectorTypePC98 = 0xA0,\r
1115 PortConnectorTypePC98Hireso = 0xA1,\r
1116 PortConnectorTypePCH98 = 0xA2,\r
1117 PortConnectorTypePC98Note = 0xA3,\r
1118 PortConnectorTypePC98Full = 0xA4,\r
1119 PortConnectorTypeOther = 0xFF\r
1120} MISC_PORT_CONNECTOR_TYPE;\r
1121\r
1122///\r
1123/// Port Connector Information - Port Types \r
1124///\r
1125typedef enum {\r
1126 PortTypeNone = 0x00,\r
1127 PortTypeParallelXtAtCompatible = 0x01,\r
1128 PortTypeParallelPortPs2 = 0x02,\r
1129 PortTypeParallelPortEcp = 0x03,\r
1130 PortTypeParallelPortEpp = 0x04,\r
1131 PortTypeParallelPortEcpEpp = 0x05,\r
1132 PortTypeSerialXtAtCompatible = 0x06,\r
1133 PortTypeSerial16450Compatible = 0x07,\r
1134 PortTypeSerial16550Compatible = 0x08,\r
1135 PortTypeSerial16550ACompatible = 0x09,\r
1136 PortTypeScsi = 0x0A,\r
1137 PortTypeMidi = 0x0B,\r
1138 PortTypeJoyStick = 0x0C,\r
1139 PortTypeKeyboard = 0x0D,\r
1140 PortTypeMouse = 0x0E,\r
1141 PortTypeSsaScsi = 0x0F,\r
1142 PortTypeUsb = 0x10,\r
1143 PortTypeFireWire = 0x11,\r
1144 PortTypePcmciaTypeI = 0x12,\r
1145 PortTypePcmciaTypeII = 0x13,\r
1146 PortTypePcmciaTypeIII = 0x14,\r
1147 PortTypeCardBus = 0x15,\r
1148 PortTypeAccessBusPort = 0x16,\r
1149 PortTypeScsiII = 0x17,\r
1150 PortTypeScsiWide = 0x18,\r
1151 PortTypePC98 = 0x19,\r
1152 PortTypePC98Hireso = 0x1A,\r
1153 PortTypePCH98 = 0x1B,\r
1154 PortTypeVideoPort = 0x1C,\r
1155 PortTypeAudioPort = 0x1D,\r
1156 PortTypeModemPort = 0x1E,\r
1157 PortTypeNetworkPort = 0x1F,\r
23df19a7
SEHM		 1158 PortTypeSata = 0x20,\r
1159 PortTypeSas = 0x21,\r
98cb9ae8 1160 PortType8251Compatible = 0xA0,\r
1161 PortType8251FifoCompatible = 0xA1,\r
1162 PortTypeOther = 0xFF\r
1163} MISC_PORT_TYPE;\r
1164\r
4135253b 1165///\r
af2dc6a7 1166/// Port Connector Information (Type 8).\r
4135253b 1167///\r
98cb9ae8 1168/// The information in this structure defines the attributes of a system port connector, \r
1f9f8414 1169/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r
98cb9ae8 1170/// are provided. One structure is present for each port provided by the system.\r
1171///\r
61ce5861 1172typedef struct {\r
98cb9ae8 1173 SMBIOS_STRUCTURE Hdr;\r
1174 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
af2dc6a7 1175 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
98cb9ae8 1176 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
af2dc6a7 1177 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
1178 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r
61ce5861 1179} SMBIOS_TABLE_TYPE8;\r
1180\r
98cb9ae8 1181///\r
1182/// System Slots - Slot Type\r
1183///\r
1184typedef enum {\r
1185 SlotTypeOther = 0x01,\r
1186 SlotTypeUnknown = 0x02,\r
1187 SlotTypeIsa = 0x03,\r
1188 SlotTypeMca = 0x04,\r
1189 SlotTypeEisa = 0x05,\r
1190 SlotTypePci = 0x06,\r
1191 SlotTypePcmcia = 0x07,\r
1192 SlotTypeVlVesa = 0x08,\r
1193 SlotTypeProprietary = 0x09,\r
1194 SlotTypeProcessorCardSlot = 0x0A,\r
1195 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
1196 SlotTypeIORiserCardSlot = 0x0C,\r
1197 SlotTypeNuBus = 0x0D,\r
1198 SlotTypePci66MhzCapable = 0x0E,\r
1199 SlotTypeAgp = 0x0F,\r
1200 SlotTypeApg2X = 0x10,\r
1201 SlotTypeAgp4X = 0x11,\r
1202 SlotTypePciX = 0x12,\r
0c8cd067 1203 SlotTypeAgp8X = 0x13,\r
6cd35c62
EL		 1204 SlotTypeM2Socket1_DP = 0x14,\r
1205 SlotTypeM2Socket1_SD = 0x15,\r
1206 SlotTypeM2Socket2 = 0x16,\r
1207 SlotTypeM2Socket3 = 0x17,\r
1208 SlotTypeMxmTypeI = 0x18,\r
1209 SlotTypeMxmTypeII = 0x19,\r
1210 SlotTypeMxmTypeIIIStandard = 0x1A,\r
1211 SlotTypeMxmTypeIIIHe = 0x1B,\r
1212 SlotTypeMxmTypeIV = 0x1C,\r
1213 SlotTypeMxm30TypeA = 0x1D,\r
1214 SlotTypeMxm30TypeB = 0x1E,\r
1215 SlotTypePciExpressGen2Sff_8639 = 0x1F,\r
1216 SlotTypePciExpressGen3Sff_8639 = 0x20,\r
98cb9ae8 1217 SlotTypePC98C20 = 0xA0,\r
1218 SlotTypePC98C24 = 0xA1,\r
1219 SlotTypePC98E = 0xA2,\r
1220 SlotTypePC98LocalBus = 0xA3,\r
1221 SlotTypePC98Card = 0xA4,\r
1222 SlotTypePciExpress = 0xA5,\r
1223 SlotTypePciExpressX1 = 0xA6,\r
1224 SlotTypePciExpressX2 = 0xA7,\r
1225 SlotTypePciExpressX4 = 0xA8,\r
1226 SlotTypePciExpressX8 = 0xA9,\r
3507ab19 1227 SlotTypePciExpressX16 = 0xAA,\r
1228 SlotTypePciExpressGen2 = 0xAB,\r
1229 SlotTypePciExpressGen2X1 = 0xAC,\r
1230 SlotTypePciExpressGen2X2 = 0xAD,\r
1231 SlotTypePciExpressGen2X4 = 0xAE,\r
1232 SlotTypePciExpressGen2X8 = 0xAF,\r
7ddba202
SZ		 1233 SlotTypePciExpressGen2X16 = 0xB0,\r
1234 SlotTypePciExpressGen3 = 0xB1,\r
1235 SlotTypePciExpressGen3X1 = 0xB2,\r
1236 SlotTypePciExpressGen3X2 = 0xB3,\r
1237 SlotTypePciExpressGen3X4 = 0xB4,\r
1238 SlotTypePciExpressGen3X8 = 0xB5,\r
1239 SlotTypePciExpressGen3X16 = 0xB6\r
98cb9ae8 1240} MISC_SLOT_TYPE;\r
1241\r
1242///\r
af2dc6a7 1243/// System Slots - Slot Data Bus Width.\r
98cb9ae8 1244///\r
1245typedef enum {\r
1246 SlotDataBusWidthOther = 0x01,\r
1247 SlotDataBusWidthUnknown = 0x02,\r
1248 SlotDataBusWidth8Bit = 0x03,\r
1249 SlotDataBusWidth16Bit = 0x04,\r
1250 SlotDataBusWidth32Bit = 0x05,\r
1251 SlotDataBusWidth64Bit = 0x06,\r
1252 SlotDataBusWidth128Bit = 0x07,\r
6800ac83 1253 SlotDataBusWidth1X = 0x08, ///< Or X1\r
1254 SlotDataBusWidth2X = 0x09, ///< Or X2\r
1255 SlotDataBusWidth4X = 0x0A, ///< Or X4\r
1256 SlotDataBusWidth8X = 0x0B, ///< Or X8\r
1257 SlotDataBusWidth12X = 0x0C, ///< Or X12\r
1258 SlotDataBusWidth16X = 0x0D, ///< Or X16\r
1259 SlotDataBusWidth32X = 0x0E ///< Or X32\r
98cb9ae8 1260} MISC_SLOT_DATA_BUS_WIDTH;\r
1261\r
1262///\r
af2dc6a7 1263/// System Slots - Current Usage.\r
98cb9ae8 1264///\r
1265typedef enum {\r
1266 SlotUsageOther = 0x01,\r
1267 SlotUsageUnknown = 0x02,\r
1268 SlotUsageAvailable = 0x03,\r
1269 SlotUsageInUse = 0x04\r
1270} MISC_SLOT_USAGE;\r
1271\r
1272///\r
af2dc6a7 1273/// System Slots - Slot Length. \r
98cb9ae8 1274///\r
1275typedef enum {\r
1276 SlotLengthOther = 0x01,\r
1277 SlotLengthUnknown = 0x02,\r
1278 SlotLengthShort = 0x03,\r
1279 SlotLengthLong = 0x04\r
1280} MISC_SLOT_LENGTH;\r
1281\r
1282///\r
af2dc6a7 1283/// System Slots - Slot Characteristics 1. \r
98cb9ae8 1284///\r
1285typedef struct {\r
1286 UINT8 CharacteristicsUnknown :1;\r
1287 UINT8 Provides50Volts :1;\r
1288 UINT8 Provides33Volts :1;\r
1289 UINT8 SharedSlot :1;\r
1290 UINT8 PcCard16Supported :1;\r
1291 UINT8 CardBusSupported :1;\r
1292 UINT8 ZoomVideoSupported :1;\r
1293 UINT8 ModemRingResumeSupported:1;\r
1294} MISC_SLOT_CHARACTERISTICS1;\r
1295///\r
af2dc6a7 1296/// System Slots - Slot Characteristics 2. \r
98cb9ae8 1297///\r
1298typedef struct {\r
1299 UINT8 PmeSignalSupported :1;\r
1300 UINT8 HotPlugDevicesSupported :1;\r
1301 UINT8 SmbusSignalSupported :1;\r
6800ac83 1302 UINT8 Reserved :5; ///< Set to 0.\r
98cb9ae8 1303} MISC_SLOT_CHARACTERISTICS2;\r
1304\r
4135253b 1305///\r
1306/// System Slots (Type 9)\r
1307///\r
98cb9ae8 1308/// The information in this structure defines the attributes of a system slot. \r
1309/// One structure is provided for each slot in the system.\r
1310///\r
1311///\r
61ce5861 1312typedef struct {\r
98cb9ae8 1313 SMBIOS_STRUCTURE Hdr;\r
1314 SMBIOS_TABLE_STRING SlotDesignation;\r
af2dc6a7 1315 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
1316 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
1317 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
1318 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
98cb9ae8 1319 UINT16 SlotID;\r
1320 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1321 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
61ce5861 1322 //\r
1323 // Add for smbios 2.6\r
1324 //\r
98cb9ae8 1325 UINT16 SegmentGroupNum;\r
1326 UINT8 BusNum;\r
1327 UINT8 DevFuncNum;\r
61ce5861 1328} SMBIOS_TABLE_TYPE9;\r
1329\r
98cb9ae8 1330///\r
af2dc6a7 1331/// On Board Devices Information - Device Types. \r
98cb9ae8 1332///\r
1333typedef enum {\r
1334 OnBoardDeviceTypeOther = 0x01,\r
1335 OnBoardDeviceTypeUnknown = 0x02,\r
1336 OnBoardDeviceTypeVideo = 0x03,\r
1337 OnBoardDeviceTypeScsiController = 0x04,\r
1338 OnBoardDeviceTypeEthernet = 0x05,\r
1339 OnBoardDeviceTypeTokenRing = 0x06,\r
119c1688
SZ		 1340 OnBoardDeviceTypeSound = 0x07,\r
1341 OnBoardDeviceTypePATAController = 0x08,\r
1342 OnBoardDeviceTypeSATAController = 0x09,\r
1343 OnBoardDeviceTypeSASController = 0x0A\r
98cb9ae8 1344} MISC_ONBOARD_DEVICE_TYPE;\r
1345\r
bf7ea009 1346///\r
1347/// Device Item Entry\r
1348///\r
61ce5861 1349typedef struct {\r
af2dc6a7 1350 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r
1351 ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r
98cb9ae8 1352 SMBIOS_TABLE_STRING DescriptionString;\r
61ce5861 1353} DEVICE_STRUCT;\r
1354\r
4135253b 1355///\r
af2dc6a7 1356/// On Board Devices Information (Type 10, obsolete).\r
4135253b 1357///\r
98cb9ae8 1358/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r
1359/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r
1360/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r
1361/// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r
1362/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1363/// has some level of control over the enabling of the associated device for use by the system.\r
1364///\r
61ce5861 1365typedef struct {\r
1366 SMBIOS_STRUCTURE Hdr;\r
1367 DEVICE_STRUCT Device[1];\r
1368} SMBIOS_TABLE_TYPE10;\r
1369\r
4135253b 1370///\r
af2dc6a7 1371/// OEM Strings (Type 11).\r
98cb9ae8 1372/// This structure contains free form strings defined by the OEM. Examples of this are: \r
1373/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r
4135253b 1374///\r
61ce5861 1375typedef struct {\r
1376 SMBIOS_STRUCTURE Hdr;\r
1377 UINT8 StringCount;\r
1378} SMBIOS_TABLE_TYPE11;\r
1379\r
4135253b 1380///\r
af2dc6a7 1381/// System Configuration Options (Type 12).\r
4135253b 1382///\r
98cb9ae8 1383/// This structure contains information required to configure the base board's Jumpers and Switches. \r
1384///\r
61ce5861 1385typedef struct {\r
1386 SMBIOS_STRUCTURE Hdr;\r
1387 UINT8 StringCount;\r
1388} SMBIOS_TABLE_TYPE12;\r
1389\r
98cb9ae8 1390\r
4135253b 1391///\r
af2dc6a7 1392/// BIOS Language Information (Type 13).\r
4135253b 1393///\r
98cb9ae8 1394/// The information in this structure defines the installable language attributes of the BIOS. \r
1395/// \r
61ce5861 1396typedef struct {\r
1397 SMBIOS_STRUCTURE Hdr;\r
1398 UINT8 InstallableLanguages;\r
1399 UINT8 Flags;\r
fbfa4a1d 1400 UINT8 Reserved[15];\r
61ce5861 1401 SMBIOS_TABLE_STRING CurrentLanguages;\r
1402} SMBIOS_TABLE_TYPE13;\r
1403\r
119c1688
SZ		 1404///\r
1405/// Group Item Entry\r
1406///\r
1407typedef struct {\r
1408 UINT8 ItemType;\r
1409 UINT16 ItemHandle;\r
1410} GROUP_STRUCT;\r
1411\r
1412///\r
1413/// Group Associations (Type 14).\r
1414///\r
1415/// The Group Associations structure is provided for OEMs who want to specify \r
1416/// the arrangement or hierarchy of certain components (including other Group Associations) \r
1417/// within the system. \r
1418///\r
1419typedef struct {\r
1420 SMBIOS_STRUCTURE Hdr;\r
1421 SMBIOS_TABLE_STRING GroupName;\r
1422 GROUP_STRUCT Group[1];\r
1423} SMBIOS_TABLE_TYPE14;\r
1424\r
98cb9ae8 1425///\r
af2dc6a7 1426/// System Event Log - Event Log Types.\r
98cb9ae8 1427/// \r
1428typedef enum {\r
1429 EventLogTypeReserved = 0x00,\r
1430 EventLogTypeSingleBitECC = 0x01,\r
1431 EventLogTypeMultiBitECC = 0x02,\r
1432 EventLogTypeParityMemErr = 0x03,\r
1433 EventLogTypeBusTimeOut = 0x04,\r
1434 EventLogTypeIOChannelCheck = 0x05,\r
1435 EventLogTypeSoftwareNMI = 0x06,\r
1436 EventLogTypePOSTMemResize = 0x07,\r
1437 EventLogTypePOSTErr = 0x08,\r
1438 EventLogTypePCIParityErr = 0x09,\r
1439 EventLogTypePCISystemErr = 0x0A,\r
1440 EventLogTypeCPUFailure = 0x0B,\r
1441 EventLogTypeEISATimeOut = 0x0C,\r
1442 EventLogTypeMemLogDisabled = 0x0D,\r
1443 EventLogTypeLoggingDisabled = 0x0E,\r
1444 EventLogTypeSysLimitExce = 0x10,\r
1445 EventLogTypeAsyncHWTimer = 0x11,\r
1446 EventLogTypeSysConfigInfo = 0x12,\r
1447 EventLogTypeHDInfo = 0x13,\r
1448 EventLogTypeSysReconfig = 0x14,\r
1449 EventLogTypeUncorrectCPUErr = 0x15,\r
1450 EventLogTypeAreaResetAndClr = 0x16,\r
1451 EventLogTypeSystemBoot = 0x17,\r
6800ac83 1452 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
1453 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
98cb9ae8 1454 EventLogTypeEndOfLog = 0xFF\r
1455} EVENT_LOG_TYPE_DATA;\r
1456\r
1457///\r
af2dc6a7 1458/// System Event Log - Variable Data Format Types. \r
98cb9ae8 1459/// \r
1460typedef enum {\r
1461 EventLogVariableNone = 0x00,\r
1462 EventLogVariableHandle = 0x01,\r
1463 EventLogVariableMutilEvent = 0x02,\r
1464 EventLogVariableMutilEventHandle = 0x03,\r
1465 EventLogVariablePOSTResultBitmap = 0x04,\r
1466 EventLogVariableSysManagementType = 0x05,\r
1467 EventLogVariableMutliEventSysManagmentType = 0x06, \r
1468 EventLogVariableUnused = 0x07,\r
1469 EventLogVariableOEMAssigned = 0x80\r
55deb978 1470} EVENT_LOG_VARIABLE_DATA;\r
98cb9ae8 1471\r
98cb9ae8 1472///\r
1473/// Event Log Type Descriptors\r
1474///\r
1475typedef struct {\r
af2dc6a7 1476 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r
98cb9ae8 1477 UINT8 DataFormatType;\r
1478} EVENT_LOG_TYPE;\r
1479\r
4135253b 1480///\r
af2dc6a7 1481/// System Event Log (Type 15).\r
4135253b 1482///\r
98cb9ae8 1483/// The presence of this structure within the SMBIOS data returned for a system indicates \r
1484/// that the system supports an event log. An event log is a fixed-length area within a \r
1485/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r
1486/// record, followed by one or more variable-length log records. \r
1487///\r
61ce5861 1488typedef struct {\r
1489 SMBIOS_STRUCTURE Hdr;\r
1490 UINT16 LogAreaLength;\r
1491 UINT16 LogHeaderStartOffset;\r
1492 UINT16 LogDataStartOffset;\r
1493 UINT8 AccessMethod;\r
1494 UINT8 LogStatus;\r
1495 UINT32 LogChangeToken;\r
1496 UINT32 AccessMethodAddress;\r
1497 UINT8 LogHeaderFormat;\r
1498 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1499 UINT8 LengthOfLogTypeDescriptor;\r
1500 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
1501} SMBIOS_TABLE_TYPE15;\r
1502\r
98cb9ae8 1503///\r
af2dc6a7 1504/// Physical Memory Array - Location.\r
98cb9ae8 1505///\r
1506typedef enum {\r
1507 MemoryArrayLocationOther = 0x01,\r
1508 MemoryArrayLocationUnknown = 0x02,\r
1509 MemoryArrayLocationSystemBoard = 0x03,\r
1510 MemoryArrayLocationIsaAddonCard = 0x04,\r
1511 MemoryArrayLocationEisaAddonCard = 0x05,\r
1512 MemoryArrayLocationPciAddonCard = 0x06,\r
1513 MemoryArrayLocationMcaAddonCard = 0x07,\r
1514 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1515 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1516 MemoryArrayLocationNuBus = 0x0A,\r
1517 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1518 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1519 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
1520 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
1521} MEMORY_ARRAY_LOCATION;\r
1522\r
1523///\r
af2dc6a7 1524/// Physical Memory Array - Use.\r
98cb9ae8 1525///\r
1526typedef enum {\r
1527 MemoryArrayUseOther = 0x01,\r
1528 MemoryArrayUseUnknown = 0x02,\r
1529 MemoryArrayUseSystemMemory = 0x03,\r
1530 MemoryArrayUseVideoMemory = 0x04,\r
1531 MemoryArrayUseFlashMemory = 0x05,\r
1532 MemoryArrayUseNonVolatileRam = 0x06,\r
1533 MemoryArrayUseCacheMemory = 0x07\r
1534} MEMORY_ARRAY_USE;\r
1535\r
1536///\r
af2dc6a7 1537/// Physical Memory Array - Error Correction Types. \r
98cb9ae8 1538///\r
1539typedef enum {\r
1540 MemoryErrorCorrectionOther = 0x01,\r
1541 MemoryErrorCorrectionUnknown = 0x02,\r
1542 MemoryErrorCorrectionNone = 0x03,\r
1543 MemoryErrorCorrectionParity = 0x04,\r
1544 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1545 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1546 MemoryErrorCorrectionCrc = 0x07\r
1547} MEMORY_ERROR_CORRECTION;\r
1548\r
4135253b 1549///\r
af2dc6a7 1550/// Physical Memory Array (Type 16).\r
4135253b 1551///\r
98cb9ae8 1552/// This structure describes a collection of memory devices that operate \r
1553/// together to form a memory address space. \r
1554///\r
61ce5861 1555typedef struct {\r
98cb9ae8 1556 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1557 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r
1558 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r
1559 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r
98cb9ae8 1560 UINT32 MaximumCapacity;\r
1561 UINT16 MemoryErrorInformationHandle;\r
1562 UINT16 NumberOfMemoryDevices;\r
7ddba202
SZ		 1563 //\r
1564 // Add for smbios 2.7\r
1565 //\r
1566 UINT64 ExtendedMaximumCapacity;\r
61ce5861 1567} SMBIOS_TABLE_TYPE16;\r
1568\r
98cb9ae8 1569///\r
af2dc6a7 1570/// Memory Device - Form Factor.\r
98cb9ae8 1571///\r
1572typedef enum {\r
1573 MemoryFormFactorOther = 0x01,\r
1574 MemoryFormFactorUnknown = 0x02,\r
1575 MemoryFormFactorSimm = 0x03,\r
1576 MemoryFormFactorSip = 0x04,\r
1577 MemoryFormFactorChip = 0x05,\r
1578 MemoryFormFactorDip = 0x06,\r
1579 MemoryFormFactorZip = 0x07,\r
1580 MemoryFormFactorProprietaryCard = 0x08,\r
1581 MemoryFormFactorDimm = 0x09,\r
1582 MemoryFormFactorTsop = 0x0A,\r
1583 MemoryFormFactorRowOfChips = 0x0B,\r
1584 MemoryFormFactorRimm = 0x0C,\r
1585 MemoryFormFactorSodimm = 0x0D,\r
1586 MemoryFormFactorSrimm = 0x0E,\r
1587 MemoryFormFactorFbDimm = 0x0F\r
1588} MEMORY_FORM_FACTOR;\r
1589\r
1590///\r
1591/// Memory Device - Type\r
1592///\r
1593typedef enum {\r
1594 MemoryTypeOther = 0x01,\r
1595 MemoryTypeUnknown = 0x02,\r
1596 MemoryTypeDram = 0x03,\r
1597 MemoryTypeEdram = 0x04,\r
1598 MemoryTypeVram = 0x05,\r
1599 MemoryTypeSram = 0x06,\r
1600 MemoryTypeRam = 0x07,\r
1601 MemoryTypeRom = 0x08,\r
1602 MemoryTypeFlash = 0x09,\r
1603 MemoryTypeEeprom = 0x0A,\r
1604 MemoryTypeFeprom = 0x0B,\r
1605 MemoryTypeEprom = 0x0C,\r
1606 MemoryTypeCdram = 0x0D,\r
1607 MemoryType3Dram = 0x0E,\r
1608 MemoryTypeSdram = 0x0F,\r
1609 MemoryTypeSgram = 0x10,\r
1610 MemoryTypeRdram = 0x11,\r
1611 MemoryTypeDdr = 0x12,\r
1612 MemoryTypeDdr2 = 0x13,\r
3507ab19 1613 MemoryTypeDdr2FbDimm = 0x14,\r
1614 MemoryTypeDdr3 = 0x18,\r
6cd35c62
EL		 1615 MemoryTypeFbd2 = 0x19,\r
1616 MemoryTypeDdr4 = 0x1A,\r
1617 MemoryTypeLpddr = 0x1B,\r
1618 MemoryTypeLpddr2 = 0x1C,\r
1619 MemoryTypeLpddr3 = 0x1D,\r
1620 MemoryTypeLpddr4 = 0x1E\r
98cb9ae8 1621} MEMORY_DEVICE_TYPE;\r
1622\r
1623typedef struct {\r
1624 UINT16 Reserved :1;\r
1625 UINT16 Other :1;\r
1626 UINT16 Unknown :1;\r
1627 UINT16 FastPaged :1;\r
1628 UINT16 StaticColumn :1;\r
1629 UINT16 PseudoStatic :1;\r
1630 UINT16 Rambus :1;\r
1631 UINT16 Synchronous :1;\r
1632 UINT16 Cmos :1;\r
1633 UINT16 Edo :1;\r
1634 UINT16 WindowDram :1;\r
1635 UINT16 CacheDram :1;\r
1636 UINT16 Nonvolatile :1;\r
7ddba202
SZ		 1637 UINT16 Registered :1;\r
1638 UINT16 Unbuffered :1;\r
4a228334 1639 UINT16 LrDimm :1;\r
98cb9ae8 1640} MEMORY_DEVICE_TYPE_DETAIL;\r
1641\r
4135253b 1642///\r
af2dc6a7 1643/// Memory Device (Type 17).\r
4135253b 1644///\r
98cb9ae8 1645/// This structure describes a single memory device that is part of \r
1646/// a larger Physical Memory Array (Type 16).\r
1647/// Note: If a system includes memory-device sockets, the SMBIOS implementation \r
af2dc6a7 1648/// includes a Memory Device structure instance for each slot, whether or not the \r
98cb9ae8 1649/// socket is currently populated.\r
1650///\r
61ce5861 1651typedef struct {\r
98cb9ae8 1652 SMBIOS_STRUCTURE Hdr;\r
1653 UINT16 MemoryArrayHandle;\r
1654 UINT16 MemoryErrorInformationHandle;\r
1655 UINT16 TotalWidth;\r
1656 UINT16 DataWidth;\r
1657 UINT16 Size;\r
af2dc6a7 1658 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
98cb9ae8 1659 UINT8 DeviceSet;\r
1660 SMBIOS_TABLE_STRING DeviceLocator;\r
1661 SMBIOS_TABLE_STRING BankLocator;\r
af2dc6a7 1662 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
98cb9ae8 1663 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1664 UINT16 Speed;\r
1665 SMBIOS_TABLE_STRING Manufacturer;\r
1666 SMBIOS_TABLE_STRING SerialNumber;\r
1667 SMBIOS_TABLE_STRING AssetTag;\r
1668 SMBIOS_TABLE_STRING PartNumber;\r
61ce5861 1669 //\r
1670 // Add for smbios 2.6\r
1671 // \r
7ddba202
SZ		 1672 UINT8 Attributes;\r
1673 //\r
1674 // Add for smbios 2.7\r
1675 //\r
1676 UINT32 ExtendedSize;\r
1677 UINT16 ConfiguredMemoryClockSpeed;\r
4a228334
EL		 1678 //\r
1679 // Add for smbios 2.8.0\r
1680 //\r
1681 UINT16 MinimumVoltage;\r
1682 UINT16 MaximumVoltage;\r
1683 UINT16 ConfiguredVoltage;\r
61ce5861 1684} SMBIOS_TABLE_TYPE17;\r
1685\r
98cb9ae8 1686///\r
af2dc6a7 1687/// 32-bit Memory Error Information - Error Type. \r
98cb9ae8 1688///\r
1689typedef enum { \r
1690 MemoryErrorOther = 0x01,\r
1691 MemoryErrorUnknown = 0x02,\r
1692 MemoryErrorOk = 0x03,\r
1693 MemoryErrorBadRead = 0x04,\r
1694 MemoryErrorParity = 0x05,\r
1695 MemoryErrorSigleBit = 0x06,\r
1696 MemoryErrorDoubleBit = 0x07,\r
1697 MemoryErrorMultiBit = 0x08,\r
1698 MemoryErrorNibble = 0x09,\r
1699 MemoryErrorChecksum = 0x0A,\r
1700 MemoryErrorCrc = 0x0B,\r
1701 MemoryErrorCorrectSingleBit = 0x0C,\r
1702 MemoryErrorCorrected = 0x0D,\r
1703 MemoryErrorUnCorrectable = 0x0E\r
1704} MEMORY_ERROR_TYPE;\r
1705\r
1706///\r
af2dc6a7 1707/// 32-bit Memory Error Information - Error Granularity. \r
98cb9ae8 1708///\r
1709typedef enum { \r
1710 MemoryGranularityOther = 0x01,\r
1711 MemoryGranularityOtherUnknown = 0x02,\r
1712 MemoryGranularityDeviceLevel = 0x03,\r
1713 MemoryGranularityMemPartitionLevel = 0x04\r
1714} MEMORY_ERROR_GRANULARITY;\r
1715\r
1716///\r
af2dc6a7 1717/// 32-bit Memory Error Information - Error Operation. \r
98cb9ae8 1718///\r
1719typedef enum { \r
1720 MemoryErrorOperationOther = 0x01,\r
1721 MemoryErrorOperationUnknown = 0x02,\r
1722 MemoryErrorOperationRead = 0x03,\r
1723 MemoryErrorOperationWrite = 0x04,\r
1724 MemoryErrorOperationPartialWrite = 0x05\r
1725} MEMORY_ERROR_OPERATION;\r
1726\r
4135253b 1727///\r
af2dc6a7 1728/// 32-bit Memory Error Information (Type 18).\r
98cb9ae8 1729/// \r
1730/// This structure identifies the specifics of an error that might be detected \r
1731/// within a Physical Memory Array.\r
4135253b 1732///\r
61ce5861 1733typedef struct {\r
98cb9ae8 1734 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1735 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
1736 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
1737 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 1738 UINT32 VendorSyndrome;\r
1739 UINT32 MemoryArrayErrorAddress;\r
1740 UINT32 DeviceErrorAddress;\r
1741 UINT32 ErrorResolution;\r
61ce5861 1742} SMBIOS_TABLE_TYPE18;\r
1743\r
4135253b 1744///\r
af2dc6a7 1745/// Memory Array Mapped Address (Type 19).\r
4135253b 1746///\r
98cb9ae8 1747/// This structure provides the address mapping for a Physical Memory Array. \r
1748/// One structure is present for each contiguous address range described.\r
1749///\r
61ce5861 1750typedef struct {\r
1751 SMBIOS_STRUCTURE Hdr;\r
1752 UINT32 StartingAddress;\r
1753 UINT32 EndingAddress;\r
1754 UINT16 MemoryArrayHandle;\r
1755 UINT8 PartitionWidth;\r
7ddba202
SZ		 1756 //\r
1757 // Add for smbios 2.7\r
1758 //\r
1759 UINT64 ExtendedStartingAddress;\r
1760 UINT64 ExtendedEndingAddress;\r
61ce5861 1761} SMBIOS_TABLE_TYPE19;\r
1762\r
4135253b 1763///\r
af2dc6a7 1764/// Memory Device Mapped Address (Type 20).\r
4135253b 1765///\r
98cb9ae8 1766/// This structure maps memory address space usually to a device-level granularity. \r
1767/// One structure is present for each contiguous address range described. \r
1768///\r
61ce5861 1769typedef struct {\r
1770 SMBIOS_STRUCTURE Hdr;\r
1771 UINT32 StartingAddress;\r
1772 UINT32 EndingAddress;\r
1773 UINT16 MemoryDeviceHandle;\r
1774 UINT16 MemoryArrayMappedAddressHandle;\r
1775 UINT8 PartitionRowPosition;\r
1776 UINT8 InterleavePosition;\r
1777 UINT8 InterleavedDataDepth;\r
7ddba202
SZ		 1778 //\r
1779 // Add for smbios 2.7\r
1780 //\r
1781 UINT64 ExtendedStartingAddress;\r
1782 UINT64 ExtendedEndingAddress;\r
61ce5861 1783} SMBIOS_TABLE_TYPE20;\r
1784\r
98cb9ae8 1785///\r
1786/// Built-in Pointing Device - Type\r
1787///\r
1788typedef enum {\r
1789 PointingDeviceTypeOther = 0x01,\r
1790 PointingDeviceTypeUnknown = 0x02,\r
1791 PointingDeviceTypeMouse = 0x03,\r
1792 PointingDeviceTypeTrackBall = 0x04,\r
1793 PointingDeviceTypeTrackPoint = 0x05,\r
1794 PointingDeviceTypeGlidePoint = 0x06,\r
1795 PointingDeviceTouchPad = 0x07,\r
1796 PointingDeviceTouchScreen = 0x08,\r
1797 PointingDeviceOpticalSensor = 0x09\r
1798} BUILTIN_POINTING_DEVICE_TYPE;\r
1799\r
1800///\r
af2dc6a7 1801/// Built-in Pointing Device - Interface.\r
98cb9ae8 1802///\r
1803typedef enum {\r
1804 PointingDeviceInterfaceOther = 0x01,\r
1805 PointingDeviceInterfaceUnknown = 0x02,\r
1806 PointingDeviceInterfaceSerial = 0x03,\r
1807 PointingDeviceInterfacePs2 = 0x04,\r
1808 PointingDeviceInterfaceInfrared = 0x05,\r
1809 PointingDeviceInterfaceHpHil = 0x06,\r
1810 PointingDeviceInterfaceBusMouse = 0x07,\r
1811 PointingDeviceInterfaceADB = 0x08,\r
1812 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
1813 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
1814 PointingDeviceInterfaceUsb = 0xA2\r
1815} BUILTIN_POINTING_DEVICE_INTERFACE;\r
1816\r
4135253b 1817///\r
af2dc6a7 1818/// Built-in Pointing Device (Type 21).\r
4135253b 1819///\r
98cb9ae8 1820/// This structure describes the attributes of the built-in pointing device for the \r
af2dc6a7 1821/// system. The presence of this structure does not imply that the built-in\r
98cb9ae8 1822/// pointing device is active for the system's use! \r
1823///\r
61ce5861 1824typedef struct {\r
98cb9ae8 1825 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1826 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r
1827 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r
98cb9ae8 1828 UINT8 NumberOfButtons;\r
61ce5861 1829} SMBIOS_TABLE_TYPE21;\r
1830\r
98cb9ae8 1831///\r
1832/// Portable Battery - Device Chemistry\r
1833///\r
1834typedef enum { \r
1835 PortableBatteryDeviceChemistryOther = 0x01,\r
1836 PortableBatteryDeviceChemistryUnknown = 0x02,\r
1837 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
1838 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
1839 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
1840 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
1841 PortableBatteryDeviceChemistryZincAir = 0x07,\r
1842 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
1843} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
1844\r
4135253b 1845///\r
af2dc6a7 1846/// Portable Battery (Type 22).\r
4135253b 1847///\r
98cb9ae8 1848/// This structure describes the attributes of the portable battery(s) for the system. \r
1849/// The structure contains the static attributes for the group. Each structure describes \r
1f9f8414 1850/// a single battery pack's attributes.\r
98cb9ae8 1851///\r
61ce5861 1852typedef struct {\r
98cb9ae8 1853 SMBIOS_STRUCTURE Hdr;\r
1854 SMBIOS_TABLE_STRING Location;\r
1855 SMBIOS_TABLE_STRING Manufacturer;\r
1856 SMBIOS_TABLE_STRING ManufactureDate;\r
1857 SMBIOS_TABLE_STRING SerialNumber;\r
1858 SMBIOS_TABLE_STRING DeviceName;\r
af2dc6a7 1859 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r
98cb9ae8 1860 UINT16 DeviceCapacity;\r
1861 UINT16 DesignVoltage;\r
1862 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
1863 UINT8 MaximumErrorInBatteryData;\r
1864 UINT16 SBDSSerialNumber;\r
1865 UINT16 SBDSManufactureDate;\r
1866 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
1867 UINT8 DesignCapacityMultiplier;\r
1868 UINT32 OEMSpecific;\r
61ce5861 1869} SMBIOS_TABLE_TYPE22;\r
1870\r
4135253b 1871///\r
1872/// System Reset (Type 23)\r
1873///\r
98cb9ae8 1874/// This structure describes whether Automatic System Reset functions enabled (Status). \r
1875/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
1876/// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r
1877/// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r
1878/// the system will re-boot according to the Boot Option at Limit. \r
1879///\r
61ce5861 1880typedef struct {\r
1881 SMBIOS_STRUCTURE Hdr;\r
1882 UINT8 Capabilities;\r
1883 UINT16 ResetCount;\r
1884 UINT16 ResetLimit;\r
1885 UINT16 TimerInterval;\r
1886 UINT16 Timeout;\r
1887} SMBIOS_TABLE_TYPE23;\r
1888\r
4135253b 1889///\r
af2dc6a7 1890/// Hardware Security (Type 24).\r
4135253b 1891///\r
98cb9ae8 1892/// This structure describes the system-wide hardware security settings. \r
1893///\r
61ce5861 1894typedef struct {\r
1895 SMBIOS_STRUCTURE Hdr;\r
1896 UINT8 HardwareSecuritySettings;\r
1897} SMBIOS_TABLE_TYPE24;\r
1898\r
4135253b 1899///\r
af2dc6a7 1900/// System Power Controls (Type 25).\r
4135253b 1901///\r
98cb9ae8 1902/// This structure describes the attributes for controlling the main power supply to the system. \r
1903/// Software that interprets this structure uses the month, day, hour, minute, and second values \r
1904/// to determine the number of seconds until the next power-on of the system. The presence of \r
1905/// this structure implies that a timed power-on facility is available for the system. \r
1906///\r
61ce5861 1907typedef struct {\r
1908 SMBIOS_STRUCTURE Hdr;\r
1909 UINT8 NextScheduledPowerOnMonth;\r
1910 UINT8 NextScheduledPowerOnDayOfMonth;\r
1911 UINT8 NextScheduledPowerOnHour;\r
1912 UINT8 NextScheduledPowerOnMinute;\r
1913 UINT8 NextScheduledPowerOnSecond;\r
1914} SMBIOS_TABLE_TYPE25;\r
1915\r
98cb9ae8 1916///\r
af2dc6a7 1917/// Voltage Probe - Location and Status.\r
98cb9ae8 1918///\r
1919typedef struct {\r
1920 UINT8 VoltageProbeSite :5;\r
1921 UINT8 VoltageProbeStatus :3;\r
1922} MISC_VOLTAGE_PROBE_LOCATION;\r
1923\r
4135253b 1924///\r
1925/// Voltage Probe (Type 26)\r
1926///\r
98cb9ae8 1927/// This describes the attributes for a voltage probe in the system. \r
1928/// Each structure describes a single voltage probe.\r
1929///\r
61ce5861 1930typedef struct {\r
98cb9ae8 1931 SMBIOS_STRUCTURE Hdr;\r
1932 SMBIOS_TABLE_STRING Description;\r
1933 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
1934 UINT16 MaximumValue;\r
1935 UINT16 MinimumValue;\r
1936 UINT16 Resolution;\r
1937 UINT16 Tolerance;\r
1938 UINT16 Accuracy;\r
1939 UINT32 OEMDefined;\r
1940 UINT16 NominalValue;\r
61ce5861 1941} SMBIOS_TABLE_TYPE26;\r
1942\r
98cb9ae8 1943///\r
af2dc6a7 1944/// Cooling Device - Device Type and Status.\r
98cb9ae8 1945///\r
1946typedef struct {\r
1947 UINT8 CoolingDevice :5;\r
1948 UINT8 CoolingDeviceStatus :3;\r
1949} MISC_COOLING_DEVICE_TYPE;\r
1950\r
4135253b 1951///\r
1952/// Cooling Device (Type 27)\r
1953///\r
98cb9ae8 1954/// This structure describes the attributes for a cooling device in the system. \r
1955/// Each structure describes a single cooling device. \r
1956/// \r
61ce5861 1957typedef struct {\r
98cb9ae8 1958 SMBIOS_STRUCTURE Hdr;\r
1959 UINT16 TemperatureProbeHandle;\r
1960 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
1961 UINT8 CoolingUnitGroup;\r
1962 UINT32 OEMDefined;\r
1963 UINT16 NominalSpeed;\r
7ddba202
SZ		 1964 //\r
1965 // Add for smbios 2.7\r
1966 //\r
1967 SMBIOS_TABLE_STRING Description;\r
61ce5861 1968} SMBIOS_TABLE_TYPE27;\r
1969\r
98cb9ae8 1970///\r
af2dc6a7 1971/// Temperature Probe - Location and Status.\r
98cb9ae8 1972///\r
1973typedef struct {\r
1974 UINT8 TemperatureProbeSite :5;\r
1975 UINT8 TemperatureProbeStatus :3;\r
1976} MISC_TEMPERATURE_PROBE_LOCATION;\r
1977\r
4135253b 1978///\r
af2dc6a7 1979/// Temperature Probe (Type 28).\r
4135253b 1980///\r
98cb9ae8 1981/// This structure describes the attributes for a temperature probe in the system. \r
1982/// Each structure describes a single temperature probe. \r
1983///\r
61ce5861 1984typedef struct {\r
98cb9ae8 1985 SMBIOS_STRUCTURE Hdr;\r
1986 SMBIOS_TABLE_STRING Description;\r
1987 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
1988 UINT16 MaximumValue;\r
1989 UINT16 MinimumValue;\r
1990 UINT16 Resolution;\r
1991 UINT16 Tolerance;\r
1992 UINT16 Accuracy;\r
1993 UINT32 OEMDefined;\r
1994 UINT16 NominalValue;\r
61ce5861 1995} SMBIOS_TABLE_TYPE28;\r
1996\r
98cb9ae8 1997///\r
af2dc6a7 1998/// Electrical Current Probe - Location and Status.\r
98cb9ae8 1999///\r
2000typedef struct {\r
2001 UINT8 ElectricalCurrentProbeSite :5;\r
2002 UINT8 ElectricalCurrentProbeStatus :3;\r
2003} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
2004\r
4135253b 2005///\r
af2dc6a7 2006/// Electrical Current Probe (Type 29).\r
4135253b 2007///\r
98cb9ae8 2008/// This structure describes the attributes for an electrical current probe in the system.\r
2009/// Each structure describes a single electrical current probe. \r
2010///\r
61ce5861 2011typedef struct {\r
98cb9ae8 2012 SMBIOS_STRUCTURE Hdr;\r
2013 SMBIOS_TABLE_STRING Description;\r
2014 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
2015 UINT16 MaximumValue;\r
2016 UINT16 MinimumValue;\r
2017 UINT16 Resolution;\r
2018 UINT16 Tolerance;\r
2019 UINT16 Accuracy;\r
2020 UINT32 OEMDefined;\r
2021 UINT16 NominalValue;\r
61ce5861 2022} SMBIOS_TABLE_TYPE29;\r
2023\r
4135253b 2024///\r
af2dc6a7 2025/// Out-of-Band Remote Access (Type 30).\r
4135253b 2026///\r
98cb9ae8 2027/// This structure describes the attributes and policy settings of a hardware facility \r
2028/// that may be used to gain remote access to a hardware system when the operating system \r
2029/// is not available due to power-down status, hardware failures, or boot failures. \r
2030///\r
61ce5861 2031typedef struct {\r
2032 SMBIOS_STRUCTURE Hdr;\r
2033 SMBIOS_TABLE_STRING ManufacturerName;\r
2034 UINT8 Connections;\r
2035} SMBIOS_TABLE_TYPE30;\r
2036\r
4135253b 2037///\r
af2dc6a7 2038/// Boot Integrity Services (BIS) Entry Point (Type 31).\r
4135253b 2039///\r
98cb9ae8 2040/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r
2041/// \r
61ce5861 2042typedef struct {\r
2043 SMBIOS_STRUCTURE Hdr;\r
2044 UINT8 Checksum;\r
2045 UINT8 Reserved1;\r
2046 UINT16 Reserved2;\r
2047 UINT32 BisEntry16;\r
2048 UINT32 BisEntry32;\r
2049 UINT64 Reserved3;\r
2050 UINT32 Reserved4;\r
2051} SMBIOS_TABLE_TYPE31;\r
2052\r
98cb9ae8 2053///\r
af2dc6a7 2054/// System Boot Information - System Boot Status.\r
98cb9ae8 2055///\r
2056typedef enum {\r
2057 BootInformationStatusNoError = 0x00,\r
2058 BootInformationStatusNoBootableMedia = 0x01,\r
2059 BootInformationStatusNormalOSFailedLoading = 0x02,\r
2060 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
2061 BootInformationStatusOSDetectedFailure = 0x04,\r
2062 BootInformationStatusUserRequestedBoot = 0x05,\r
2063 BootInformationStatusSystemSecurityViolation = 0x06,\r
2064 BootInformationStatusPreviousRequestedImage = 0x07,\r
2065 BootInformationStatusWatchdogTimerExpired = 0x08,\r
2066 BootInformationStatusStartReserved = 0x09,\r
2067 BootInformationStatusStartOemSpecific = 0x80,\r
2068 BootInformationStatusStartProductSpecific = 0xC0\r
2069} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
2070\r
4135253b 2071///\r
af2dc6a7 2072/// System Boot Information (Type 32).\r
4135253b 2073///\r
98cb9ae8 2074/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r
2075/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r
2076/// application via this structure. When used in the PXE environment, for example, \r
2077/// this code identifies the reason the PXE was initiated and can be used by boot-image \r
1f9f8414 2078/// software to further automate an enterprise's PXE sessions. For example, an enterprise \r
98cb9ae8 2079/// could choose to automatically download a hardware-diagnostic image to a client whose \r
2080/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
2081///\r
61ce5861 2082typedef struct {\r
98cb9ae8 2083 SMBIOS_STRUCTURE Hdr;\r
2084 UINT8 Reserved[6];\r
af2dc6a7 2085 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r
61ce5861 2086} SMBIOS_TABLE_TYPE32;\r
2087\r
4135253b 2088///\r
af2dc6a7 2089/// 64-bit Memory Error Information (Type 33).\r
4135253b 2090///\r
98cb9ae8 2091/// This structure describes an error within a Physical Memory Array, \r
2092/// when the error address is above 4G (0xFFFFFFFF).\r
2093/// \r
61ce5861 2094typedef struct {\r
98cb9ae8 2095 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 2096 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
2097 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
2098 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 2099 UINT32 VendorSyndrome;\r
2100 UINT64 MemoryArrayErrorAddress;\r
2101 UINT64 DeviceErrorAddress;\r
2102 UINT32 ErrorResolution;\r
61ce5861 2103} SMBIOS_TABLE_TYPE33;\r
2104\r
98cb9ae8 2105///\r
af2dc6a7 2106/// Management Device - Type. \r
98cb9ae8 2107///\r
2108typedef enum {\r
2109 ManagementDeviceTypeOther = 0x01,\r
2110 ManagementDeviceTypeUnknown = 0x02,\r
2111 ManagementDeviceTypeLm75 = 0x03,\r
2112 ManagementDeviceTypeLm78 = 0x04,\r
2113 ManagementDeviceTypeLm79 = 0x05,\r
2114 ManagementDeviceTypeLm80 = 0x06,\r
2115 ManagementDeviceTypeLm81 = 0x07,\r
2116 ManagementDeviceTypeAdm9240 = 0x08,\r
2117 ManagementDeviceTypeDs1780 = 0x09,\r
2118 ManagementDeviceTypeMaxim1617 = 0x0A,\r
2119 ManagementDeviceTypeGl518Sm = 0x0B,\r
2120 ManagementDeviceTypeW83781D = 0x0C,\r
2121 ManagementDeviceTypeHt82H791 = 0x0D\r
2122} MISC_MANAGEMENT_DEVICE_TYPE;\r
2123\r
2124///\r
af2dc6a7 2125/// Management Device - Address Type. \r
98cb9ae8 2126///\r
2127typedef enum {\r
2128 ManagementDeviceAddressTypeOther = 0x01,\r
2129 ManagementDeviceAddressTypeUnknown = 0x02,\r
2130 ManagementDeviceAddressTypeIOPort = 0x03,\r
2131 ManagementDeviceAddressTypeMemory = 0x04,\r
2132 ManagementDeviceAddressTypeSmbus = 0x05\r
2133} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
2134\r
4135253b 2135///\r
af2dc6a7 2136/// Management Device (Type 34).\r
4135253b 2137///\r
98cb9ae8 2138/// The information in this structure defines the attributes of a Management Device. \r
2139/// A Management Device might control one or more fans or voltage, current, or temperature\r
2140/// probes as defined by one or more Management Device Component structures.\r
2141///\r
61ce5861 2142typedef struct {\r
98cb9ae8 2143 SMBIOS_STRUCTURE Hdr;\r
2144 SMBIOS_TABLE_STRING Description;\r
af2dc6a7 2145 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r
98cb9ae8 2146 UINT32 Address;\r
af2dc6a7 2147 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r
61ce5861 2148} SMBIOS_TABLE_TYPE34;\r
2149\r
4135253b 2150///\r
2151/// Management Device Component (Type 35)\r
2152///\r
98cb9ae8 2153/// This structure associates a cooling device or environmental probe with structures \r
2154/// that define the controlling hardware device and (optionally) the component's thresholds. \r
2155///\r
61ce5861 2156typedef struct {\r
2157 SMBIOS_STRUCTURE Hdr;\r
2158 SMBIOS_TABLE_STRING Description;\r
2159 UINT16 ManagementDeviceHandle;\r
2160 UINT16 ComponentHandle;\r
2161 UINT16 ThresholdHandle;\r
2162} SMBIOS_TABLE_TYPE35;\r
2163\r
4135253b 2164///\r
af2dc6a7 2165/// Management Device Threshold Data (Type 36).\r
4135253b 2166///\r
98cb9ae8 2167/// The information in this structure defines threshold information for \r
2168/// a component (probe or cooling-unit) contained within a Management Device. \r
2169///\r
61ce5861 2170typedef struct {\r
2171 SMBIOS_STRUCTURE Hdr;\r
2172 UINT16 LowerThresholdNonCritical;\r
2173 UINT16 UpperThresholdNonCritical;\r
2174 UINT16 LowerThresholdCritical;\r
2175 UINT16 UpperThresholdCritical;\r
2176 UINT16 LowerThresholdNonRecoverable;\r
2177 UINT16 UpperThresholdNonRecoverable;\r
2178} SMBIOS_TABLE_TYPE36;\r
2179\r
bf7ea009 2180///\r
af2dc6a7 2181/// Memory Channel Entry.\r
bf7ea009 2182///\r
61ce5861 2183typedef struct {\r
2184 UINT8 DeviceLoad;\r
2185 UINT16 DeviceHandle;\r
2186} MEMORY_DEVICE;\r
2187\r
98cb9ae8 2188///\r
af2dc6a7 2189/// Memory Channel - Channel Type.\r
98cb9ae8 2190///\r
2191typedef enum {\r
2192 MemoryChannelTypeOther = 0x01,\r
2193 MemoryChannelTypeUnknown = 0x02,\r
2194 MemoryChannelTypeRambus = 0x03,\r
2195 MemoryChannelTypeSyncLink = 0x04\r
2196} MEMORY_CHANNEL_TYPE;\r
2197\r
4135253b 2198///\r
2199/// Memory Channel (Type 37)\r
2200///\r
98cb9ae8 2201/// The information in this structure provides the correlation between a Memory Channel\r
af2dc6a7 2202/// and its associated Memory Devices. Each device presents one or more loads to the channel. \r
2203/// The sum of all device loads cannot exceed the channel's defined maximum.\r
98cb9ae8 2204///\r
61ce5861 2205typedef struct {\r
2206 SMBIOS_STRUCTURE Hdr;\r
2207 UINT8 ChannelType;\r
2208 UINT8 MaximumChannelLoad;\r
2209 UINT8 MemoryDeviceCount;\r
2210 MEMORY_DEVICE MemoryDevice[1];\r
2211} SMBIOS_TABLE_TYPE37;\r
2212\r
98cb9ae8 2213///\r
2214/// IPMI Device Information - BMC Interface Type\r
2215///\r
2216typedef enum {\r
2217 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
af2dc6a7 2218 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r
2219 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r
2220 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r
98cb9ae8 2221 IPMIDeviceInfoInterfaceTypeReserved = 0x04\r
2222} BMC_INTERFACE_TYPE;\r
2223\r
4135253b 2224///\r
af2dc6a7 2225/// IPMI Device Information (Type 38).\r
4135253b 2226///\r
7ddba202 2227/// The information in this structure defines the attributes of an\r
98cb9ae8 2228/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
7ddba202
SZ		 2229///\r
2230/// The Type 42 structure can also be used to describe a physical management controller\r
2231/// host interface and one or more protocols that share that interface. If IPMI is not\r
2232/// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r
2233/// Providing Type 38 is recommended for backward compatibility.\r
2234///\r
61ce5861 2235typedef struct {\r
2236 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 2237 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r
61ce5861 2238 UINT8 IPMISpecificationRevision;\r
2239 UINT8 I2CSlaveAddress;\r
2240 UINT8 NVStorageDeviceAddress;\r
2241 UINT64 BaseAddress;\r
2242 UINT8 BaseAddressModifier_InterruptInfo;\r
2243 UINT8 InterruptNumber;\r
2244} SMBIOS_TABLE_TYPE38;\r
2245\r
98cb9ae8 2246///\r
af2dc6a7 2247/// System Power Supply - Power Supply Characteristics.\r
98cb9ae8 2248///\r
2249typedef struct {\r
2250 UINT16 PowerSupplyHotReplaceable:1;\r
2251 UINT16 PowerSupplyPresent :1;\r
2252 UINT16 PowerSupplyUnplugged :1;\r
2253 UINT16 InputVoltageRangeSwitch :4;\r
2254 UINT16 PowerSupplyStatus :3;\r
2255 UINT16 PowerSupplyType :4;\r
2256 UINT16 Reserved :2;\r
2257} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
2258\r
4135253b 2259///\r
af2dc6a7 2260/// System Power Supply (Type 39).\r
4135253b 2261///\r
7ddba202
SZ		 2262/// This structure identifies attributes of a system power supply. One instance\r
2263/// of this record is present for each possible power supply in a system.\r
98cb9ae8 2264///\r
61ce5861 2265typedef struct {\r
98cb9ae8 2266 SMBIOS_STRUCTURE Hdr;\r
2267 UINT8 PowerUnitGroup;\r
2268 SMBIOS_TABLE_STRING Location;\r
2269 SMBIOS_TABLE_STRING DeviceName;\r
2270 SMBIOS_TABLE_STRING Manufacturer;\r
2271 SMBIOS_TABLE_STRING SerialNumber;\r
2272 SMBIOS_TABLE_STRING AssetTagNumber;\r
2273 SMBIOS_TABLE_STRING ModelPartNumber;\r
2274 SMBIOS_TABLE_STRING RevisionLevel;\r
2275 UINT16 MaxPowerCapacity;\r
2276 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
2277 UINT16 InputVoltageProbeHandle;\r
2278 UINT16 CoolingDeviceHandle;\r
2279 UINT16 InputCurrentProbeHandle;\r
61ce5861 2280} SMBIOS_TABLE_TYPE39;\r
2281\r
bf7ea009 2282///\r
af2dc6a7 2283/// Additional Information Entry Format. \r
bf7ea009 2284///\r
61ce5861 2285typedef struct { \r
2286 UINT8 EntryLength; \r
2287 UINT16 ReferencedHandle;\r
2288 UINT8 ReferencedOffset;\r
2289 SMBIOS_TABLE_STRING EntryString;\r
2290 UINT8 Value[1];\r
2291}ADDITIONAL_INFORMATION_ENTRY;\r
2292\r
4135253b 2293///\r
af2dc6a7 2294/// Additional Information (Type 40).\r
4135253b 2295///\r
98cb9ae8 2296/// This structure is intended to provide additional information for handling unspecified \r
2297/// enumerated values and interim field updates in another structure. \r
2298///\r
61ce5861 2299typedef struct {\r
2300 SMBIOS_STRUCTURE Hdr;\r
2301 UINT8 NumberOfAdditionalInformationEntries;\r
2302 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r
2303} SMBIOS_TABLE_TYPE40;\r
2304\r
98cb9ae8 2305///\r
af2dc6a7 2306/// Onboard Devices Extended Information - Onboard Device Types.\r
98cb9ae8 2307///\r
2308typedef enum{\r
2309 OnBoardDeviceExtendedTypeOther = 0x01,\r
2310 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
2311 OnBoardDeviceExtendedTypeVideo = 0x03,\r
2312 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
2313 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
2314 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
2315 OnBoardDeviceExtendedTypeSound = 0x07,\r
2316 OnBoardDeviceExtendedTypePATAController = 0x08,\r
2317 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
2318 OnBoardDeviceExtendedTypeSASController = 0x0A\r
2319} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
2320\r
4135253b 2321///\r
af2dc6a7 2322/// Onboard Devices Extended Information (Type 41).\r
4135253b 2323///\r
98cb9ae8 2324/// The information in this structure defines the attributes of devices that \r
2325/// are onboard (soldered onto) a system element, usually the baseboard. \r
2326/// In general, an entry in this table implies that the BIOS has some level of \r
2327/// control over the enabling of the associated device for use by the system. \r
2328///\r
61ce5861 2329typedef struct {\r
98cb9ae8 2330 SMBIOS_STRUCTURE Hdr;\r
2331 SMBIOS_TABLE_STRING ReferenceDesignation;\r
af2dc6a7 2332 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r
98cb9ae8 2333 UINT8 DeviceTypeInstance;\r
2334 UINT16 SegmentGroupNum;\r
2335 UINT8 BusNum;\r
7ddba202 2336 UINT8 DevFuncNum;\r
61ce5861 2337} SMBIOS_TABLE_TYPE41;\r
2338\r
7ddba202
SZ		 2339///\r
2340/// Management Controller Host Interface (Type 42).\r
2341///\r
2342/// The information in this structure defines the attributes of a Management\r
2343/// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r
2344///\r
2345/// Type 42 should be used for management controller host interfaces that use protocols\r
2346/// other than IPMI or that use multiple protocols on a single host interface type.\r
2347///\r
2348/// This structure should also be provided if IPMI is shared with other protocols\r
2349/// over the same interface hardware. If IPMI is not shared with other protocols,\r
2350/// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r
2351/// recommended for backward compatibility. The structures are not required to\r
2352/// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r
2353/// simultaneously to provide backward compatibility with IPMI applications or drivers\r
2354/// that do not yet recognize the Type 42 structure.\r
2355///\r
2356typedef struct {\r
2357 SMBIOS_STRUCTURE Hdr;\r
2358 UINT8 InterfaceType;\r
2359 UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes\r
2360} SMBIOS_TABLE_TYPE42;\r
2361\r
713e4b00
LA		 2362///\r
2363/// TPM Device (Type 43).\r
2364///\r
2365typedef struct {\r
2366 SMBIOS_STRUCTURE Hdr;\r
2367 UINT8 VendorID[4];\r
2368 UINT8 MajorSpecVersion;\r
2369 UINT8 MinorSpecVersion;\r
2370 UINT32 FirmwareVersion1;\r
2371 UINT32 FirmwareVersion2;\r
2372 SMBIOS_TABLE_STRING Description;\r
2373 UINT64 Characteristics;\r
2374 UINT32 OemDefined;\r
2375} SMBIOS_TABLE_TYPE43;\r
2376\r
4135253b 2377///\r
2378/// Inactive (Type 126)\r
2379///\r
61ce5861 2380typedef struct {\r
2381 SMBIOS_STRUCTURE Hdr;\r
2382} SMBIOS_TABLE_TYPE126;\r
2383\r
4135253b 2384///\r
2385/// End-of-Table (Type 127)\r
2386///\r
61ce5861 2387typedef struct {\r
2388 SMBIOS_STRUCTURE Hdr;\r
2389} SMBIOS_TABLE_TYPE127;\r
2390\r
4135253b 2391///\r
af2dc6a7 2392/// Union of all the possible SMBIOS record types.\r
4135253b 2393///\r
61ce5861 2394typedef union {\r
2395 SMBIOS_STRUCTURE *Hdr;\r
2396 SMBIOS_TABLE_TYPE0 *Type0;\r
2397 SMBIOS_TABLE_TYPE1 *Type1;\r
2398 SMBIOS_TABLE_TYPE2 *Type2;\r
2399 SMBIOS_TABLE_TYPE3 *Type3;\r
2400 SMBIOS_TABLE_TYPE4 *Type4;\r
2401 SMBIOS_TABLE_TYPE5 *Type5;\r
2402 SMBIOS_TABLE_TYPE6 *Type6;\r
2403 SMBIOS_TABLE_TYPE7 *Type7;\r
2404 SMBIOS_TABLE_TYPE8 *Type8;\r
2405 SMBIOS_TABLE_TYPE9 *Type9;\r
2406 SMBIOS_TABLE_TYPE10 *Type10;\r
2407 SMBIOS_TABLE_TYPE11 *Type11;\r
2408 SMBIOS_TABLE_TYPE12 *Type12;\r
2409 SMBIOS_TABLE_TYPE13 *Type13;\r
2410 SMBIOS_TABLE_TYPE14 *Type14;\r
2411 SMBIOS_TABLE_TYPE15 *Type15;\r
2412 SMBIOS_TABLE_TYPE16 *Type16;\r
2413 SMBIOS_TABLE_TYPE17 *Type17;\r
2414 SMBIOS_TABLE_TYPE18 *Type18;\r
2415 SMBIOS_TABLE_TYPE19 *Type19;\r
2416 SMBIOS_TABLE_TYPE20 *Type20;\r
2417 SMBIOS_TABLE_TYPE21 *Type21;\r
2418 SMBIOS_TABLE_TYPE22 *Type22;\r
2419 SMBIOS_TABLE_TYPE23 *Type23;\r
2420 SMBIOS_TABLE_TYPE24 *Type24;\r
2421 SMBIOS_TABLE_TYPE25 *Type25;\r
2422 SMBIOS_TABLE_TYPE26 *Type26;\r
2423 SMBIOS_TABLE_TYPE27 *Type27;\r
2424 SMBIOS_TABLE_TYPE28 *Type28;\r
2425 SMBIOS_TABLE_TYPE29 *Type29;\r
2426 SMBIOS_TABLE_TYPE30 *Type30;\r
2427 SMBIOS_TABLE_TYPE31 *Type31;\r
2428 SMBIOS_TABLE_TYPE32 *Type32;\r
2429 SMBIOS_TABLE_TYPE33 *Type33;\r
2430 SMBIOS_TABLE_TYPE34 *Type34;\r
2431 SMBIOS_TABLE_TYPE35 *Type35;\r
2432 SMBIOS_TABLE_TYPE36 *Type36;\r
2433 SMBIOS_TABLE_TYPE37 *Type37;\r
2434 SMBIOS_TABLE_TYPE38 *Type38;\r
2435 SMBIOS_TABLE_TYPE39 *Type39;\r
2436 SMBIOS_TABLE_TYPE40 *Type40;\r
2437 SMBIOS_TABLE_TYPE41 *Type41;\r
884f9295 2438 SMBIOS_TABLE_TYPE42 *Type42;\r
713e4b00 2439 SMBIOS_TABLE_TYPE43 *Type43;\r
61ce5861 2440 SMBIOS_TABLE_TYPE126 *Type126;\r
2441 SMBIOS_TABLE_TYPE127 *Type127;\r
2442 UINT8 *Raw;\r
2443} SMBIOS_STRUCTURE_POINTER;\r
2444\r
766f4bc1 2445#pragma pack()\r
2446\r
a7ed1e2e 2447#endif\r
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