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ac644614 | 1 | /** @file\r |
50a64e5b | 2 | Provides string functions, linked list functions, math functions, synchronization\r |
3 | functions, and CPU architecture specific functions.\r | |
ac644614 | 4 | \r |
50a64e5b | 5 | Copyright (c) 2006 - 2008, Intel Corporation\r |
6 | All rights reserved. This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
ac644614 | 10 | \r |
50a64e5b | 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
ac644614 | 13 | \r |
14 | **/\r | |
15 | \r | |
16 | #ifndef __BASE_LIB__\r | |
17 | #define __BASE_LIB__\r | |
18 | \r | |
fc30687f | 19 | ///\r |
1106ffe1 | 20 | /// Definitions for SPIN_LOCK\r |
fc30687f | 21 | ///\r |
ac644614 | 22 | typedef volatile UINTN SPIN_LOCK;\r |
23 | \r | |
1106ffe1 | 24 | //\r |
25 | // Definitions for architecture specific types\r | |
26 | //\r | |
ac644614 | 27 | #if defined (MDE_CPU_IA32)\r |
fc30687f | 28 | ///\r |
29 | /// IA32 context buffer used by SetJump() and LongJump()\r | |
30 | ///\r | |
ac644614 | 31 | typedef struct {\r |
32 | UINT32 Ebx;\r | |
33 | UINT32 Esi;\r | |
34 | UINT32 Edi;\r | |
35 | UINT32 Ebp;\r | |
36 | UINT32 Esp;\r | |
37 | UINT32 Eip;\r | |
38 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
39 | \r | |
40 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
41 | \r | |
42 | #elif defined (MDE_CPU_IPF)\r | |
43 | \r | |
fc30687f | 44 | ///\r |
45 | /// IPF context buffer used by SetJump() and LongJump()\r | |
46 | ///\r | |
ac644614 | 47 | typedef struct {\r |
48 | UINT64 F2[2];\r | |
49 | UINT64 F3[2];\r | |
50 | UINT64 F4[2];\r | |
51 | UINT64 F5[2];\r | |
52 | UINT64 F16[2];\r | |
53 | UINT64 F17[2];\r | |
54 | UINT64 F18[2];\r | |
55 | UINT64 F19[2];\r | |
56 | UINT64 F20[2];\r | |
57 | UINT64 F21[2];\r | |
58 | UINT64 F22[2];\r | |
59 | UINT64 F23[2];\r | |
60 | UINT64 F24[2];\r | |
61 | UINT64 F25[2];\r | |
62 | UINT64 F26[2];\r | |
63 | UINT64 F27[2];\r | |
64 | UINT64 F28[2];\r | |
65 | UINT64 F29[2];\r | |
66 | UINT64 F30[2];\r | |
67 | UINT64 F31[2];\r | |
68 | UINT64 R4;\r | |
69 | UINT64 R5;\r | |
70 | UINT64 R6;\r | |
71 | UINT64 R7;\r | |
72 | UINT64 SP;\r | |
73 | UINT64 BR0;\r | |
74 | UINT64 BR1;\r | |
75 | UINT64 BR2;\r | |
76 | UINT64 BR3;\r | |
77 | UINT64 BR4;\r | |
78 | UINT64 BR5;\r | |
79 | UINT64 InitialUNAT;\r | |
80 | UINT64 AfterSpillUNAT;\r | |
81 | UINT64 PFS;\r | |
82 | UINT64 BSP;\r | |
83 | UINT64 Predicates;\r | |
84 | UINT64 LoopCount;\r | |
85 | UINT64 FPSR;\r | |
86 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
87 | \r | |
88 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r | |
89 | \r | |
90 | #elif defined (MDE_CPU_X64)\r | |
fc30687f | 91 | ///\r |
92 | /// X64 context buffer used by SetJump() and LongJump()\r | |
93 | ///\r | |
ac644614 | 94 | typedef struct {\r |
95 | UINT64 Rbx;\r | |
96 | UINT64 Rsp;\r | |
97 | UINT64 Rbp;\r | |
98 | UINT64 Rdi;\r | |
99 | UINT64 Rsi;\r | |
100 | UINT64 R12;\r | |
101 | UINT64 R13;\r | |
102 | UINT64 R14;\r | |
103 | UINT64 R15;\r | |
104 | UINT64 Rip;\r | |
105 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
106 | \r | |
107 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
108 | \r | |
109 | #elif defined (MDE_CPU_EBC)\r | |
fc30687f | 110 | ///\r |
111 | /// EBC context buffer used by SetJump() and LongJump()\r | |
112 | ///\r | |
ac644614 | 113 | typedef struct {\r |
114 | UINT64 R0;\r | |
115 | UINT64 R1;\r | |
116 | UINT64 R2;\r | |
117 | UINT64 R3;\r | |
118 | UINT64 IP;\r | |
119 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
120 | \r | |
121 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
122 | \r | |
123 | #else\r | |
124 | #error Unknown Processor Type\r | |
125 | #endif\r | |
126 | \r | |
127 | //\r | |
128 | // String Services\r | |
129 | //\r | |
130 | \r | |
131 | /**\r | |
132 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r | |
133 | string and returns the new Unicode string.\r | |
134 | \r | |
135 | This function copies the contents of the Unicode string Source to the Unicode\r | |
136 | string Destination, and returns Destination. If Source and Destination\r | |
137 | overlap, then the results are undefined.\r | |
138 | \r | |
139 | If Destination is NULL, then ASSERT().\r | |
140 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
141 | If Source is NULL, then ASSERT().\r | |
142 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
143 | If Source and Destination overlap, then ASSERT().\r | |
144 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
145 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
146 | Null-terminator, then ASSERT().\r | |
147 | \r | |
148 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
149 | @param Source Pointer to a Null-terminated Unicode string.\r | |
150 | \r | |
9aa049d9 | 151 | @return Destination.\r |
ac644614 | 152 | \r |
153 | **/\r | |
154 | CHAR16 *\r | |
155 | EFIAPI\r | |
156 | StrCpy (\r | |
157 | OUT CHAR16 *Destination,\r | |
158 | IN CONST CHAR16 *Source\r | |
159 | );\r | |
160 | \r | |
161 | \r | |
162 | /**\r | |
17f695ed | 163 | Copies up to a specified length from one Null-terminated Unicode string to \r |
164 | another Null-terminated Unicode string and returns the new Unicode string.\r | |
ac644614 | 165 | \r |
166 | This function copies the contents of the Unicode string Source to the Unicode\r | |
167 | string Destination, and returns Destination. At most, Length Unicode\r | |
168 | characters are copied from Source to Destination. If Length is 0, then\r | |
169 | Destination is returned unmodified. If Length is greater that the number of\r | |
170 | Unicode characters in Source, then Destination is padded with Null Unicode\r | |
171 | characters. If Source and Destination overlap, then the results are\r | |
172 | undefined.\r | |
173 | \r | |
174 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
175 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
176 | If Length > 0 and Source is NULL, then ASSERT().\r | |
177 | If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT().\r | |
178 | If Source and Destination overlap, then ASSERT().\r | |
179 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
180 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
181 | Null-terminator, then ASSERT().\r | |
182 | \r | |
183 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
184 | @param Source Pointer to a Null-terminated Unicode string.\r | |
185 | @param Length Maximum number of Unicode characters to copy.\r | |
186 | \r | |
9aa049d9 | 187 | @return Destination.\r |
ac644614 | 188 | \r |
189 | **/\r | |
190 | CHAR16 *\r | |
191 | EFIAPI\r | |
192 | StrnCpy (\r | |
193 | OUT CHAR16 *Destination,\r | |
194 | IN CONST CHAR16 *Source,\r | |
195 | IN UINTN Length\r | |
196 | );\r | |
197 | \r | |
198 | \r | |
199 | /**\r | |
200 | Returns the length of a Null-terminated Unicode string.\r | |
201 | \r | |
202 | This function returns the number of Unicode characters in the Null-terminated\r | |
203 | Unicode string specified by String.\r | |
204 | \r | |
205 | If String is NULL, then ASSERT().\r | |
206 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
207 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
208 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
209 | Null-terminator, then ASSERT().\r | |
210 | \r | |
211 | @param String Pointer to a Null-terminated Unicode string.\r | |
212 | \r | |
213 | @return The length of String.\r | |
214 | \r | |
215 | **/\r | |
216 | UINTN\r | |
217 | EFIAPI\r | |
218 | StrLen (\r | |
219 | IN CONST CHAR16 *String\r | |
220 | );\r | |
221 | \r | |
222 | \r | |
223 | /**\r | |
224 | Returns the size of a Null-terminated Unicode string in bytes, including the\r | |
225 | Null terminator.\r | |
226 | \r | |
17f695ed | 227 | This function returns the size, in bytes, of the Null-terminated Unicode string \r |
228 | specified by String.\r | |
ac644614 | 229 | \r |
230 | If String is NULL, then ASSERT().\r | |
231 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
232 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
233 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
234 | Null-terminator, then ASSERT().\r | |
235 | \r | |
236 | @param String Pointer to a Null-terminated Unicode string.\r | |
237 | \r | |
238 | @return The size of String.\r | |
239 | \r | |
240 | **/\r | |
241 | UINTN\r | |
242 | EFIAPI\r | |
243 | StrSize (\r | |
244 | IN CONST CHAR16 *String\r | |
245 | );\r | |
246 | \r | |
247 | \r | |
248 | /**\r | |
249 | Compares two Null-terminated Unicode strings, and returns the difference\r | |
250 | between the first mismatched Unicode characters.\r | |
251 | \r | |
252 | This function compares the Null-terminated Unicode string FirstString to the\r | |
253 | Null-terminated Unicode string SecondString. If FirstString is identical to\r | |
254 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
255 | mismatched Unicode character in SecondString subtracted from the first\r | |
256 | mismatched Unicode character in FirstString.\r | |
257 | \r | |
258 | If FirstString is NULL, then ASSERT().\r | |
259 | If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r | |
260 | If SecondString is NULL, then ASSERT().\r | |
261 | If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r | |
262 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
263 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
264 | Null-terminator, then ASSERT().\r | |
265 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
266 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
267 | Null-terminator, then ASSERT().\r | |
268 | \r | |
269 | @param FirstString Pointer to a Null-terminated Unicode string.\r | |
270 | @param SecondString Pointer to a Null-terminated Unicode string.\r | |
271 | \r | |
1106ffe1 | 272 | @retval 0 FirstString is identical to SecondString.\r |
273 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 274 | \r |
275 | **/\r | |
276 | INTN\r | |
277 | EFIAPI\r | |
278 | StrCmp (\r | |
279 | IN CONST CHAR16 *FirstString,\r | |
280 | IN CONST CHAR16 *SecondString\r | |
281 | );\r | |
282 | \r | |
283 | \r | |
284 | /**\r | |
17f695ed | 285 | Compares up to a specified length the contents of two Null-terminated Unicode strings,\r |
286 | and returns the difference between the first mismatched Unicode characters.\r | |
287 | \r | |
ac644614 | 288 | This function compares the Null-terminated Unicode string FirstString to the\r |
289 | Null-terminated Unicode string SecondString. At most, Length Unicode\r | |
290 | characters will be compared. If Length is 0, then 0 is returned. If\r | |
291 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
292 | value returned is the first mismatched Unicode character in SecondString\r | |
293 | subtracted from the first mismatched Unicode character in FirstString.\r | |
294 | \r | |
295 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
296 | If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT().\r | |
297 | If Length > 0 and SecondString is NULL, then ASSERT().\r | |
298 | If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT().\r | |
299 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
300 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
301 | Null-terminator, then ASSERT().\r | |
302 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
303 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
304 | Null-terminator, then ASSERT().\r | |
305 | \r | |
306 | @param FirstString Pointer to a Null-terminated Unicode string.\r | |
307 | @param SecondString Pointer to a Null-terminated Unicode string.\r | |
308 | @param Length Maximum number of Unicode characters to compare.\r | |
309 | \r | |
1106ffe1 | 310 | @retval 0 FirstString is identical to SecondString.\r |
311 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 312 | \r |
313 | **/\r | |
314 | INTN\r | |
315 | EFIAPI\r | |
316 | StrnCmp (\r | |
317 | IN CONST CHAR16 *FirstString,\r | |
318 | IN CONST CHAR16 *SecondString,\r | |
319 | IN UINTN Length\r | |
320 | );\r | |
321 | \r | |
322 | \r | |
323 | /**\r | |
324 | Concatenates one Null-terminated Unicode string to another Null-terminated\r | |
325 | Unicode string, and returns the concatenated Unicode string.\r | |
326 | \r | |
327 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
328 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
329 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r | |
330 | Unicode String is returned. If Source and Destination overlap, then the\r | |
331 | results are undefined.\r | |
332 | \r | |
333 | If Destination is NULL, then ASSERT().\r | |
334 | If Destination is not aligned on a 16-bit bounadary, then ASSERT().\r | |
335 | If Source is NULL, then ASSERT().\r | |
336 | If Source is not aligned on a 16-bit bounadary, then ASSERT().\r | |
337 | If Source and Destination overlap, then ASSERT().\r | |
338 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
339 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
340 | Null-terminator, then ASSERT().\r | |
341 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
342 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
343 | Null-terminator, then ASSERT().\r | |
344 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
345 | and Source results in a Unicode string with more than\r | |
346 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
347 | Null-terminator, then ASSERT().\r | |
348 | \r | |
349 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
350 | @param Source Pointer to a Null-terminated Unicode string.\r | |
351 | \r | |
9aa049d9 | 352 | @return Destination.\r |
ac644614 | 353 | \r |
354 | **/\r | |
355 | CHAR16 *\r | |
356 | EFIAPI\r | |
357 | StrCat (\r | |
358 | IN OUT CHAR16 *Destination,\r | |
359 | IN CONST CHAR16 *Source\r | |
360 | );\r | |
361 | \r | |
362 | \r | |
363 | /**\r | |
17f695ed | 364 | Concatenates up to a specified length one Null-terminated Unicode to the end \r |
365 | of another Null-terminated Unicode string, and returns the concatenated \r | |
ac644614 | 366 | Unicode string.\r |
367 | \r | |
368 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
369 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
370 | Null-terminated Unicode string Destination, and Destination is returned. At\r | |
371 | most, Length Unicode characters are concatenated from Source to the end of\r | |
372 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
373 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
374 | the results are undefined.\r | |
375 | \r | |
376 | If Destination is NULL, then ASSERT().\r | |
377 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
378 | If Length > 0 and Source is NULL, then ASSERT().\r | |
379 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
380 | If Source and Destination overlap, then ASSERT().\r | |
381 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
382 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
383 | Null-terminator, then ASSERT().\r | |
384 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
385 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
386 | Null-terminator, then ASSERT().\r | |
387 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
388 | and Source results in a Unicode string with more than\r | |
389 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
390 | Null-terminator, then ASSERT().\r | |
391 | \r | |
392 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
393 | @param Source Pointer to a Null-terminated Unicode string.\r | |
394 | @param Length Maximum number of Unicode characters to concatenate from\r | |
395 | Source.\r | |
396 | \r | |
9aa049d9 | 397 | @return Destination.\r |
ac644614 | 398 | \r |
399 | **/\r | |
400 | CHAR16 *\r | |
401 | EFIAPI\r | |
402 | StrnCat (\r | |
403 | IN OUT CHAR16 *Destination,\r | |
404 | IN CONST CHAR16 *Source,\r | |
405 | IN UINTN Length\r | |
406 | );\r | |
407 | \r | |
408 | /**\r | |
9aa049d9 | 409 | Returns the first occurrence of a Null-terminated Unicode sub-string\r |
ac644614 | 410 | in a Null-terminated Unicode string.\r |
411 | \r | |
412 | This function scans the contents of the Null-terminated Unicode string\r | |
413 | specified by String and returns the first occurrence of SearchString.\r | |
414 | If SearchString is not found in String, then NULL is returned. If\r | |
415 | the length of SearchString is zero, then String is\r | |
416 | returned.\r | |
417 | \r | |
418 | If String is NULL, then ASSERT().\r | |
419 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
420 | If SearchString is NULL, then ASSERT().\r | |
421 | If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r | |
422 | \r | |
423 | If PcdMaximumUnicodeStringLength is not zero, and SearchString\r | |
424 | or String contains more than PcdMaximumUnicodeStringLength Unicode\r | |
425 | characters not including the Null-terminator, then ASSERT().\r | |
426 | \r | |
17f695ed | 427 | @param String Pointer to a Null-terminated Unicode string.\r |
428 | @param SearchString Pointer to a Null-terminated Unicode string to search for.\r | |
ac644614 | 429 | \r |
430 | @retval NULL If the SearchString does not appear in String.\r | |
1106ffe1 | 431 | @return others If there is a match.\r |
ac644614 | 432 | \r |
433 | **/\r | |
434 | CHAR16 *\r | |
435 | EFIAPI\r | |
436 | StrStr (\r | |
17f695ed | 437 | IN CONST CHAR16 *String,\r |
438 | IN CONST CHAR16 *SearchString\r | |
ac644614 | 439 | );\r |
440 | \r | |
441 | /**\r | |
442 | Convert a Null-terminated Unicode decimal string to a value of\r | |
443 | type UINTN.\r | |
444 | \r | |
445 | This function returns a value of type UINTN by interpreting the contents\r | |
446 | of the Unicode string specified by String as a decimal number. The format\r | |
447 | of the input Unicode string String is:\r | |
448 | \r | |
449 | [spaces] [decimal digits].\r | |
450 | \r | |
451 | The valid decimal digit character is in the range [0-9]. The\r | |
452 | function will ignore the pad space, which includes spaces or\r | |
453 | tab characters, before [decimal digits]. The running zero in the\r | |
454 | beginning of [decimal digits] will be ignored. Then, the function\r | |
455 | stops at the first character that is a not a valid decimal character\r | |
456 | or a Null-terminator, whichever one comes first.\r | |
457 | \r | |
458 | If String is NULL, then ASSERT().\r | |
459 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
460 | If String has only pad spaces, then 0 is returned.\r | |
461 | If String has no pad spaces or valid decimal digits,\r | |
462 | then 0 is returned.\r | |
463 | If the number represented by String overflows according\r | |
464 | to the range defined by UINTN, then ASSERT().\r | |
465 | \r | |
466 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
467 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
468 | the Null-terminator, then ASSERT().\r | |
469 | \r | |
17f695ed | 470 | @param String Pointer to a Null-terminated Unicode string.\r |
ac644614 | 471 | \r |
38bbd3d9 | 472 | @retval Value translated from String.\r |
ac644614 | 473 | \r |
474 | **/\r | |
475 | UINTN\r | |
476 | EFIAPI\r | |
477 | StrDecimalToUintn (\r | |
17f695ed | 478 | IN CONST CHAR16 *String\r |
ac644614 | 479 | );\r |
480 | \r | |
481 | /**\r | |
482 | Convert a Null-terminated Unicode decimal string to a value of\r | |
483 | type UINT64.\r | |
484 | \r | |
485 | This function returns a value of type UINT64 by interpreting the contents\r | |
486 | of the Unicode string specified by String as a decimal number. The format\r | |
487 | of the input Unicode string String is:\r | |
488 | \r | |
489 | [spaces] [decimal digits].\r | |
490 | \r | |
491 | The valid decimal digit character is in the range [0-9]. The\r | |
492 | function will ignore the pad space, which includes spaces or\r | |
493 | tab characters, before [decimal digits]. The running zero in the\r | |
494 | beginning of [decimal digits] will be ignored. Then, the function\r | |
495 | stops at the first character that is a not a valid decimal character\r | |
496 | or a Null-terminator, whichever one comes first.\r | |
497 | \r | |
498 | If String is NULL, then ASSERT().\r | |
499 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
500 | If String has only pad spaces, then 0 is returned.\r | |
501 | If String has no pad spaces or valid decimal digits,\r | |
502 | then 0 is returned.\r | |
503 | If the number represented by String overflows according\r | |
504 | to the range defined by UINT64, then ASSERT().\r | |
505 | \r | |
506 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
507 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
508 | the Null-terminator, then ASSERT().\r | |
509 | \r | |
17f695ed | 510 | @param String Pointer to a Null-terminated Unicode string.\r |
ac644614 | 511 | \r |
38bbd3d9 | 512 | @retval Value translated from String.\r |
ac644614 | 513 | \r |
514 | **/\r | |
515 | UINT64\r | |
516 | EFIAPI\r | |
517 | StrDecimalToUint64 (\r | |
17f695ed | 518 | IN CONST CHAR16 *String\r |
ac644614 | 519 | );\r |
520 | \r | |
521 | \r | |
522 | /**\r | |
523 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r | |
524 | \r | |
525 | This function returns a value of type UINTN by interpreting the contents\r | |
526 | of the Unicode string specified by String as a hexadecimal number.\r | |
527 | The format of the input Unicode string String is:\r | |
528 | \r | |
529 | [spaces][zeros][x][hexadecimal digits].\r | |
530 | \r | |
531 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
532 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
533 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
534 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
535 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
536 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
537 | first valid hexadecimal digit. Then, the function stops at the first character that is\r | |
538 | a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
539 | \r | |
540 | If String is NULL, then ASSERT().\r | |
541 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
542 | If String has only pad spaces, then zero is returned.\r | |
543 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
544 | then zero is returned.\r | |
545 | If the number represented by String overflows according to the range defined by\r | |
546 | UINTN, then ASSERT().\r | |
547 | \r | |
548 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
549 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
550 | then ASSERT().\r | |
551 | \r | |
17f695ed | 552 | @param String Pointer to a Null-terminated Unicode string.\r |
ac644614 | 553 | \r |
38bbd3d9 | 554 | @retval Value translated from String.\r |
ac644614 | 555 | \r |
556 | **/\r | |
557 | UINTN\r | |
558 | EFIAPI\r | |
559 | StrHexToUintn (\r | |
17f695ed | 560 | IN CONST CHAR16 *String\r |
ac644614 | 561 | );\r |
562 | \r | |
563 | \r | |
564 | /**\r | |
565 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r | |
566 | \r | |
567 | This function returns a value of type UINT64 by interpreting the contents\r | |
568 | of the Unicode string specified by String as a hexadecimal number.\r | |
569 | The format of the input Unicode string String is\r | |
570 | \r | |
571 | [spaces][zeros][x][hexadecimal digits].\r | |
572 | \r | |
573 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
574 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
575 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
576 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
577 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
578 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
579 | first valid hexadecimal digit. Then, the function stops at the first character that is\r | |
580 | a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
581 | \r | |
582 | If String is NULL, then ASSERT().\r | |
583 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
584 | If String has only pad spaces, then zero is returned.\r | |
585 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
586 | then zero is returned.\r | |
587 | If the number represented by String overflows according to the range defined by\r | |
588 | UINT64, then ASSERT().\r | |
589 | \r | |
590 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
591 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
592 | then ASSERT().\r | |
593 | \r | |
17f695ed | 594 | @param String Pointer to a Null-terminated Unicode string.\r |
ac644614 | 595 | \r |
38bbd3d9 | 596 | @retval Value translated from String.\r |
ac644614 | 597 | \r |
598 | **/\r | |
599 | UINT64\r | |
600 | EFIAPI\r | |
601 | StrHexToUint64 (\r | |
17f695ed | 602 | IN CONST CHAR16 *String\r |
ac644614 | 603 | );\r |
604 | \r | |
605 | /**\r | |
606 | Convert a nibble in the low 4 bits of a byte to a Unicode hexadecimal character.\r | |
607 | \r | |
608 | This function converts a nibble in the low 4 bits of a byte to a Unicode hexadecimal \r | |
609 | character For example, the nibble 0x01 and 0x0A will converted to L'1' and L'A' \r | |
610 | respectively.\r | |
611 | \r | |
612 | The upper nibble in the input byte will be masked off.\r | |
613 | \r | |
614 | @param Nibble The nibble which is in the low 4 bits of the input byte.\r | |
615 | \r | |
616 | @retval CHAR16 The Unicode hexadecimal character.\r | |
617 | \r | |
618 | **/\r | |
619 | CHAR16\r | |
620 | EFIAPI\r | |
621 | NibbleToHexChar (\r | |
622 | IN UINT8 Nibble\r | |
ed66e1bc | 623 | );\r |
ac644614 | 624 | \r |
625 | /** \r | |
626 | Convert binary buffer to a Unicode String in a specified sequence. \r | |
627 | \r | |
1106ffe1 | 628 | This function converts bytes in the memory block pointed by Buffer to a Unicode String Str. \r |
ac644614 | 629 | Each byte will be represented by two Unicode characters. For example, byte 0xA1 will \r |
630 | be converted into two Unicode character L'A' and L'1'. In the output String, the Unicode Character \r | |
631 | for the Most Significant Nibble will be put before the Unicode Character for the Least Significant\r | |
632 | Nibble. The output string for the buffer containing a single byte 0xA1 will be L"A1". \r | |
633 | For a buffer with multiple bytes, the Unicode character produced by the first byte will be put into the \r | |
634 | the last character in the output string. The one next to first byte will be put into the\r | |
635 | character before the last character. This rules applies to the rest of the bytes. The Unicode\r | |
636 | character by the last byte will be put into the first character in the output string. For example,\r | |
9aa049d9 | 637 | the input buffer for a 64-bits unsigned integer 0x12345678abcdef1234 will be converted to\r |
ac644614 | 638 | a Unicode string equal to L"12345678abcdef1234".\r |
639 | \r | |
640 | @param String On input, String is pointed to the buffer allocated for the convertion.\r | |
641 | @param StringLen The Length of String buffer to hold the output String. The length must include the tailing '\0' character.\r | |
642 | The StringLen required to convert a N bytes Buffer will be a least equal to or greater \r | |
643 | than 2*N + 1.\r | |
644 | @param Buffer The pointer to a input buffer.\r | |
9aa049d9 | 645 | @param BufferSizeInBytes Length in bytes of the input buffer.\r |
ac644614 | 646 | \r |
647 | \r | |
9aa049d9 | 648 | @retval EFI_SUCCESS The convertion is successful. All bytes in Buffer has been convert to the corresponding\r |
ac644614 | 649 | Unicode character and placed into the right place in String.\r |
650 | @retval EFI_BUFFER_TOO_SMALL StringSizeInBytes is smaller than 2 * N + 1the number of bytes required to\r | |
651 | complete the convertion. \r | |
652 | **/\r | |
653 | RETURN_STATUS\r | |
654 | EFIAPI\r | |
655 | BufToHexString (\r | |
656 | IN OUT CHAR16 *String,\r | |
657 | IN OUT UINTN *StringLen,\r | |
658 | IN CONST UINT8 *Buffer,\r | |
659 | IN UINTN BufferSizeInBytes\r | |
ed66e1bc | 660 | );\r |
ac644614 | 661 | \r |
662 | \r | |
663 | /**\r | |
664 | Convert a Unicode string consisting of hexadecimal characters to a output byte buffer.\r | |
665 | \r | |
666 | This function converts a Unicode string consisting of characters in the range of Hexadecimal\r | |
667 | character (L'0' to L'9', L'A' to L'F' and L'a' to L'f') to a output byte buffer. The function will stop\r | |
668 | at the first non-hexadecimal character or the NULL character. The convertion process can be\r | |
669 | simply viewed as the reverse operations defined by BufToHexString. Two Unicode characters will be \r | |
670 | converted into one byte. The first Unicode character represents the Most Significant Nibble and the\r | |
671 | second Unicode character represents the Least Significant Nibble in the output byte. \r | |
672 | The first pair of Unicode characters represents the last byte in the output buffer. The second pair of Unicode \r | |
673 | characters represent the the byte preceding the last byte. This rule applies to the rest pairs of bytes. \r | |
674 | The last pair represent the first byte in the output buffer. \r | |
675 | \r | |
676 | For example, a Unciode String L"12345678" will be converted into a buffer wil the following bytes \r | |
677 | (first byte is the byte in the lowest memory address): "0x78, 0x56, 0x34, 0x12".\r | |
678 | \r | |
679 | If String has N valid hexadecimal characters for conversion, the caller must make sure Buffer is at least \r | |
680 | N/2 (if N is even) or (N+1)/2 (if N if odd) bytes. \r | |
681 | \r | |
682 | @param Buffer The output buffer allocated by the caller.\r | |
683 | @param BufferSizeInBytes On input, the size in bytes of Buffer. On output, it is updated to \r | |
684 | contain the size of the Buffer which is actually used for the converstion.\r | |
685 | For Unicode string with 2*N hexadecimal characters (not including the \r | |
686 | tailing NULL character), N bytes of Buffer will be used for the output.\r | |
687 | @param String The input hexadecimal string.\r | |
688 | @param ConvertedStrLen The number of hexadecimal characters used to produce content in output\r | |
689 | buffer Buffer.\r | |
690 | \r | |
691 | @retval RETURN_BUFFER_TOO_SMALL The input BufferSizeInBytes is too small to hold the output. BufferSizeInBytes\r | |
692 | will be updated to the size required for the converstion.\r | |
693 | @retval RETURN_SUCCESS The convertion is successful or the first Unicode character from String\r | |
694 | is hexadecimal. If ConvertedStrLen is not NULL, it is updated\r | |
695 | to the number of hexadecimal character used for the converstion.\r | |
696 | **/\r | |
697 | RETURN_STATUS\r | |
698 | EFIAPI\r | |
699 | HexStringToBuf (\r | |
700 | OUT UINT8 *Buffer, \r | |
701 | IN OUT UINTN *BufferSizeInBytes,\r | |
702 | IN CONST CHAR16 *String,\r | |
703 | OUT UINTN *ConvertedStrLen OPTIONAL\r | |
ed66e1bc | 704 | );\r |
ac644614 | 705 | \r |
706 | \r | |
707 | /**\r | |
708 | Test if a Unicode character is a hexadecimal digit. If true, the input\r | |
709 | Unicode character is converted to a byte. \r | |
710 | \r | |
711 | This function tests if a Unicode character is a hexadecimal digit. If true, the input\r | |
712 | Unicode character is converted to a byte. For example, Unicode character\r | |
713 | L'A' will be converted to 0x0A. \r | |
714 | \r | |
715 | If Digit is NULL, then ASSERT.\r | |
716 | \r | |
1106ffe1 | 717 | @param Digit The output hexadecimal digit.\r |
718 | \r | |
719 | @param Char The input Unicode character.\r | |
720 | \r | |
ac644614 | 721 | @retval TRUE Char is in the range of Hexadecimal number. Digit is updated\r |
722 | to the byte value of the number.\r | |
723 | @retval FALSE Char is not in the range of Hexadecimal number. Digit is keep\r | |
724 | intact.\r | |
725 | \r | |
726 | **/\r | |
727 | BOOLEAN\r | |
728 | EFIAPI\r | |
729 | IsHexDigit (\r | |
730 | OUT UINT8 *Digit,\r | |
731 | IN CHAR16 Char\r | |
ed66e1bc | 732 | );\r |
ac644614 | 733 | \r |
734 | /**\r | |
17f695ed | 735 | Convert a Null-terminated Unicode string to a Null-terminated\r |
ac644614 | 736 | ASCII string and returns the ASCII string.\r |
737 | \r | |
738 | This function converts the content of the Unicode string Source\r | |
739 | to the ASCII string Destination by copying the lower 8 bits of\r | |
740 | each Unicode character. It returns Destination.\r | |
741 | \r | |
742 | If any Unicode characters in Source contain non-zero value in\r | |
743 | the upper 8 bits, then ASSERT().\r | |
744 | \r | |
745 | If Destination is NULL, then ASSERT().\r | |
746 | If Source is NULL, then ASSERT().\r | |
747 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
748 | If Source and Destination overlap, then ASSERT().\r | |
749 | \r | |
750 | If PcdMaximumUnicodeStringLength is not zero, and Source contains\r | |
751 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
752 | the Null-terminator, then ASSERT().\r | |
753 | \r | |
754 | If PcdMaximumAsciiStringLength is not zero, and Source contains more\r | |
755 | than PcdMaximumAsciiStringLength Unicode characters not including the\r | |
756 | Null-terminator, then ASSERT().\r | |
757 | \r | |
758 | @param Source Pointer to a Null-terminated Unicode string.\r | |
759 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
760 | \r | |
9aa049d9 | 761 | @return Destination.\r |
ac644614 | 762 | \r |
763 | **/\r | |
764 | CHAR8 *\r | |
765 | EFIAPI\r | |
766 | UnicodeStrToAsciiStr (\r | |
17f695ed | 767 | IN CONST CHAR16 *Source,\r |
768 | OUT CHAR8 *Destination\r | |
ac644614 | 769 | );\r |
770 | \r | |
771 | \r | |
772 | /**\r | |
773 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r | |
774 | string and returns the new ASCII string.\r | |
775 | \r | |
776 | This function copies the contents of the ASCII string Source to the ASCII\r | |
777 | string Destination, and returns Destination. If Source and Destination\r | |
778 | overlap, then the results are undefined.\r | |
779 | \r | |
780 | If Destination is NULL, then ASSERT().\r | |
781 | If Source is NULL, then ASSERT().\r | |
782 | If Source and Destination overlap, then ASSERT().\r | |
783 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
784 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
785 | then ASSERT().\r | |
786 | \r | |
787 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
788 | @param Source Pointer to a Null-terminated ASCII string.\r | |
789 | \r | |
790 | @return Destination\r | |
791 | \r | |
792 | **/\r | |
793 | CHAR8 *\r | |
794 | EFIAPI\r | |
795 | AsciiStrCpy (\r | |
796 | OUT CHAR8 *Destination,\r | |
797 | IN CONST CHAR8 *Source\r | |
798 | );\r | |
799 | \r | |
800 | \r | |
801 | /**\r | |
17f695ed | 802 | Copies up to a specified length one Null-terminated ASCII string to another \r |
803 | Null-terminated ASCII string and returns the new ASCII string.\r | |
ac644614 | 804 | \r |
805 | This function copies the contents of the ASCII string Source to the ASCII\r | |
806 | string Destination, and returns Destination. At most, Length ASCII characters\r | |
807 | are copied from Source to Destination. If Length is 0, then Destination is\r | |
808 | returned unmodified. If Length is greater that the number of ASCII characters\r | |
809 | in Source, then Destination is padded with Null ASCII characters. If Source\r | |
810 | and Destination overlap, then the results are undefined.\r | |
811 | \r | |
812 | If Destination is NULL, then ASSERT().\r | |
813 | If Source is NULL, then ASSERT().\r | |
814 | If Source and Destination overlap, then ASSERT().\r | |
815 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
816 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
817 | then ASSERT().\r | |
818 | \r | |
819 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
820 | @param Source Pointer to a Null-terminated ASCII string.\r | |
821 | @param Length Maximum number of ASCII characters to copy.\r | |
822 | \r | |
823 | @return Destination\r | |
824 | \r | |
825 | **/\r | |
826 | CHAR8 *\r | |
827 | EFIAPI\r | |
828 | AsciiStrnCpy (\r | |
829 | OUT CHAR8 *Destination,\r | |
830 | IN CONST CHAR8 *Source,\r | |
831 | IN UINTN Length\r | |
832 | );\r | |
833 | \r | |
834 | \r | |
835 | /**\r | |
836 | Returns the length of a Null-terminated ASCII string.\r | |
837 | \r | |
838 | This function returns the number of ASCII characters in the Null-terminated\r | |
839 | ASCII string specified by String.\r | |
840 | \r | |
841 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
842 | If Length > 0 and Source is NULL, then ASSERT().\r | |
843 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
844 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
845 | then ASSERT().\r | |
846 | \r | |
847 | @param String Pointer to a Null-terminated ASCII string.\r | |
848 | \r | |
849 | @return The length of String.\r | |
850 | \r | |
851 | **/\r | |
852 | UINTN\r | |
853 | EFIAPI\r | |
854 | AsciiStrLen (\r | |
855 | IN CONST CHAR8 *String\r | |
856 | );\r | |
857 | \r | |
858 | \r | |
859 | /**\r | |
860 | Returns the size of a Null-terminated ASCII string in bytes, including the\r | |
861 | Null terminator.\r | |
862 | \r | |
863 | This function returns the size, in bytes, of the Null-terminated ASCII string\r | |
864 | specified by String.\r | |
865 | \r | |
866 | If String is NULL, then ASSERT().\r | |
867 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
868 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
869 | then ASSERT().\r | |
870 | \r | |
871 | @param String Pointer to a Null-terminated ASCII string.\r | |
872 | \r | |
873 | @return The size of String.\r | |
874 | \r | |
875 | **/\r | |
876 | UINTN\r | |
877 | EFIAPI\r | |
878 | AsciiStrSize (\r | |
879 | IN CONST CHAR8 *String\r | |
880 | );\r | |
881 | \r | |
882 | \r | |
883 | /**\r | |
884 | Compares two Null-terminated ASCII strings, and returns the difference\r | |
885 | between the first mismatched ASCII characters.\r | |
886 | \r | |
887 | This function compares the Null-terminated ASCII string FirstString to the\r | |
888 | Null-terminated ASCII string SecondString. If FirstString is identical to\r | |
889 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
890 | mismatched ASCII character in SecondString subtracted from the first\r | |
891 | mismatched ASCII character in FirstString.\r | |
892 | \r | |
893 | If FirstString is NULL, then ASSERT().\r | |
894 | If SecondString is NULL, then ASSERT().\r | |
895 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
896 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
897 | then ASSERT().\r | |
898 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
899 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
900 | Null-terminator, then ASSERT().\r | |
901 | \r | |
902 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
903 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
904 | \r | |
17f695ed | 905 | @retval ==0 FirstString is identical to SecondString.\r |
906 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 907 | \r |
908 | **/\r | |
909 | INTN\r | |
910 | EFIAPI\r | |
911 | AsciiStrCmp (\r | |
912 | IN CONST CHAR8 *FirstString,\r | |
913 | IN CONST CHAR8 *SecondString\r | |
914 | );\r | |
915 | \r | |
916 | \r | |
917 | /**\r | |
918 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r | |
919 | and returns the difference between the first mismatched ASCII characters.\r | |
920 | \r | |
921 | This function performs a case insensitive comparison of the Null-terminated\r | |
922 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r | |
923 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
924 | value returned is the first mismatched lower case ASCII character in\r | |
925 | SecondString subtracted from the first mismatched lower case ASCII character\r | |
926 | in FirstString.\r | |
927 | \r | |
928 | If FirstString is NULL, then ASSERT().\r | |
929 | If SecondString is NULL, then ASSERT().\r | |
930 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
931 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
932 | then ASSERT().\r | |
933 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
934 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
935 | Null-terminator, then ASSERT().\r | |
936 | \r | |
937 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
938 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
939 | \r | |
17f695ed | 940 | @retval ==0 FirstString is identical to SecondString using case insensitive\r |
1106ffe1 | 941 | comparisons.\r |
17f695ed | 942 | @retval !=0 FirstString is not identical to SecondString using case\r |
1106ffe1 | 943 | insensitive comparisons.\r |
ac644614 | 944 | \r |
945 | **/\r | |
946 | INTN\r | |
947 | EFIAPI\r | |
948 | AsciiStriCmp (\r | |
949 | IN CONST CHAR8 *FirstString,\r | |
950 | IN CONST CHAR8 *SecondString\r | |
951 | );\r | |
952 | \r | |
953 | \r | |
954 | /**\r | |
955 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r | |
956 | the difference between the first mismatched ASCII characters.\r | |
957 | \r | |
958 | This function compares the Null-terminated ASCII string FirstString to the\r | |
959 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r | |
960 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r | |
961 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r | |
962 | is the first mismatched ASCII character in SecondString subtracted from the\r | |
963 | first mismatched ASCII character in FirstString.\r | |
964 | \r | |
965 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
966 | If Length > 0 and SecondString is NULL, then ASSERT().\r | |
967 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
968 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
969 | then ASSERT().\r | |
970 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more than\r | |
971 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
972 | then ASSERT().\r | |
973 | \r | |
974 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
975 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
976 | @param Length Maximum number of ASCII characters for compare.\r | |
977 | \r | |
17f695ed | 978 | @retval ==0 FirstString is identical to SecondString.\r |
979 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 980 | \r |
981 | **/\r | |
982 | INTN\r | |
983 | EFIAPI\r | |
984 | AsciiStrnCmp (\r | |
985 | IN CONST CHAR8 *FirstString,\r | |
986 | IN CONST CHAR8 *SecondString,\r | |
987 | IN UINTN Length\r | |
988 | );\r | |
989 | \r | |
990 | \r | |
991 | /**\r | |
992 | Concatenates one Null-terminated ASCII string to another Null-terminated\r | |
993 | ASCII string, and returns the concatenated ASCII string.\r | |
994 | \r | |
995 | This function concatenates two Null-terminated ASCII strings. The contents of\r | |
996 | Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
997 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r | |
998 | String is returned.\r | |
999 | \r | |
1000 | If Destination is NULL, then ASSERT().\r | |
1001 | If Source is NULL, then ASSERT().\r | |
1002 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r | |
1003 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1004 | then ASSERT().\r | |
1005 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
1006 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1007 | then ASSERT().\r | |
1008 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r | |
1009 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
1010 | ASCII characters, then ASSERT().\r | |
1011 | \r | |
1012 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
1013 | @param Source Pointer to a Null-terminated ASCII string.\r | |
1014 | \r | |
1015 | @return Destination\r | |
1016 | \r | |
1017 | **/\r | |
1018 | CHAR8 *\r | |
1019 | EFIAPI\r | |
1020 | AsciiStrCat (\r | |
1021 | IN OUT CHAR8 *Destination,\r | |
1022 | IN CONST CHAR8 *Source\r | |
1023 | );\r | |
1024 | \r | |
1025 | \r | |
1026 | /**\r | |
17f695ed | 1027 | Concatenates up to a specified length one Null-terminated ASCII string to \r |
1028 | the end of another Null-terminated ASCII string, and returns the \r | |
1029 | concatenated ASCII string.\r | |
ac644614 | 1030 | \r |
1031 | This function concatenates two Null-terminated ASCII strings. The contents\r | |
1032 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
1033 | terminated ASCII string Destination, and Destination is returned. At most,\r | |
1034 | Length ASCII characters are concatenated from Source to the end of\r | |
1035 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
1036 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
1037 | the results are undefined.\r | |
1038 | \r | |
1039 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
1040 | If Length > 0 and Source is NULL, then ASSERT().\r | |
1041 | If Source and Destination overlap, then ASSERT().\r | |
1042 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r | |
1043 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1044 | then ASSERT().\r | |
1045 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
1046 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1047 | then ASSERT().\r | |
1048 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r | |
1049 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
1050 | ASCII characters not including the Null-terminator, then ASSERT().\r | |
1051 | \r | |
1052 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
1053 | @param Source Pointer to a Null-terminated ASCII string.\r | |
1054 | @param Length Maximum number of ASCII characters to concatenate from\r | |
1055 | Source.\r | |
1056 | \r | |
1057 | @return Destination\r | |
1058 | \r | |
1059 | **/\r | |
1060 | CHAR8 *\r | |
1061 | EFIAPI\r | |
1062 | AsciiStrnCat (\r | |
1063 | IN OUT CHAR8 *Destination,\r | |
1064 | IN CONST CHAR8 *Source,\r | |
1065 | IN UINTN Length\r | |
1066 | );\r | |
1067 | \r | |
1068 | \r | |
1069 | /**\r | |
9aa049d9 | 1070 | Returns the first occurrence of a Null-terminated ASCII sub-string\r |
ac644614 | 1071 | in a Null-terminated ASCII string.\r |
1072 | \r | |
1073 | This function scans the contents of the ASCII string specified by String\r | |
1074 | and returns the first occurrence of SearchString. If SearchString is not\r | |
1075 | found in String, then NULL is returned. If the length of SearchString is zero,\r | |
1076 | then String is returned.\r | |
1077 | \r | |
1078 | If String is NULL, then ASSERT().\r | |
1079 | If SearchString is NULL, then ASSERT().\r | |
1080 | \r | |
1081 | If PcdMaximumAsciiStringLength is not zero, and SearchString or\r | |
1082 | String contains more than PcdMaximumAsciiStringLength Unicode characters\r | |
1083 | not including the Null-terminator, then ASSERT().\r | |
1084 | \r | |
1106ffe1 | 1085 | @param String Pointer to a Null-terminated ASCII string.\r |
1086 | @param SearchString Pointer to a Null-terminated ASCII string to search for.\r | |
ac644614 | 1087 | \r |
1088 | @retval NULL If the SearchString does not appear in String.\r | |
17f695ed | 1089 | @retval others If there is a match return the first occurrence of SearchingString.\r |
9aa049d9 | 1090 | If the length of SearchString is zero,return String.\r |
ac644614 | 1091 | \r |
1092 | **/\r | |
1093 | CHAR8 *\r | |
1094 | EFIAPI\r | |
1095 | AsciiStrStr (\r | |
17f695ed | 1096 | IN CONST CHAR8 *String,\r |
1097 | IN CONST CHAR8 *SearchString\r | |
ac644614 | 1098 | );\r |
1099 | \r | |
1100 | \r | |
1101 | /**\r | |
1102 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
1103 | UINTN.\r | |
1104 | \r | |
1105 | This function returns a value of type UINTN by interpreting the contents\r | |
1106 | of the ASCII string String as a decimal number. The format of the input\r | |
1107 | ASCII string String is:\r | |
1108 | \r | |
1109 | [spaces] [decimal digits].\r | |
1110 | \r | |
1111 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1112 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1113 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1114 | function stops at the first character that is a not a valid decimal character or\r | |
1115 | Null-terminator, whichever on comes first.\r | |
1116 | \r | |
1117 | If String has only pad spaces, then 0 is returned.\r | |
1118 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1119 | If the number represented by String overflows according to the range defined by\r | |
1120 | UINTN, then ASSERT().\r | |
1121 | If String is NULL, then ASSERT().\r | |
1122 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1123 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1124 | then ASSERT().\r | |
1125 | \r | |
17f695ed | 1126 | @param String Pointer to a Null-terminated ASCII string.\r |
ac644614 | 1127 | \r |
38bbd3d9 | 1128 | @retval Value translated from String.\r |
ac644614 | 1129 | \r |
1130 | **/\r | |
1131 | UINTN\r | |
1132 | EFIAPI\r | |
1133 | AsciiStrDecimalToUintn (\r | |
1134 | IN CONST CHAR8 *String\r | |
1135 | );\r | |
1136 | \r | |
1137 | \r | |
1138 | /**\r | |
1139 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
1140 | UINT64.\r | |
1141 | \r | |
1142 | This function returns a value of type UINT64 by interpreting the contents\r | |
1143 | of the ASCII string String as a decimal number. The format of the input\r | |
1144 | ASCII string String is:\r | |
1145 | \r | |
1146 | [spaces] [decimal digits].\r | |
1147 | \r | |
1148 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1149 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1150 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1151 | function stops at the first character that is a not a valid decimal character or\r | |
1152 | Null-terminator, whichever on comes first.\r | |
1153 | \r | |
1154 | If String has only pad spaces, then 0 is returned.\r | |
1155 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1156 | If the number represented by String overflows according to the range defined by\r | |
1157 | UINT64, then ASSERT().\r | |
1158 | If String is NULL, then ASSERT().\r | |
1159 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1160 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1161 | then ASSERT().\r | |
1162 | \r | |
17f695ed | 1163 | @param String Pointer to a Null-terminated ASCII string.\r |
ac644614 | 1164 | \r |
38bbd3d9 | 1165 | @retval Value translated from String.\r |
ac644614 | 1166 | \r |
1167 | **/\r | |
1168 | UINT64\r | |
1169 | EFIAPI\r | |
1170 | AsciiStrDecimalToUint64 (\r | |
17f695ed | 1171 | IN CONST CHAR8 *String\r |
ac644614 | 1172 | );\r |
1173 | \r | |
1174 | \r | |
1175 | /**\r | |
1176 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r | |
1177 | \r | |
1178 | This function returns a value of type UINTN by interpreting the contents of\r | |
1179 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1180 | string String is:\r | |
1181 | \r | |
1182 | [spaces][zeros][x][hexadecimal digits].\r | |
1183 | \r | |
1184 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1185 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1186 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1187 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1188 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1189 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1190 | digit. Then, the function stops at the first character that is a not a valid\r | |
1191 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1192 | \r | |
1193 | If String has only pad spaces, then 0 is returned.\r | |
1194 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1195 | 0 is returned.\r | |
1196 | \r | |
1197 | If the number represented by String overflows according to the range defined by UINTN,\r | |
1198 | then ASSERT().\r | |
1199 | If String is NULL, then ASSERT().\r | |
1200 | If PcdMaximumAsciiStringLength is not zero,\r | |
1201 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1202 | the Null-terminator, then ASSERT().\r | |
1203 | \r | |
17f695ed | 1204 | @param String Pointer to a Null-terminated ASCII string.\r |
ac644614 | 1205 | \r |
38bbd3d9 | 1206 | @retval Value translated from String.\r |
ac644614 | 1207 | \r |
1208 | **/\r | |
1209 | UINTN\r | |
1210 | EFIAPI\r | |
1211 | AsciiStrHexToUintn (\r | |
17f695ed | 1212 | IN CONST CHAR8 *String\r |
ac644614 | 1213 | );\r |
1214 | \r | |
1215 | \r | |
1216 | /**\r | |
1217 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r | |
1218 | \r | |
1219 | This function returns a value of type UINT64 by interpreting the contents of\r | |
1220 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1221 | string String is:\r | |
1222 | \r | |
1223 | [spaces][zeros][x][hexadecimal digits].\r | |
1224 | \r | |
1225 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1226 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1227 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1228 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1229 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1230 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1231 | digit. Then, the function stops at the first character that is a not a valid\r | |
1232 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1233 | \r | |
1234 | If String has only pad spaces, then 0 is returned.\r | |
1235 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1236 | 0 is returned.\r | |
1237 | \r | |
1238 | If the number represented by String overflows according to the range defined by UINT64,\r | |
1239 | then ASSERT().\r | |
1240 | If String is NULL, then ASSERT().\r | |
1241 | If PcdMaximumAsciiStringLength is not zero,\r | |
1242 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1243 | the Null-terminator, then ASSERT().\r | |
1244 | \r | |
17f695ed | 1245 | @param String Pointer to a Null-terminated ASCII string.\r |
ac644614 | 1246 | \r |
38bbd3d9 | 1247 | @retval Value translated from String.\r |
ac644614 | 1248 | \r |
1249 | **/\r | |
1250 | UINT64\r | |
1251 | EFIAPI\r | |
1252 | AsciiStrHexToUint64 (\r | |
17f695ed | 1253 | IN CONST CHAR8 *String\r |
ac644614 | 1254 | );\r |
1255 | \r | |
1256 | \r | |
1257 | /**\r | |
1258 | Convert one Null-terminated ASCII string to a Null-terminated\r | |
1259 | Unicode string and returns the Unicode string.\r | |
1260 | \r | |
1261 | This function converts the contents of the ASCII string Source to the Unicode\r | |
1262 | string Destination, and returns Destination. The function terminates the\r | |
1263 | Unicode string Destination by appending a Null-terminator character at the end.\r | |
1264 | The caller is responsible to make sure Destination points to a buffer with size\r | |
1265 | equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r | |
1266 | \r | |
1267 | If Destination is NULL, then ASSERT().\r | |
1268 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
1269 | If Source is NULL, then ASSERT().\r | |
1270 | If Source and Destination overlap, then ASSERT().\r | |
1271 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
1272 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1273 | then ASSERT().\r | |
1274 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
1275 | PcdMaximumUnicodeStringLength ASCII characters not including the\r | |
1276 | Null-terminator, then ASSERT().\r | |
1277 | \r | |
1278 | @param Source Pointer to a Null-terminated ASCII string.\r | |
1279 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
1280 | \r | |
9aa049d9 | 1281 | @return Destination.\r |
ac644614 | 1282 | \r |
1283 | **/\r | |
1284 | CHAR16 *\r | |
1285 | EFIAPI\r | |
1286 | AsciiStrToUnicodeStr (\r | |
17f695ed | 1287 | IN CONST CHAR8 *Source,\r |
1288 | OUT CHAR16 *Destination\r | |
ac644614 | 1289 | );\r |
1290 | \r | |
1291 | \r | |
1292 | /**\r | |
1293 | Converts an 8-bit value to an 8-bit BCD value.\r | |
1294 | \r | |
1295 | Converts the 8-bit value specified by Value to BCD. The BCD value is\r | |
1296 | returned.\r | |
1297 | \r | |
1298 | If Value >= 100, then ASSERT().\r | |
1299 | \r | |
1300 | @param Value The 8-bit value to convert to BCD. Range 0..99.\r | |
1301 | \r | |
9aa049d9 | 1302 | @return The BCD value.\r |
ac644614 | 1303 | \r |
1304 | **/\r | |
1305 | UINT8\r | |
1306 | EFIAPI\r | |
1307 | DecimalToBcd8 (\r | |
1308 | IN UINT8 Value\r | |
1309 | );\r | |
1310 | \r | |
1311 | \r | |
1312 | /**\r | |
1313 | Converts an 8-bit BCD value to an 8-bit value.\r | |
1314 | \r | |
1315 | Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r | |
1316 | value is returned.\r | |
1317 | \r | |
1318 | If Value >= 0xA0, then ASSERT().\r | |
1319 | If (Value & 0x0F) >= 0x0A, then ASSERT().\r | |
1320 | \r | |
1321 | @param Value The 8-bit BCD value to convert to an 8-bit value.\r | |
1322 | \r | |
1323 | @return The 8-bit value is returned.\r | |
1324 | \r | |
1325 | **/\r | |
1326 | UINT8\r | |
1327 | EFIAPI\r | |
1328 | BcdToDecimal8 (\r | |
1329 | IN UINT8 Value\r | |
1330 | );\r | |
1331 | \r | |
1332 | \r | |
1333 | //\r | |
1334 | // Linked List Functions and Macros\r | |
1335 | //\r | |
1336 | \r | |
1337 | /**\r | |
1338 | Initializes the head node of a doubly linked list that is declared as a\r | |
1339 | global variable in a module.\r | |
1340 | \r | |
1341 | Initializes the forward and backward links of a new linked list. After\r | |
1342 | initializing a linked list with this macro, the other linked list functions\r | |
1343 | may be used to add and remove nodes from the linked list. This macro results\r | |
1344 | in smaller executables by initializing the linked list in the data section,\r | |
1345 | instead if calling the InitializeListHead() function to perform the\r | |
1346 | equivalent operation.\r | |
1347 | \r | |
1348 | @param ListHead The head note of a list to initiailize.\r | |
1349 | \r | |
1350 | **/\r | |
17f695ed | 1351 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}\r |
ac644614 | 1352 | \r |
1353 | \r | |
1354 | /**\r | |
1355 | Initializes the head node of a doubly linked list, and returns the pointer to\r | |
1356 | the head node of the doubly linked list.\r | |
1357 | \r | |
1358 | Initializes the forward and backward links of a new linked list. After\r | |
1359 | initializing a linked list with this function, the other linked list\r | |
1360 | functions may be used to add and remove nodes from the linked list. It is up\r | |
1361 | to the caller of this function to allocate the memory for ListHead.\r | |
1362 | \r | |
1363 | If ListHead is NULL, then ASSERT().\r | |
1364 | \r | |
1365 | @param ListHead A pointer to the head node of a new doubly linked list.\r | |
1366 | \r | |
1367 | @return ListHead\r | |
1368 | \r | |
1369 | **/\r | |
1370 | LIST_ENTRY *\r | |
1371 | EFIAPI\r | |
1372 | InitializeListHead (\r | |
aa0583c7 | 1373 | IN OUT LIST_ENTRY *ListHead\r |
ac644614 | 1374 | );\r |
1375 | \r | |
1376 | \r | |
1377 | /**\r | |
1378 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r | |
1379 | to the head node of the doubly linked list.\r | |
1380 | \r | |
1381 | Adds the node Entry at the beginning of the doubly linked list denoted by\r | |
1382 | ListHead, and returns ListHead.\r | |
1383 | \r | |
1384 | If ListHead is NULL, then ASSERT().\r | |
1385 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1386 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1387 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1388 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
1389 | of nodes in ListHead, including the ListHead node, is greater than or\r | |
1390 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1391 | \r | |
1392 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1393 | @param Entry A pointer to a node that is to be inserted at the beginning\r | |
1394 | of a doubly linked list.\r | |
1395 | \r | |
1396 | @return ListHead\r | |
1397 | \r | |
1398 | **/\r | |
1399 | LIST_ENTRY *\r | |
1400 | EFIAPI\r | |
1401 | InsertHeadList (\r | |
aa0583c7 | 1402 | IN OUT LIST_ENTRY *ListHead,\r |
1403 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1404 | );\r |
1405 | \r | |
1406 | \r | |
1407 | /**\r | |
1408 | Adds a node to the end of a doubly linked list, and returns the pointer to\r | |
1409 | the head node of the doubly linked list.\r | |
1410 | \r | |
1411 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r | |
1412 | and returns ListHead.\r | |
1413 | \r | |
1414 | If ListHead is NULL, then ASSERT().\r | |
1415 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1416 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1417 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1418 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
1419 | of nodes in ListHead, including the ListHead node, is greater than or\r | |
1420 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1421 | \r | |
1422 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1423 | @param Entry A pointer to a node that is to be added at the end of the\r | |
1424 | doubly linked list.\r | |
1425 | \r | |
1426 | @return ListHead\r | |
1427 | \r | |
1428 | **/\r | |
1429 | LIST_ENTRY *\r | |
1430 | EFIAPI\r | |
1431 | InsertTailList (\r | |
aa0583c7 | 1432 | IN OUT LIST_ENTRY *ListHead,\r |
1433 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1434 | );\r |
1435 | \r | |
1436 | \r | |
1437 | /**\r | |
1438 | Retrieves the first node of a doubly linked list.\r | |
1439 | \r | |
17f695ed | 1440 | Returns the first node of a doubly linked list. List must have been \r |
1441 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r | |
1442 | If List is empty, then List is returned.\r | |
ac644614 | 1443 | \r |
1444 | If List is NULL, then ASSERT().\r | |
17f695ed | 1445 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1446 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1447 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1448 | in List, including the List node, is greater than or equal to\r | |
1449 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1450 | \r | |
1451 | @param List A pointer to the head node of a doubly linked list.\r | |
1452 | \r | |
1453 | @return The first node of a doubly linked list.\r | |
1454 | @retval NULL The list is empty.\r | |
1455 | \r | |
1456 | **/\r | |
1457 | LIST_ENTRY *\r | |
1458 | EFIAPI\r | |
1459 | GetFirstNode (\r | |
1460 | IN CONST LIST_ENTRY *List\r | |
1461 | );\r | |
1462 | \r | |
1463 | \r | |
1464 | /**\r | |
1465 | Retrieves the next node of a doubly linked list.\r | |
1466 | \r | |
17f695ed | 1467 | Returns the node of a doubly linked list that follows Node. \r |
1468 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
1469 | or InitializeListHead(). If List is empty, then List is returned.\r | |
ac644614 | 1470 | \r |
1471 | If List is NULL, then ASSERT().\r | |
1472 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1473 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1474 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1475 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r |
1476 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
1477 | If Node is not a node in List, then ASSERT().\r | |
1478 | \r | |
1479 | @param List A pointer to the head node of a doubly linked list.\r | |
1480 | @param Node A pointer to a node in the doubly linked list.\r | |
1481 | \r | |
1482 | @return Pointer to the next node if one exists. Otherwise a null value which\r | |
1483 | is actually List is returned.\r | |
1484 | \r | |
1485 | **/\r | |
1486 | LIST_ENTRY *\r | |
1487 | EFIAPI\r | |
1488 | GetNextNode (\r | |
1489 | IN CONST LIST_ENTRY *List,\r | |
1490 | IN CONST LIST_ENTRY *Node\r | |
1491 | );\r | |
1492 | \r | |
1493 | \r | |
1494 | /**\r | |
1495 | Checks to see if a doubly linked list is empty or not.\r | |
1496 | \r | |
1497 | Checks to see if the doubly linked list is empty. If the linked list contains\r | |
1498 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r | |
1499 | \r | |
1500 | If ListHead is NULL, then ASSERT().\r | |
17f695ed | 1501 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1502 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1503 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1504 | in List, including the List node, is greater than or equal to\r | |
1505 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1506 | \r | |
1507 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1508 | \r | |
1509 | @retval TRUE The linked list is empty.\r | |
1510 | @retval FALSE The linked list is not empty.\r | |
1511 | \r | |
1512 | **/\r | |
1513 | BOOLEAN\r | |
1514 | EFIAPI\r | |
1515 | IsListEmpty (\r | |
1516 | IN CONST LIST_ENTRY *ListHead\r | |
1517 | );\r | |
1518 | \r | |
1519 | \r | |
1520 | /**\r | |
aa0583c7 | 1521 | Determines if a node in a doubly linked list is the head node of a the same\r |
1522 | doubly linked list. This function is typically used to terminate a loop that\r | |
1523 | traverses all the nodes in a doubly linked list starting with the head node.\r | |
ac644614 | 1524 | \r |
aa0583c7 | 1525 | Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the\r |
1526 | nodes in the doubly linked list specified by List. List must have been\r | |
17f695ed | 1527 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1528 | \r |
1529 | If List is NULL, then ASSERT().\r | |
1530 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1531 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r |
1532 | then ASSERT().\r | |
ac644614 | 1533 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1534 | in List, including the List node, is greater than or equal to\r | |
1535 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1536 | If Node is not a node in List and Node is not equal to List, then ASSERT().\r | |
1537 | \r | |
1538 | @param List A pointer to the head node of a doubly linked list.\r | |
1539 | @param Node A pointer to a node in the doubly linked list.\r | |
1540 | \r | |
1541 | @retval TRUE Node is one of the nodes in the doubly linked list.\r | |
1542 | @retval FALSE Node is not one of the nodes in the doubly linked list.\r | |
1543 | \r | |
1544 | **/\r | |
1545 | BOOLEAN\r | |
1546 | EFIAPI\r | |
1547 | IsNull (\r | |
1548 | IN CONST LIST_ENTRY *List,\r | |
1549 | IN CONST LIST_ENTRY *Node\r | |
1550 | );\r | |
1551 | \r | |
1552 | \r | |
1553 | /**\r | |
1554 | Determines if a node the last node in a doubly linked list.\r | |
1555 | \r | |
1556 | Returns TRUE if Node is the last node in the doubly linked list specified by\r | |
1557 | List. Otherwise, FALSE is returned. List must have been initialized with\r | |
17f695ed | 1558 | INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1559 | \r |
1560 | If List is NULL, then ASSERT().\r | |
1561 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1562 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1563 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1564 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1565 | in List, including the List node, is greater than or equal to\r | |
1566 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1567 | If Node is not a node in List, then ASSERT().\r | |
1568 | \r | |
1569 | @param List A pointer to the head node of a doubly linked list.\r | |
1570 | @param Node A pointer to a node in the doubly linked list.\r | |
1571 | \r | |
1572 | @retval TRUE Node is the last node in the linked list.\r | |
1573 | @retval FALSE Node is not the last node in the linked list.\r | |
1574 | \r | |
1575 | **/\r | |
1576 | BOOLEAN\r | |
1577 | EFIAPI\r | |
1578 | IsNodeAtEnd (\r | |
1579 | IN CONST LIST_ENTRY *List,\r | |
1580 | IN CONST LIST_ENTRY *Node\r | |
1581 | );\r | |
1582 | \r | |
1583 | \r | |
1584 | /**\r | |
1585 | Swaps the location of two nodes in a doubly linked list, and returns the\r | |
1586 | first node after the swap.\r | |
1587 | \r | |
1588 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r | |
1589 | Otherwise, the location of the FirstEntry node is swapped with the location\r | |
1590 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r | |
1591 | same double linked list as FirstEntry and that double linked list must have\r | |
17f695ed | 1592 | been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r |
1593 | SecondEntry is returned after the nodes are swapped.\r | |
ac644614 | 1594 | \r |
1595 | If FirstEntry is NULL, then ASSERT().\r | |
1596 | If SecondEntry is NULL, then ASSERT().\r | |
1597 | If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().\r | |
1598 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r | |
1599 | linked list containing the FirstEntry and SecondEntry nodes, including\r | |
1600 | the FirstEntry and SecondEntry nodes, is greater than or equal to\r | |
1601 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1602 | \r | |
1603 | @param FirstEntry A pointer to a node in a linked list.\r | |
1604 | @param SecondEntry A pointer to another node in the same linked list.\r | |
38bbd3d9 | 1605 | \r |
9aa049d9 | 1606 | @return SecondEntry.\r |
ac644614 | 1607 | \r |
1608 | **/\r | |
1609 | LIST_ENTRY *\r | |
1610 | EFIAPI\r | |
1611 | SwapListEntries (\r | |
aa0583c7 | 1612 | IN OUT LIST_ENTRY *FirstEntry,\r |
1613 | IN OUT LIST_ENTRY *SecondEntry\r | |
ac644614 | 1614 | );\r |
1615 | \r | |
1616 | \r | |
1617 | /**\r | |
1618 | Removes a node from a doubly linked list, and returns the node that follows\r | |
1619 | the removed node.\r | |
1620 | \r | |
1621 | Removes the node Entry from a doubly linked list. It is up to the caller of\r | |
1622 | this function to release the memory used by this node if that is required. On\r | |
1623 | exit, the node following Entry in the doubly linked list is returned. If\r | |
1624 | Entry is the only node in the linked list, then the head node of the linked\r | |
1625 | list is returned.\r | |
1626 | \r | |
1627 | If Entry is NULL, then ASSERT().\r | |
1628 | If Entry is the head node of an empty list, then ASSERT().\r | |
1629 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r | |
1630 | linked list containing Entry, including the Entry node, is greater than\r | |
1631 | or equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1632 | \r | |
9aa049d9 | 1633 | @param Entry A pointer to a node in a linked list.\r |
ac644614 | 1634 | \r |
9aa049d9 | 1635 | @return Entry.\r |
ac644614 | 1636 | \r |
1637 | **/\r | |
1638 | LIST_ENTRY *\r | |
1639 | EFIAPI\r | |
1640 | RemoveEntryList (\r | |
1641 | IN CONST LIST_ENTRY *Entry\r | |
1642 | );\r | |
1643 | \r | |
1644 | //\r | |
1645 | // Math Services\r | |
1646 | //\r | |
1647 | \r | |
1648 | /**\r | |
1649 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r | |
1650 | with zeros. The shifted value is returned.\r | |
1651 | \r | |
1652 | This function shifts the 64-bit value Operand to the left by Count bits. The\r | |
1653 | low Count bits are set to zero. The shifted value is returned.\r | |
1654 | \r | |
1655 | If Count is greater than 63, then ASSERT().\r | |
1656 | \r | |
1657 | @param Operand The 64-bit operand to shift left.\r | |
1658 | @param Count The number of bits to shift left.\r | |
1659 | \r | |
9aa049d9 | 1660 | @return Operand << Count.\r |
ac644614 | 1661 | \r |
1662 | **/\r | |
1663 | UINT64\r | |
1664 | EFIAPI\r | |
1665 | LShiftU64 (\r | |
1666 | IN UINT64 Operand,\r | |
1667 | IN UINTN Count\r | |
1668 | );\r | |
1669 | \r | |
1670 | \r | |
1671 | /**\r | |
1672 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r | |
1673 | filled with zeros. The shifted value is returned.\r | |
1674 | \r | |
1675 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1676 | high Count bits are set to zero. The shifted value is returned.\r | |
1677 | \r | |
1678 | If Count is greater than 63, then ASSERT().\r | |
1679 | \r | |
1680 | @param Operand The 64-bit operand to shift right.\r | |
1681 | @param Count The number of bits to shift right.\r | |
1682 | \r | |
1683 | @return Operand >> Count\r | |
1684 | \r | |
1685 | **/\r | |
1686 | UINT64\r | |
1687 | EFIAPI\r | |
1688 | RShiftU64 (\r | |
1689 | IN UINT64 Operand,\r | |
1690 | IN UINTN Count\r | |
1691 | );\r | |
1692 | \r | |
1693 | \r | |
1694 | /**\r | |
1695 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r | |
1696 | with original integer's bit 63. The shifted value is returned.\r | |
1697 | \r | |
1698 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1699 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r | |
1700 | \r | |
1701 | If Count is greater than 63, then ASSERT().\r | |
1702 | \r | |
1703 | @param Operand The 64-bit operand to shift right.\r | |
1704 | @param Count The number of bits to shift right.\r | |
1705 | \r | |
1706 | @return Operand >> Count\r | |
1707 | \r | |
1708 | **/\r | |
1709 | UINT64\r | |
1710 | EFIAPI\r | |
1711 | ARShiftU64 (\r | |
1712 | IN UINT64 Operand,\r | |
1713 | IN UINTN Count\r | |
1714 | );\r | |
1715 | \r | |
1716 | \r | |
1717 | /**\r | |
1718 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r | |
1719 | with the high bits that were rotated.\r | |
1720 | \r | |
1721 | This function rotates the 32-bit value Operand to the left by Count bits. The\r | |
1722 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1723 | value is returned.\r | |
1724 | \r | |
1725 | If Count is greater than 31, then ASSERT().\r | |
1726 | \r | |
1727 | @param Operand The 32-bit operand to rotate left.\r | |
1728 | @param Count The number of bits to rotate left.\r | |
1729 | \r | |
17f695ed | 1730 | @return Operand << Count\r |
ac644614 | 1731 | \r |
1732 | **/\r | |
1733 | UINT32\r | |
1734 | EFIAPI\r | |
1735 | LRotU32 (\r | |
1736 | IN UINT32 Operand,\r | |
1737 | IN UINTN Count\r | |
1738 | );\r | |
1739 | \r | |
1740 | \r | |
1741 | /**\r | |
1742 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r | |
1743 | with the low bits that were rotated.\r | |
1744 | \r | |
1745 | This function rotates the 32-bit value Operand to the right by Count bits.\r | |
1746 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1747 | value is returned.\r | |
1748 | \r | |
1749 | If Count is greater than 31, then ASSERT().\r | |
1750 | \r | |
1751 | @param Operand The 32-bit operand to rotate right.\r | |
1752 | @param Count The number of bits to rotate right.\r | |
1753 | \r | |
1754 | @return Operand >>> Count\r | |
1755 | \r | |
1756 | **/\r | |
1757 | UINT32\r | |
1758 | EFIAPI\r | |
1759 | RRotU32 (\r | |
1760 | IN UINT32 Operand,\r | |
1761 | IN UINTN Count\r | |
1762 | );\r | |
1763 | \r | |
1764 | \r | |
1765 | /**\r | |
1766 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r | |
1767 | with the high bits that were rotated.\r | |
1768 | \r | |
1769 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
1770 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1771 | value is returned.\r | |
1772 | \r | |
1773 | If Count is greater than 63, then ASSERT().\r | |
1774 | \r | |
1775 | @param Operand The 64-bit operand to rotate left.\r | |
1776 | @param Count The number of bits to rotate left.\r | |
1777 | \r | |
17f695ed | 1778 | @return Operand << Count\r |
ac644614 | 1779 | \r |
1780 | **/\r | |
1781 | UINT64\r | |
1782 | EFIAPI\r | |
1783 | LRotU64 (\r | |
1784 | IN UINT64 Operand,\r | |
1785 | IN UINTN Count\r | |
1786 | );\r | |
1787 | \r | |
1788 | \r | |
1789 | /**\r | |
1790 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r | |
1791 | with the high low bits that were rotated.\r | |
1792 | \r | |
1793 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
1794 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1795 | value is returned.\r | |
1796 | \r | |
1797 | If Count is greater than 63, then ASSERT().\r | |
1798 | \r | |
1799 | @param Operand The 64-bit operand to rotate right.\r | |
1800 | @param Count The number of bits to rotate right.\r | |
1801 | \r | |
17f695ed | 1802 | @return Operand >> Count\r |
ac644614 | 1803 | \r |
1804 | **/\r | |
1805 | UINT64\r | |
1806 | EFIAPI\r | |
1807 | RRotU64 (\r | |
1808 | IN UINT64 Operand,\r | |
1809 | IN UINTN Count\r | |
1810 | );\r | |
1811 | \r | |
1812 | \r | |
1813 | /**\r | |
1814 | Returns the bit position of the lowest bit set in a 32-bit value.\r | |
1815 | \r | |
1816 | This function computes the bit position of the lowest bit set in the 32-bit\r | |
1817 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1818 | Otherwise, a value between 0 and 31 is returned.\r | |
1819 | \r | |
1820 | @param Operand The 32-bit operand to evaluate.\r | |
1821 | \r | |
9aa049d9 | 1822 | @retval 0..31 The lowest bit set in Operand was found.\r |
17f695ed | 1823 | @retval -1 Operand is zero.\r |
ac644614 | 1824 | \r |
1825 | **/\r | |
1826 | INTN\r | |
1827 | EFIAPI\r | |
1828 | LowBitSet32 (\r | |
1829 | IN UINT32 Operand\r | |
1830 | );\r | |
1831 | \r | |
1832 | \r | |
1833 | /**\r | |
1834 | Returns the bit position of the lowest bit set in a 64-bit value.\r | |
1835 | \r | |
1836 | This function computes the bit position of the lowest bit set in the 64-bit\r | |
1837 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1838 | Otherwise, a value between 0 and 63 is returned.\r | |
1839 | \r | |
1840 | @param Operand The 64-bit operand to evaluate.\r | |
1841 | \r | |
9aa049d9 | 1842 | @retval 0..63 The lowest bit set in Operand was found.\r |
17f695ed | 1843 | @retval -1 Operand is zero.\r |
1844 | \r | |
ac644614 | 1845 | \r |
1846 | **/\r | |
1847 | INTN\r | |
1848 | EFIAPI\r | |
1849 | LowBitSet64 (\r | |
1850 | IN UINT64 Operand\r | |
1851 | );\r | |
1852 | \r | |
1853 | \r | |
1854 | /**\r | |
1855 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r | |
1856 | to log2(x).\r | |
1857 | \r | |
1858 | This function computes the bit position of the highest bit set in the 32-bit\r | |
1859 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1860 | Otherwise, a value between 0 and 31 is returned.\r | |
1861 | \r | |
1862 | @param Operand The 32-bit operand to evaluate.\r | |
1863 | \r | |
9aa049d9 | 1864 | @retval 0..31 Position of the highest bit set in Operand if found.\r |
17f695ed | 1865 | @retval -1 Operand is zero.\r |
ac644614 | 1866 | \r |
1867 | **/\r | |
1868 | INTN\r | |
1869 | EFIAPI\r | |
1870 | HighBitSet32 (\r | |
1871 | IN UINT32 Operand\r | |
1872 | );\r | |
1873 | \r | |
1874 | \r | |
1875 | /**\r | |
1876 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r | |
1877 | to log2(x).\r | |
1878 | \r | |
1879 | This function computes the bit position of the highest bit set in the 64-bit\r | |
1880 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1881 | Otherwise, a value between 0 and 63 is returned.\r | |
1882 | \r | |
1883 | @param Operand The 64-bit operand to evaluate.\r | |
1884 | \r | |
9aa049d9 | 1885 | @retval 0..63 Position of the highest bit set in Operand if found.\r |
17f695ed | 1886 | @retval -1 Operand is zero.\r |
ac644614 | 1887 | \r |
1888 | **/\r | |
1889 | INTN\r | |
1890 | EFIAPI\r | |
1891 | HighBitSet64 (\r | |
1892 | IN UINT64 Operand\r | |
1893 | );\r | |
1894 | \r | |
1895 | \r | |
1896 | /**\r | |
1897 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r | |
17f695ed | 1898 | 1 << log2(x).\r |
ac644614 | 1899 | \r |
1900 | This function computes the value of the highest bit set in the 32-bit value\r | |
1901 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1902 | \r | |
1903 | @param Operand The 32-bit operand to evaluate.\r | |
1904 | \r | |
1905 | @return 1 << HighBitSet32(Operand)\r | |
1906 | @retval 0 Operand is zero.\r | |
1907 | \r | |
1908 | **/\r | |
1909 | UINT32\r | |
1910 | EFIAPI\r | |
1911 | GetPowerOfTwo32 (\r | |
1912 | IN UINT32 Operand\r | |
1913 | );\r | |
1914 | \r | |
1915 | \r | |
1916 | /**\r | |
1917 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r | |
17f695ed | 1918 | 1 << log2(x).\r |
ac644614 | 1919 | \r |
1920 | This function computes the value of the highest bit set in the 64-bit value\r | |
1921 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1922 | \r | |
1923 | @param Operand The 64-bit operand to evaluate.\r | |
1924 | \r | |
1925 | @return 1 << HighBitSet64(Operand)\r | |
1926 | @retval 0 Operand is zero.\r | |
1927 | \r | |
1928 | **/\r | |
1929 | UINT64\r | |
1930 | EFIAPI\r | |
1931 | GetPowerOfTwo64 (\r | |
1932 | IN UINT64 Operand\r | |
1933 | );\r | |
1934 | \r | |
1935 | \r | |
1936 | /**\r | |
1937 | Switches the endianess of a 16-bit integer.\r | |
1938 | \r | |
1939 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r | |
1940 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1941 | returned.\r | |
1942 | \r | |
1943 | @param Value Operand A 16-bit unsigned value.\r | |
1944 | \r | |
17f695ed | 1945 | @return The byte swapped Operand.\r |
ac644614 | 1946 | \r |
1947 | **/\r | |
1948 | UINT16\r | |
1949 | EFIAPI\r | |
1950 | SwapBytes16 (\r | |
1951 | IN UINT16 Value\r | |
1952 | );\r | |
1953 | \r | |
1954 | \r | |
1955 | /**\r | |
1956 | Switches the endianess of a 32-bit integer.\r | |
1957 | \r | |
1958 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r | |
1959 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1960 | returned.\r | |
1961 | \r | |
1962 | @param Value Operand A 32-bit unsigned value.\r | |
1963 | \r | |
17f695ed | 1964 | @return The byte swapped Operand.\r |
ac644614 | 1965 | \r |
1966 | **/\r | |
1967 | UINT32\r | |
1968 | EFIAPI\r | |
1969 | SwapBytes32 (\r | |
1970 | IN UINT32 Value\r | |
1971 | );\r | |
1972 | \r | |
1973 | \r | |
1974 | /**\r | |
1975 | Switches the endianess of a 64-bit integer.\r | |
1976 | \r | |
1977 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r | |
1978 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1979 | returned.\r | |
1980 | \r | |
1981 | @param Value Operand A 64-bit unsigned value.\r | |
1982 | \r | |
17f695ed | 1983 | @return The byte swapped Operand.\r |
ac644614 | 1984 | \r |
1985 | **/\r | |
1986 | UINT64\r | |
1987 | EFIAPI\r | |
1988 | SwapBytes64 (\r | |
1989 | IN UINT64 Value\r | |
1990 | );\r | |
1991 | \r | |
1992 | \r | |
1993 | /**\r | |
1994 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
1995 | generates a 64-bit unsigned result.\r | |
1996 | \r | |
1997 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r | |
1998 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1999 | bit unsigned result is returned.\r | |
2000 | \r | |
ac644614 | 2001 | @param Multiplicand A 64-bit unsigned value.\r |
2002 | @param Multiplier A 32-bit unsigned value.\r | |
2003 | \r | |
2004 | @return Multiplicand * Multiplier\r | |
2005 | \r | |
2006 | **/\r | |
2007 | UINT64\r | |
2008 | EFIAPI\r | |
2009 | MultU64x32 (\r | |
2010 | IN UINT64 Multiplicand,\r | |
2011 | IN UINT32 Multiplier\r | |
2012 | );\r | |
2013 | \r | |
2014 | \r | |
2015 | /**\r | |
2016 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r | |
2017 | generates a 64-bit unsigned result.\r | |
2018 | \r | |
2019 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r | |
2020 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
2021 | bit unsigned result is returned.\r | |
2022 | \r | |
2023 | If the result overflows, then ASSERT().\r | |
2024 | \r | |
2025 | @param Multiplicand A 64-bit unsigned value.\r | |
2026 | @param Multiplier A 64-bit unsigned value.\r | |
2027 | \r | |
2028 | @return Multiplicand * Multiplier\r | |
2029 | \r | |
2030 | **/\r | |
2031 | UINT64\r | |
2032 | EFIAPI\r | |
2033 | MultU64x64 (\r | |
2034 | IN UINT64 Multiplicand,\r | |
2035 | IN UINT64 Multiplier\r | |
2036 | );\r | |
2037 | \r | |
2038 | \r | |
2039 | /**\r | |
2040 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
2041 | 64-bit signed result.\r | |
2042 | \r | |
2043 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r | |
2044 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r | |
2045 | signed result is returned.\r | |
2046 | \r | |
ac644614 | 2047 | @param Multiplicand A 64-bit signed value.\r |
2048 | @param Multiplier A 64-bit signed value.\r | |
2049 | \r | |
2050 | @return Multiplicand * Multiplier\r | |
2051 | \r | |
2052 | **/\r | |
2053 | INT64\r | |
2054 | EFIAPI\r | |
2055 | MultS64x64 (\r | |
2056 | IN INT64 Multiplicand,\r | |
2057 | IN INT64 Multiplier\r | |
2058 | );\r | |
2059 | \r | |
2060 | \r | |
2061 | /**\r | |
2062 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2063 | a 64-bit unsigned result.\r | |
2064 | \r | |
2065 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2066 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r | |
2067 | function returns the 64-bit unsigned quotient.\r | |
2068 | \r | |
2069 | If Divisor is 0, then ASSERT().\r | |
2070 | \r | |
2071 | @param Dividend A 64-bit unsigned value.\r | |
2072 | @param Divisor A 32-bit unsigned value.\r | |
2073 | \r | |
2074 | @return Dividend / Divisor\r | |
2075 | \r | |
2076 | **/\r | |
2077 | UINT64\r | |
2078 | EFIAPI\r | |
2079 | DivU64x32 (\r | |
2080 | IN UINT64 Dividend,\r | |
2081 | IN UINT32 Divisor\r | |
2082 | );\r | |
2083 | \r | |
2084 | \r | |
2085 | /**\r | |
2086 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2087 | a 32-bit unsigned remainder.\r | |
2088 | \r | |
2089 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2090 | unsigned value Divisor and generates a 32-bit remainder. This function\r | |
2091 | returns the 32-bit unsigned remainder.\r | |
2092 | \r | |
2093 | If Divisor is 0, then ASSERT().\r | |
2094 | \r | |
2095 | @param Dividend A 64-bit unsigned value.\r | |
2096 | @param Divisor A 32-bit unsigned value.\r | |
2097 | \r | |
2098 | @return Dividend % Divisor\r | |
2099 | \r | |
2100 | **/\r | |
2101 | UINT32\r | |
2102 | EFIAPI\r | |
2103 | ModU64x32 (\r | |
2104 | IN UINT64 Dividend,\r | |
2105 | IN UINT32 Divisor\r | |
2106 | );\r | |
2107 | \r | |
2108 | \r | |
2109 | /**\r | |
2110 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2111 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r | |
2112 | \r | |
2113 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2114 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2115 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r | |
2116 | This function returns the 64-bit unsigned quotient.\r | |
2117 | \r | |
2118 | If Divisor is 0, then ASSERT().\r | |
2119 | \r | |
2120 | @param Dividend A 64-bit unsigned value.\r | |
2121 | @param Divisor A 32-bit unsigned value.\r | |
2122 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r | |
2123 | optional and may be NULL.\r | |
2124 | \r | |
2125 | @return Dividend / Divisor\r | |
2126 | \r | |
2127 | **/\r | |
2128 | UINT64\r | |
2129 | EFIAPI\r | |
2130 | DivU64x32Remainder (\r | |
2131 | IN UINT64 Dividend,\r | |
2132 | IN UINT32 Divisor,\r | |
2133 | OUT UINT32 *Remainder OPTIONAL\r | |
2134 | );\r | |
2135 | \r | |
2136 | \r | |
2137 | /**\r | |
2138 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r | |
2139 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r | |
2140 | \r | |
2141 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r | |
2142 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2143 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r | |
2144 | This function returns the 64-bit unsigned quotient.\r | |
2145 | \r | |
2146 | If Divisor is 0, then ASSERT().\r | |
2147 | \r | |
2148 | @param Dividend A 64-bit unsigned value.\r | |
2149 | @param Divisor A 64-bit unsigned value.\r | |
2150 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r | |
2151 | optional and may be NULL.\r | |
2152 | \r | |
2153 | @return Dividend / Divisor\r | |
2154 | \r | |
2155 | **/\r | |
2156 | UINT64\r | |
2157 | EFIAPI\r | |
2158 | DivU64x64Remainder (\r | |
2159 | IN UINT64 Dividend,\r | |
2160 | IN UINT64 Divisor,\r | |
2161 | OUT UINT64 *Remainder OPTIONAL\r | |
2162 | );\r | |
2163 | \r | |
2164 | \r | |
2165 | /**\r | |
2166 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
2167 | 64-bit signed result and a optional 64-bit signed remainder.\r | |
2168 | \r | |
2169 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r | |
2170 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r | |
2171 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r | |
2172 | function returns the 64-bit signed quotient.\r | |
2173 | \r | |
9aa049d9 | 2174 | It is the caller's responsibility to not call this function with a Divisor of 0.\r |
17f695ed | 2175 | If Divisor is 0, then the quotient and remainder should be assumed to be \r |
2176 | the largest negative integer.\r | |
2177 | \r | |
ac644614 | 2178 | If Divisor is 0, then ASSERT().\r |
2179 | \r | |
2180 | @param Dividend A 64-bit signed value.\r | |
2181 | @param Divisor A 64-bit signed value.\r | |
2182 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r | |
2183 | optional and may be NULL.\r | |
2184 | \r | |
2185 | @return Dividend / Divisor\r | |
2186 | \r | |
2187 | **/\r | |
2188 | INT64\r | |
2189 | EFIAPI\r | |
2190 | DivS64x64Remainder (\r | |
2191 | IN INT64 Dividend,\r | |
2192 | IN INT64 Divisor,\r | |
2193 | OUT INT64 *Remainder OPTIONAL\r | |
2194 | );\r | |
2195 | \r | |
2196 | \r | |
2197 | /**\r | |
2198 | Reads a 16-bit value from memory that may be unaligned.\r | |
2199 | \r | |
2200 | This function returns the 16-bit value pointed to by Buffer. The function\r | |
2201 | guarantees that the read operation does not produce an alignment fault.\r | |
2202 | \r | |
2203 | If the Buffer is NULL, then ASSERT().\r | |
2204 | \r | |
5385a579 | 2205 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2206 | \r |
5385a579 | 2207 | @return The 16-bit value read from Buffer.\r |
ac644614 | 2208 | \r |
2209 | **/\r | |
2210 | UINT16\r | |
2211 | EFIAPI\r | |
2212 | ReadUnaligned16 (\r | |
5385a579 | 2213 | IN CONST UINT16 *Buffer\r |
ac644614 | 2214 | );\r |
2215 | \r | |
2216 | \r | |
2217 | /**\r | |
2218 | Writes a 16-bit value to memory that may be unaligned.\r | |
2219 | \r | |
2220 | This function writes the 16-bit value specified by Value to Buffer. Value is\r | |
2221 | returned. The function guarantees that the write operation does not produce\r | |
2222 | an alignment fault.\r | |
2223 | \r | |
2224 | If the Buffer is NULL, then ASSERT().\r | |
2225 | \r | |
5385a579 | 2226 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2227 | @param Value 16-bit value to write to Buffer.\r |
2228 | \r | |
5385a579 | 2229 | @return The 16-bit value to write to Buffer.\r |
ac644614 | 2230 | \r |
2231 | **/\r | |
2232 | UINT16\r | |
2233 | EFIAPI\r | |
2234 | WriteUnaligned16 (\r | |
5385a579 | 2235 | OUT UINT16 *Buffer,\r |
2236 | IN UINT16 Value\r | |
ac644614 | 2237 | );\r |
2238 | \r | |
2239 | \r | |
2240 | /**\r | |
2241 | Reads a 24-bit value from memory that may be unaligned.\r | |
2242 | \r | |
2243 | This function returns the 24-bit value pointed to by Buffer. The function\r | |
2244 | guarantees that the read operation does not produce an alignment fault.\r | |
2245 | \r | |
2246 | If the Buffer is NULL, then ASSERT().\r | |
2247 | \r | |
2248 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r | |
2249 | \r | |
5385a579 | 2250 | @return The 24-bit value read from Buffer.\r |
ac644614 | 2251 | \r |
2252 | **/\r | |
2253 | UINT32\r | |
2254 | EFIAPI\r | |
2255 | ReadUnaligned24 (\r | |
5385a579 | 2256 | IN CONST UINT32 *Buffer\r |
ac644614 | 2257 | );\r |
2258 | \r | |
2259 | \r | |
2260 | /**\r | |
2261 | Writes a 24-bit value to memory that may be unaligned.\r | |
2262 | \r | |
2263 | This function writes the 24-bit value specified by Value to Buffer. Value is\r | |
2264 | returned. The function guarantees that the write operation does not produce\r | |
2265 | an alignment fault.\r | |
2266 | \r | |
2267 | If the Buffer is NULL, then ASSERT().\r | |
2268 | \r | |
2269 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r | |
2270 | @param Value 24-bit value to write to Buffer.\r | |
2271 | \r | |
5385a579 | 2272 | @return The 24-bit value to write to Buffer.\r |
ac644614 | 2273 | \r |
2274 | **/\r | |
2275 | UINT32\r | |
2276 | EFIAPI\r | |
2277 | WriteUnaligned24 (\r | |
5385a579 | 2278 | OUT UINT32 *Buffer,\r |
2279 | IN UINT32 Value\r | |
ac644614 | 2280 | );\r |
2281 | \r | |
2282 | \r | |
2283 | /**\r | |
2284 | Reads a 32-bit value from memory that may be unaligned.\r | |
2285 | \r | |
2286 | This function returns the 32-bit value pointed to by Buffer. The function\r | |
2287 | guarantees that the read operation does not produce an alignment fault.\r | |
2288 | \r | |
2289 | If the Buffer is NULL, then ASSERT().\r | |
2290 | \r | |
5385a579 | 2291 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2292 | \r |
5385a579 | 2293 | @return The 32-bit value read from Buffer.\r |
ac644614 | 2294 | \r |
2295 | **/\r | |
2296 | UINT32\r | |
2297 | EFIAPI\r | |
2298 | ReadUnaligned32 (\r | |
5385a579 | 2299 | IN CONST UINT32 *Buffer\r |
ac644614 | 2300 | );\r |
2301 | \r | |
2302 | \r | |
2303 | /**\r | |
2304 | Writes a 32-bit value to memory that may be unaligned.\r | |
2305 | \r | |
2306 | This function writes the 32-bit value specified by Value to Buffer. Value is\r | |
2307 | returned. The function guarantees that the write operation does not produce\r | |
2308 | an alignment fault.\r | |
2309 | \r | |
2310 | If the Buffer is NULL, then ASSERT().\r | |
2311 | \r | |
5385a579 | 2312 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2313 | @param Value 32-bit value to write to Buffer.\r |
2314 | \r | |
5385a579 | 2315 | @return The 32-bit value to write to Buffer.\r |
ac644614 | 2316 | \r |
2317 | **/\r | |
2318 | UINT32\r | |
2319 | EFIAPI\r | |
2320 | WriteUnaligned32 (\r | |
5385a579 | 2321 | OUT UINT32 *Buffer,\r |
2322 | IN UINT32 Value\r | |
ac644614 | 2323 | );\r |
2324 | \r | |
2325 | \r | |
2326 | /**\r | |
2327 | Reads a 64-bit value from memory that may be unaligned.\r | |
2328 | \r | |
2329 | This function returns the 64-bit value pointed to by Buffer. The function\r | |
2330 | guarantees that the read operation does not produce an alignment fault.\r | |
2331 | \r | |
2332 | If the Buffer is NULL, then ASSERT().\r | |
2333 | \r | |
5385a579 | 2334 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2335 | \r |
5385a579 | 2336 | @return The 64-bit value read from Buffer.\r |
ac644614 | 2337 | \r |
2338 | **/\r | |
2339 | UINT64\r | |
2340 | EFIAPI\r | |
2341 | ReadUnaligned64 (\r | |
5385a579 | 2342 | IN CONST UINT64 *Buffer\r |
ac644614 | 2343 | );\r |
2344 | \r | |
2345 | \r | |
2346 | /**\r | |
2347 | Writes a 64-bit value to memory that may be unaligned.\r | |
2348 | \r | |
2349 | This function writes the 64-bit value specified by Value to Buffer. Value is\r | |
2350 | returned. The function guarantees that the write operation does not produce\r | |
2351 | an alignment fault.\r | |
2352 | \r | |
2353 | If the Buffer is NULL, then ASSERT().\r | |
2354 | \r | |
5385a579 | 2355 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2356 | @param Value 64-bit value to write to Buffer.\r |
2357 | \r | |
5385a579 | 2358 | @return The 64-bit value to write to Buffer.\r |
ac644614 | 2359 | \r |
2360 | **/\r | |
2361 | UINT64\r | |
2362 | EFIAPI\r | |
2363 | WriteUnaligned64 (\r | |
5385a579 | 2364 | OUT UINT64 *Buffer,\r |
2365 | IN UINT64 Value\r | |
ac644614 | 2366 | );\r |
2367 | \r | |
2368 | \r | |
2369 | //\r | |
2370 | // Bit Field Functions\r | |
2371 | //\r | |
2372 | \r | |
2373 | /**\r | |
2374 | Returns a bit field from an 8-bit value.\r | |
2375 | \r | |
2376 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2377 | \r | |
2378 | If 8-bit operations are not supported, then ASSERT().\r | |
2379 | If StartBit is greater than 7, then ASSERT().\r | |
2380 | If EndBit is greater than 7, then ASSERT().\r | |
2381 | If EndBit is less than StartBit, then ASSERT().\r | |
2382 | \r | |
2383 | @param Operand Operand on which to perform the bitfield operation.\r | |
2384 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2385 | Range 0..7.\r | |
2386 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2387 | Range 0..7.\r | |
2388 | \r | |
2389 | @return The bit field read.\r | |
2390 | \r | |
2391 | **/\r | |
2392 | UINT8\r | |
2393 | EFIAPI\r | |
2394 | BitFieldRead8 (\r | |
2395 | IN UINT8 Operand,\r | |
2396 | IN UINTN StartBit,\r | |
2397 | IN UINTN EndBit\r | |
2398 | );\r | |
2399 | \r | |
2400 | \r | |
2401 | /**\r | |
2402 | Writes a bit field to an 8-bit value, and returns the result.\r | |
2403 | \r | |
2404 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2405 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r | |
2406 | returned.\r | |
2407 | \r | |
2408 | If 8-bit operations are not supported, then ASSERT().\r | |
2409 | If StartBit is greater than 7, then ASSERT().\r | |
2410 | If EndBit is greater than 7, then ASSERT().\r | |
2411 | If EndBit is less than StartBit, then ASSERT().\r | |
2412 | \r | |
2413 | @param Operand Operand on which to perform the bitfield operation.\r | |
2414 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2415 | Range 0..7.\r | |
2416 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2417 | Range 0..7.\r | |
2418 | @param Value New value of the bit field.\r | |
2419 | \r | |
2420 | @return The new 8-bit value.\r | |
2421 | \r | |
2422 | **/\r | |
2423 | UINT8\r | |
2424 | EFIAPI\r | |
2425 | BitFieldWrite8 (\r | |
2426 | IN UINT8 Operand,\r | |
2427 | IN UINTN StartBit,\r | |
2428 | IN UINTN EndBit,\r | |
2429 | IN UINT8 Value\r | |
2430 | );\r | |
2431 | \r | |
2432 | \r | |
2433 | /**\r | |
2434 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r | |
2435 | result.\r | |
2436 | \r | |
2437 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2438 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2439 | Operand are preserved. The new 8-bit value is returned.\r | |
2440 | \r | |
2441 | If 8-bit operations are not supported, then ASSERT().\r | |
2442 | If StartBit is greater than 7, then ASSERT().\r | |
2443 | If EndBit is greater than 7, then ASSERT().\r | |
2444 | If EndBit is less than StartBit, then ASSERT().\r | |
2445 | \r | |
2446 | @param Operand Operand on which to perform the bitfield operation.\r | |
2447 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2448 | Range 0..7.\r | |
2449 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2450 | Range 0..7.\r | |
2451 | @param OrData The value to OR with the read value from the value\r | |
2452 | \r | |
2453 | @return The new 8-bit value.\r | |
2454 | \r | |
2455 | **/\r | |
2456 | UINT8\r | |
2457 | EFIAPI\r | |
2458 | BitFieldOr8 (\r | |
2459 | IN UINT8 Operand,\r | |
2460 | IN UINTN StartBit,\r | |
2461 | IN UINTN EndBit,\r | |
2462 | IN UINT8 OrData\r | |
2463 | );\r | |
2464 | \r | |
2465 | \r | |
2466 | /**\r | |
2467 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r | |
2468 | the result.\r | |
2469 | \r | |
2470 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2471 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2472 | preserved. The new 8-bit value is returned.\r | |
2473 | \r | |
2474 | If 8-bit operations are not supported, then ASSERT().\r | |
2475 | If StartBit is greater than 7, then ASSERT().\r | |
2476 | If EndBit is greater than 7, then ASSERT().\r | |
2477 | If EndBit is less than StartBit, then ASSERT().\r | |
2478 | \r | |
2479 | @param Operand Operand on which to perform the bitfield operation.\r | |
2480 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2481 | Range 0..7.\r | |
2482 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2483 | Range 0..7.\r | |
2484 | @param AndData The value to AND with the read value from the value.\r | |
2485 | \r | |
2486 | @return The new 8-bit value.\r | |
2487 | \r | |
2488 | **/\r | |
2489 | UINT8\r | |
2490 | EFIAPI\r | |
2491 | BitFieldAnd8 (\r | |
2492 | IN UINT8 Operand,\r | |
2493 | IN UINTN StartBit,\r | |
2494 | IN UINTN EndBit,\r | |
2495 | IN UINT8 AndData\r | |
2496 | );\r | |
2497 | \r | |
2498 | \r | |
2499 | /**\r | |
2500 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r | |
2501 | bitwise OR, and returns the result.\r | |
2502 | \r | |
2503 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2504 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2505 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2506 | preserved. The new 8-bit value is returned.\r | |
2507 | \r | |
2508 | If 8-bit operations are not supported, then ASSERT().\r | |
2509 | If StartBit is greater than 7, then ASSERT().\r | |
2510 | If EndBit is greater than 7, then ASSERT().\r | |
2511 | If EndBit is less than StartBit, then ASSERT().\r | |
2512 | \r | |
2513 | @param Operand Operand on which to perform the bitfield operation.\r | |
2514 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2515 | Range 0..7.\r | |
2516 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2517 | Range 0..7.\r | |
2518 | @param AndData The value to AND with the read value from the value.\r | |
2519 | @param OrData The value to OR with the result of the AND operation.\r | |
2520 | \r | |
2521 | @return The new 8-bit value.\r | |
2522 | \r | |
2523 | **/\r | |
2524 | UINT8\r | |
2525 | EFIAPI\r | |
2526 | BitFieldAndThenOr8 (\r | |
2527 | IN UINT8 Operand,\r | |
2528 | IN UINTN StartBit,\r | |
2529 | IN UINTN EndBit,\r | |
2530 | IN UINT8 AndData,\r | |
2531 | IN UINT8 OrData\r | |
2532 | );\r | |
2533 | \r | |
2534 | \r | |
2535 | /**\r | |
2536 | Returns a bit field from a 16-bit value.\r | |
2537 | \r | |
2538 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2539 | \r | |
2540 | If 16-bit operations are not supported, then ASSERT().\r | |
2541 | If StartBit is greater than 15, then ASSERT().\r | |
2542 | If EndBit is greater than 15, then ASSERT().\r | |
2543 | If EndBit is less than StartBit, then ASSERT().\r | |
2544 | \r | |
2545 | @param Operand Operand on which to perform the bitfield operation.\r | |
2546 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2547 | Range 0..15.\r | |
2548 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2549 | Range 0..15.\r | |
2550 | \r | |
2551 | @return The bit field read.\r | |
2552 | \r | |
2553 | **/\r | |
2554 | UINT16\r | |
2555 | EFIAPI\r | |
2556 | BitFieldRead16 (\r | |
2557 | IN UINT16 Operand,\r | |
2558 | IN UINTN StartBit,\r | |
2559 | IN UINTN EndBit\r | |
2560 | );\r | |
2561 | \r | |
2562 | \r | |
2563 | /**\r | |
2564 | Writes a bit field to a 16-bit value, and returns the result.\r | |
2565 | \r | |
2566 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2567 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r | |
2568 | returned.\r | |
2569 | \r | |
2570 | If 16-bit operations are not supported, then ASSERT().\r | |
2571 | If StartBit is greater than 15, then ASSERT().\r | |
2572 | If EndBit is greater than 15, then ASSERT().\r | |
2573 | If EndBit is less than StartBit, then ASSERT().\r | |
2574 | \r | |
2575 | @param Operand Operand on which to perform the bitfield operation.\r | |
2576 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2577 | Range 0..15.\r | |
2578 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2579 | Range 0..15.\r | |
2580 | @param Value New value of the bit field.\r | |
2581 | \r | |
2582 | @return The new 16-bit value.\r | |
2583 | \r | |
2584 | **/\r | |
2585 | UINT16\r | |
2586 | EFIAPI\r | |
2587 | BitFieldWrite16 (\r | |
2588 | IN UINT16 Operand,\r | |
2589 | IN UINTN StartBit,\r | |
2590 | IN UINTN EndBit,\r | |
2591 | IN UINT16 Value\r | |
2592 | );\r | |
2593 | \r | |
2594 | \r | |
2595 | /**\r | |
2596 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r | |
2597 | result.\r | |
2598 | \r | |
2599 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2600 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2601 | Operand are preserved. The new 16-bit value is returned.\r | |
2602 | \r | |
2603 | If 16-bit operations are not supported, then ASSERT().\r | |
2604 | If StartBit is greater than 15, then ASSERT().\r | |
2605 | If EndBit is greater than 15, then ASSERT().\r | |
2606 | If EndBit is less than StartBit, then ASSERT().\r | |
2607 | \r | |
2608 | @param Operand Operand on which to perform the bitfield operation.\r | |
2609 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2610 | Range 0..15.\r | |
2611 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2612 | Range 0..15.\r | |
2613 | @param OrData The value to OR with the read value from the value\r | |
2614 | \r | |
2615 | @return The new 16-bit value.\r | |
2616 | \r | |
2617 | **/\r | |
2618 | UINT16\r | |
2619 | EFIAPI\r | |
2620 | BitFieldOr16 (\r | |
2621 | IN UINT16 Operand,\r | |
2622 | IN UINTN StartBit,\r | |
2623 | IN UINTN EndBit,\r | |
2624 | IN UINT16 OrData\r | |
2625 | );\r | |
2626 | \r | |
2627 | \r | |
2628 | /**\r | |
2629 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r | |
2630 | the result.\r | |
2631 | \r | |
2632 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2633 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2634 | preserved. The new 16-bit value is returned.\r | |
2635 | \r | |
2636 | If 16-bit operations are not supported, then ASSERT().\r | |
2637 | If StartBit is greater than 15, then ASSERT().\r | |
2638 | If EndBit is greater than 15, then ASSERT().\r | |
2639 | If EndBit is less than StartBit, then ASSERT().\r | |
2640 | \r | |
2641 | @param Operand Operand on which to perform the bitfield operation.\r | |
2642 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2643 | Range 0..15.\r | |
2644 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2645 | Range 0..15.\r | |
2646 | @param AndData The value to AND with the read value from the value\r | |
2647 | \r | |
2648 | @return The new 16-bit value.\r | |
2649 | \r | |
2650 | **/\r | |
2651 | UINT16\r | |
2652 | EFIAPI\r | |
2653 | BitFieldAnd16 (\r | |
2654 | IN UINT16 Operand,\r | |
2655 | IN UINTN StartBit,\r | |
2656 | IN UINTN EndBit,\r | |
2657 | IN UINT16 AndData\r | |
2658 | );\r | |
2659 | \r | |
2660 | \r | |
2661 | /**\r | |
2662 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r | |
2663 | bitwise OR, and returns the result.\r | |
2664 | \r | |
2665 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2666 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2667 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2668 | preserved. The new 16-bit value is returned.\r | |
2669 | \r | |
2670 | If 16-bit operations are not supported, then ASSERT().\r | |
2671 | If StartBit is greater than 15, then ASSERT().\r | |
2672 | If EndBit is greater than 15, then ASSERT().\r | |
2673 | If EndBit is less than StartBit, then ASSERT().\r | |
2674 | \r | |
2675 | @param Operand Operand on which to perform the bitfield operation.\r | |
2676 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2677 | Range 0..15.\r | |
2678 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2679 | Range 0..15.\r | |
2680 | @param AndData The value to AND with the read value from the value.\r | |
2681 | @param OrData The value to OR with the result of the AND operation.\r | |
2682 | \r | |
2683 | @return The new 16-bit value.\r | |
2684 | \r | |
2685 | **/\r | |
2686 | UINT16\r | |
2687 | EFIAPI\r | |
2688 | BitFieldAndThenOr16 (\r | |
2689 | IN UINT16 Operand,\r | |
2690 | IN UINTN StartBit,\r | |
2691 | IN UINTN EndBit,\r | |
2692 | IN UINT16 AndData,\r | |
2693 | IN UINT16 OrData\r | |
2694 | );\r | |
2695 | \r | |
2696 | \r | |
2697 | /**\r | |
2698 | Returns a bit field from a 32-bit value.\r | |
2699 | \r | |
2700 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2701 | \r | |
2702 | If 32-bit operations are not supported, then ASSERT().\r | |
2703 | If StartBit is greater than 31, then ASSERT().\r | |
2704 | If EndBit is greater than 31, then ASSERT().\r | |
2705 | If EndBit is less than StartBit, then ASSERT().\r | |
2706 | \r | |
2707 | @param Operand Operand on which to perform the bitfield operation.\r | |
2708 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2709 | Range 0..31.\r | |
2710 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2711 | Range 0..31.\r | |
2712 | \r | |
2713 | @return The bit field read.\r | |
2714 | \r | |
2715 | **/\r | |
2716 | UINT32\r | |
2717 | EFIAPI\r | |
2718 | BitFieldRead32 (\r | |
2719 | IN UINT32 Operand,\r | |
2720 | IN UINTN StartBit,\r | |
2721 | IN UINTN EndBit\r | |
2722 | );\r | |
2723 | \r | |
2724 | \r | |
2725 | /**\r | |
2726 | Writes a bit field to a 32-bit value, and returns the result.\r | |
2727 | \r | |
2728 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2729 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r | |
2730 | returned.\r | |
2731 | \r | |
2732 | If 32-bit operations are not supported, then ASSERT().\r | |
2733 | If StartBit is greater than 31, then ASSERT().\r | |
2734 | If EndBit is greater than 31, then ASSERT().\r | |
2735 | If EndBit is less than StartBit, then ASSERT().\r | |
2736 | \r | |
2737 | @param Operand Operand on which to perform the bitfield operation.\r | |
2738 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2739 | Range 0..31.\r | |
2740 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2741 | Range 0..31.\r | |
2742 | @param Value New value of the bit field.\r | |
2743 | \r | |
2744 | @return The new 32-bit value.\r | |
2745 | \r | |
2746 | **/\r | |
2747 | UINT32\r | |
2748 | EFIAPI\r | |
2749 | BitFieldWrite32 (\r | |
2750 | IN UINT32 Operand,\r | |
2751 | IN UINTN StartBit,\r | |
2752 | IN UINTN EndBit,\r | |
2753 | IN UINT32 Value\r | |
2754 | );\r | |
2755 | \r | |
2756 | \r | |
2757 | /**\r | |
2758 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r | |
2759 | result.\r | |
2760 | \r | |
2761 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2762 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2763 | Operand are preserved. The new 32-bit value is returned.\r | |
2764 | \r | |
2765 | If 32-bit operations are not supported, then ASSERT().\r | |
2766 | If StartBit is greater than 31, then ASSERT().\r | |
2767 | If EndBit is greater than 31, then ASSERT().\r | |
2768 | If EndBit is less than StartBit, then ASSERT().\r | |
2769 | \r | |
2770 | @param Operand Operand on which to perform the bitfield operation.\r | |
2771 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2772 | Range 0..31.\r | |
2773 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2774 | Range 0..31.\r | |
2775 | @param OrData The value to OR with the read value from the value\r | |
2776 | \r | |
2777 | @return The new 32-bit value.\r | |
2778 | \r | |
2779 | **/\r | |
2780 | UINT32\r | |
2781 | EFIAPI\r | |
2782 | BitFieldOr32 (\r | |
2783 | IN UINT32 Operand,\r | |
2784 | IN UINTN StartBit,\r | |
2785 | IN UINTN EndBit,\r | |
2786 | IN UINT32 OrData\r | |
2787 | );\r | |
2788 | \r | |
2789 | \r | |
2790 | /**\r | |
2791 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r | |
2792 | the result.\r | |
2793 | \r | |
2794 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2795 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2796 | preserved. The new 32-bit value is returned.\r | |
2797 | \r | |
2798 | If 32-bit operations are not supported, then ASSERT().\r | |
2799 | If StartBit is greater than 31, then ASSERT().\r | |
2800 | If EndBit is greater than 31, then ASSERT().\r | |
2801 | If EndBit is less than StartBit, then ASSERT().\r | |
2802 | \r | |
2803 | @param Operand Operand on which to perform the bitfield operation.\r | |
2804 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2805 | Range 0..31.\r | |
2806 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2807 | Range 0..31.\r | |
2808 | @param AndData The value to AND with the read value from the value\r | |
2809 | \r | |
2810 | @return The new 32-bit value.\r | |
2811 | \r | |
2812 | **/\r | |
2813 | UINT32\r | |
2814 | EFIAPI\r | |
2815 | BitFieldAnd32 (\r | |
2816 | IN UINT32 Operand,\r | |
2817 | IN UINTN StartBit,\r | |
2818 | IN UINTN EndBit,\r | |
2819 | IN UINT32 AndData\r | |
2820 | );\r | |
2821 | \r | |
2822 | \r | |
2823 | /**\r | |
2824 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r | |
2825 | bitwise OR, and returns the result.\r | |
2826 | \r | |
2827 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2828 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2829 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2830 | preserved. The new 32-bit value is returned.\r | |
2831 | \r | |
2832 | If 32-bit operations are not supported, then ASSERT().\r | |
2833 | If StartBit is greater than 31, then ASSERT().\r | |
2834 | If EndBit is greater than 31, then ASSERT().\r | |
2835 | If EndBit is less than StartBit, then ASSERT().\r | |
2836 | \r | |
2837 | @param Operand Operand on which to perform the bitfield operation.\r | |
2838 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2839 | Range 0..31.\r | |
2840 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2841 | Range 0..31.\r | |
2842 | @param AndData The value to AND with the read value from the value.\r | |
2843 | @param OrData The value to OR with the result of the AND operation.\r | |
2844 | \r | |
2845 | @return The new 32-bit value.\r | |
2846 | \r | |
2847 | **/\r | |
2848 | UINT32\r | |
2849 | EFIAPI\r | |
2850 | BitFieldAndThenOr32 (\r | |
2851 | IN UINT32 Operand,\r | |
2852 | IN UINTN StartBit,\r | |
2853 | IN UINTN EndBit,\r | |
2854 | IN UINT32 AndData,\r | |
2855 | IN UINT32 OrData\r | |
2856 | );\r | |
2857 | \r | |
2858 | \r | |
2859 | /**\r | |
2860 | Returns a bit field from a 64-bit value.\r | |
2861 | \r | |
2862 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2863 | \r | |
2864 | If 64-bit operations are not supported, then ASSERT().\r | |
2865 | If StartBit is greater than 63, then ASSERT().\r | |
2866 | If EndBit is greater than 63, then ASSERT().\r | |
2867 | If EndBit is less than StartBit, then ASSERT().\r | |
2868 | \r | |
2869 | @param Operand Operand on which to perform the bitfield operation.\r | |
2870 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2871 | Range 0..63.\r | |
2872 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2873 | Range 0..63.\r | |
2874 | \r | |
2875 | @return The bit field read.\r | |
2876 | \r | |
2877 | **/\r | |
2878 | UINT64\r | |
2879 | EFIAPI\r | |
2880 | BitFieldRead64 (\r | |
2881 | IN UINT64 Operand,\r | |
2882 | IN UINTN StartBit,\r | |
2883 | IN UINTN EndBit\r | |
2884 | );\r | |
2885 | \r | |
2886 | \r | |
2887 | /**\r | |
2888 | Writes a bit field to a 64-bit value, and returns the result.\r | |
2889 | \r | |
2890 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2891 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r | |
2892 | returned.\r | |
2893 | \r | |
2894 | If 64-bit operations are not supported, then ASSERT().\r | |
2895 | If StartBit is greater than 63, then ASSERT().\r | |
2896 | If EndBit is greater than 63, then ASSERT().\r | |
2897 | If EndBit is less than StartBit, then ASSERT().\r | |
2898 | \r | |
2899 | @param Operand Operand on which to perform the bitfield operation.\r | |
2900 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2901 | Range 0..63.\r | |
2902 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2903 | Range 0..63.\r | |
2904 | @param Value New value of the bit field.\r | |
2905 | \r | |
2906 | @return The new 64-bit value.\r | |
2907 | \r | |
2908 | **/\r | |
2909 | UINT64\r | |
2910 | EFIAPI\r | |
2911 | BitFieldWrite64 (\r | |
2912 | IN UINT64 Operand,\r | |
2913 | IN UINTN StartBit,\r | |
2914 | IN UINTN EndBit,\r | |
2915 | IN UINT64 Value\r | |
2916 | );\r | |
2917 | \r | |
2918 | \r | |
2919 | /**\r | |
2920 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r | |
2921 | result.\r | |
2922 | \r | |
2923 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2924 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2925 | Operand are preserved. The new 64-bit value is returned.\r | |
2926 | \r | |
2927 | If 64-bit operations are not supported, then ASSERT().\r | |
2928 | If StartBit is greater than 63, then ASSERT().\r | |
2929 | If EndBit is greater than 63, then ASSERT().\r | |
2930 | If EndBit is less than StartBit, then ASSERT().\r | |
2931 | \r | |
2932 | @param Operand Operand on which to perform the bitfield operation.\r | |
2933 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2934 | Range 0..63.\r | |
2935 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2936 | Range 0..63.\r | |
2937 | @param OrData The value to OR with the read value from the value\r | |
2938 | \r | |
2939 | @return The new 64-bit value.\r | |
2940 | \r | |
2941 | **/\r | |
2942 | UINT64\r | |
2943 | EFIAPI\r | |
2944 | BitFieldOr64 (\r | |
2945 | IN UINT64 Operand,\r | |
2946 | IN UINTN StartBit,\r | |
2947 | IN UINTN EndBit,\r | |
2948 | IN UINT64 OrData\r | |
2949 | );\r | |
2950 | \r | |
2951 | \r | |
2952 | /**\r | |
2953 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r | |
2954 | the result.\r | |
2955 | \r | |
2956 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2957 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2958 | preserved. The new 64-bit value is returned.\r | |
2959 | \r | |
2960 | If 64-bit operations are not supported, then ASSERT().\r | |
2961 | If StartBit is greater than 63, then ASSERT().\r | |
2962 | If EndBit is greater than 63, then ASSERT().\r | |
2963 | If EndBit is less than StartBit, then ASSERT().\r | |
2964 | \r | |
2965 | @param Operand Operand on which to perform the bitfield operation.\r | |
2966 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2967 | Range 0..63.\r | |
2968 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2969 | Range 0..63.\r | |
2970 | @param AndData The value to AND with the read value from the value\r | |
2971 | \r | |
2972 | @return The new 64-bit value.\r | |
2973 | \r | |
2974 | **/\r | |
2975 | UINT64\r | |
2976 | EFIAPI\r | |
2977 | BitFieldAnd64 (\r | |
2978 | IN UINT64 Operand,\r | |
2979 | IN UINTN StartBit,\r | |
2980 | IN UINTN EndBit,\r | |
2981 | IN UINT64 AndData\r | |
2982 | );\r | |
2983 | \r | |
2984 | \r | |
2985 | /**\r | |
2986 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r | |
2987 | bitwise OR, and returns the result.\r | |
2988 | \r | |
2989 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2990 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2991 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2992 | preserved. The new 64-bit value is returned.\r | |
2993 | \r | |
2994 | If 64-bit operations are not supported, then ASSERT().\r | |
2995 | If StartBit is greater than 63, then ASSERT().\r | |
2996 | If EndBit is greater than 63, then ASSERT().\r | |
2997 | If EndBit is less than StartBit, then ASSERT().\r | |
2998 | \r | |
2999 | @param Operand Operand on which to perform the bitfield operation.\r | |
3000 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3001 | Range 0..63.\r | |
3002 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3003 | Range 0..63.\r | |
3004 | @param AndData The value to AND with the read value from the value.\r | |
3005 | @param OrData The value to OR with the result of the AND operation.\r | |
3006 | \r | |
3007 | @return The new 64-bit value.\r | |
3008 | \r | |
3009 | **/\r | |
3010 | UINT64\r | |
3011 | EFIAPI\r | |
3012 | BitFieldAndThenOr64 (\r | |
3013 | IN UINT64 Operand,\r | |
3014 | IN UINTN StartBit,\r | |
3015 | IN UINTN EndBit,\r | |
3016 | IN UINT64 AndData,\r | |
3017 | IN UINT64 OrData\r | |
3018 | );\r | |
3019 | \r | |
3020 | \r | |
3021 | //\r | |
3022 | // Base Library Synchronization Functions\r | |
3023 | //\r | |
3024 | \r | |
3025 | /**\r | |
3026 | Retrieves the architecture specific spin lock alignment requirements for\r | |
3027 | optimal spin lock performance.\r | |
3028 | \r | |
3029 | This function retrieves the spin lock alignment requirements for optimal\r | |
3030 | performance on a given CPU architecture. The spin lock alignment must be a\r | |
3031 | power of two and is returned by this function. If there are no alignment\r | |
3032 | requirements, then 1 must be returned. The spin lock synchronization\r | |
3033 | functions must function correctly if the spin lock size and alignment values\r | |
3034 | returned by this function are not used at all. These values are hints to the\r | |
3035 | consumers of the spin lock synchronization functions to obtain optimal spin\r | |
3036 | lock performance.\r | |
3037 | \r | |
3038 | @return The architecture specific spin lock alignment.\r | |
3039 | \r | |
3040 | **/\r | |
3041 | UINTN\r | |
3042 | EFIAPI\r | |
3043 | GetSpinLockProperties (\r | |
3044 | VOID\r | |
3045 | );\r | |
3046 | \r | |
3047 | \r | |
3048 | /**\r | |
3049 | Initializes a spin lock to the released state and returns the spin lock.\r | |
3050 | \r | |
3051 | This function initializes the spin lock specified by SpinLock to the released\r | |
3052 | state, and returns SpinLock. Optimal performance can be achieved by calling\r | |
3053 | GetSpinLockProperties() to determine the size and alignment requirements for\r | |
3054 | SpinLock.\r | |
3055 | \r | |
3056 | If SpinLock is NULL, then ASSERT().\r | |
3057 | \r | |
3058 | @param SpinLock A pointer to the spin lock to initialize to the released\r | |
3059 | state.\r | |
3060 | \r | |
38bbd3d9 | 3061 | @return SpinLock in release state.\r |
ac644614 | 3062 | \r |
3063 | **/\r | |
3064 | SPIN_LOCK *\r | |
3065 | EFIAPI\r | |
3066 | InitializeSpinLock (\r | |
282b7ec6 | 3067 | OUT SPIN_LOCK *SpinLock\r |
ac644614 | 3068 | );\r |
3069 | \r | |
3070 | \r | |
3071 | /**\r | |
3072 | Waits until a spin lock can be placed in the acquired state.\r | |
3073 | \r | |
3074 | This function checks the state of the spin lock specified by SpinLock. If\r | |
3075 | SpinLock is in the released state, then this function places SpinLock in the\r | |
3076 | acquired state and returns SpinLock. Otherwise, this function waits\r | |
3077 | indefinitely for the spin lock to be released, and then places it in the\r | |
3078 | acquired state and returns SpinLock. All state transitions of SpinLock must\r | |
3079 | be performed using MP safe mechanisms.\r | |
3080 | \r | |
3081 | If SpinLock is NULL, then ASSERT().\r | |
3082 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
3083 | If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in\r | |
3084 | PcdSpinLockTimeout microseconds, then ASSERT().\r | |
3085 | \r | |
3086 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r | |
3087 | \r | |
9aa049d9 | 3088 | @return SpinLock acquired lock.\r |
ac644614 | 3089 | \r |
3090 | **/\r | |
3091 | SPIN_LOCK *\r | |
3092 | EFIAPI\r | |
3093 | AcquireSpinLock (\r | |
aa0583c7 | 3094 | IN OUT SPIN_LOCK *SpinLock\r |
ac644614 | 3095 | );\r |
3096 | \r | |
3097 | \r | |
3098 | /**\r | |
3099 | Attempts to place a spin lock in the acquired state.\r | |
3100 | \r | |
3101 | This function checks the state of the spin lock specified by SpinLock. If\r | |
3102 | SpinLock is in the released state, then this function places SpinLock in the\r | |
3103 | acquired state and returns TRUE. Otherwise, FALSE is returned. All state\r | |
3104 | transitions of SpinLock must be performed using MP safe mechanisms.\r | |
3105 | \r | |
3106 | If SpinLock is NULL, then ASSERT().\r | |
3107 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
3108 | \r | |
3109 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r | |
3110 | \r | |
3111 | @retval TRUE SpinLock was placed in the acquired state.\r | |
3112 | @retval FALSE SpinLock could not be acquired.\r | |
3113 | \r | |
3114 | **/\r | |
3115 | BOOLEAN\r | |
3116 | EFIAPI\r | |
3117 | AcquireSpinLockOrFail (\r | |
aa0583c7 | 3118 | IN OUT SPIN_LOCK *SpinLock\r |
ac644614 | 3119 | );\r |
3120 | \r | |
3121 | \r | |
3122 | /**\r | |
3123 | Releases a spin lock.\r | |
3124 | \r | |
3125 | This function places the spin lock specified by SpinLock in the release state\r | |
3126 | and returns SpinLock.\r | |
3127 | \r | |
3128 | If SpinLock is NULL, then ASSERT().\r | |
3129 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
3130 | \r | |
3131 | @param SpinLock A pointer to the spin lock to release.\r | |
3132 | \r | |
38bbd3d9 | 3133 | @return SpinLock released lock.\r |
ac644614 | 3134 | \r |
3135 | **/\r | |
3136 | SPIN_LOCK *\r | |
3137 | EFIAPI\r | |
3138 | ReleaseSpinLock (\r | |
aa0583c7 | 3139 | IN OUT SPIN_LOCK *SpinLock\r |
ac644614 | 3140 | );\r |
3141 | \r | |
3142 | \r | |
3143 | /**\r | |
3144 | Performs an atomic increment of an 32-bit unsigned integer.\r | |
3145 | \r | |
3146 | Performs an atomic increment of the 32-bit unsigned integer specified by\r | |
3147 | Value and returns the incremented value. The increment operation must be\r | |
3148 | performed using MP safe mechanisms. The state of the return value is not\r | |
3149 | guaranteed to be MP safe.\r | |
3150 | \r | |
3151 | If Value is NULL, then ASSERT().\r | |
3152 | \r | |
3153 | @param Value A pointer to the 32-bit value to increment.\r | |
3154 | \r | |
3155 | @return The incremented value.\r | |
3156 | \r | |
3157 | **/\r | |
3158 | UINT32\r | |
3159 | EFIAPI\r | |
3160 | InterlockedIncrement (\r | |
3161 | IN UINT32 *Value\r | |
3162 | );\r | |
3163 | \r | |
3164 | \r | |
3165 | /**\r | |
3166 | Performs an atomic decrement of an 32-bit unsigned integer.\r | |
3167 | \r | |
3168 | Performs an atomic decrement of the 32-bit unsigned integer specified by\r | |
3169 | Value and returns the decremented value. The decrement operation must be\r | |
3170 | performed using MP safe mechanisms. The state of the return value is not\r | |
3171 | guaranteed to be MP safe.\r | |
3172 | \r | |
3173 | If Value is NULL, then ASSERT().\r | |
3174 | \r | |
3175 | @param Value A pointer to the 32-bit value to decrement.\r | |
3176 | \r | |
3177 | @return The decremented value.\r | |
3178 | \r | |
3179 | **/\r | |
3180 | UINT32\r | |
3181 | EFIAPI\r | |
3182 | InterlockedDecrement (\r | |
3183 | IN UINT32 *Value\r | |
3184 | );\r | |
3185 | \r | |
3186 | \r | |
3187 | /**\r | |
3188 | Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r | |
3189 | \r | |
3190 | Performs an atomic compare exchange operation on the 32-bit unsigned integer\r | |
3191 | specified by Value. If Value is equal to CompareValue, then Value is set to\r | |
3192 | ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,\r | |
3193 | then Value is returned. The compare exchange operation must be performed using\r | |
3194 | MP safe mechanisms.\r | |
3195 | \r | |
3196 | If Value is NULL, then ASSERT().\r | |
3197 | \r | |
3198 | @param Value A pointer to the 32-bit value for the compare exchange\r | |
3199 | operation.\r | |
3200 | @param CompareValue 32-bit value used in compare operation.\r | |
3201 | @param ExchangeValue 32-bit value used in exchange operation.\r | |
3202 | \r | |
3203 | @return The original *Value before exchange.\r | |
3204 | \r | |
3205 | **/\r | |
3206 | UINT32\r | |
3207 | EFIAPI\r | |
3208 | InterlockedCompareExchange32 (\r | |
3209 | IN OUT UINT32 *Value,\r | |
3210 | IN UINT32 CompareValue,\r | |
3211 | IN UINT32 ExchangeValue\r | |
3212 | );\r | |
3213 | \r | |
3214 | \r | |
3215 | /**\r | |
3216 | Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r | |
3217 | \r | |
3218 | Performs an atomic compare exchange operation on the 64-bit unsigned integer specified\r | |
3219 | by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and\r | |
3220 | CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.\r | |
3221 | The compare exchange operation must be performed using MP safe mechanisms.\r | |
3222 | \r | |
3223 | If Value is NULL, then ASSERT().\r | |
3224 | \r | |
3225 | @param Value A pointer to the 64-bit value for the compare exchange\r | |
3226 | operation.\r | |
3227 | @param CompareValue 64-bit value used in compare operation.\r | |
3228 | @param ExchangeValue 64-bit value used in exchange operation.\r | |
3229 | \r | |
3230 | @return The original *Value before exchange.\r | |
3231 | \r | |
3232 | **/\r | |
3233 | UINT64\r | |
3234 | EFIAPI\r | |
3235 | InterlockedCompareExchange64 (\r | |
3236 | IN OUT UINT64 *Value,\r | |
3237 | IN UINT64 CompareValue,\r | |
3238 | IN UINT64 ExchangeValue\r | |
3239 | );\r | |
3240 | \r | |
3241 | \r | |
3242 | /**\r | |
3243 | Performs an atomic compare exchange operation on a pointer value.\r | |
3244 | \r | |
3245 | Performs an atomic compare exchange operation on the pointer value specified\r | |
3246 | by Value. If Value is equal to CompareValue, then Value is set to\r | |
3247 | ExchangeValue and CompareValue is returned. If Value is not equal to\r | |
3248 | CompareValue, then Value is returned. The compare exchange operation must be\r | |
3249 | performed using MP safe mechanisms.\r | |
3250 | \r | |
3251 | If Value is NULL, then ASSERT().\r | |
3252 | \r | |
3253 | @param Value A pointer to the pointer value for the compare exchange\r | |
3254 | operation.\r | |
3255 | @param CompareValue Pointer value used in compare operation.\r | |
3256 | @param ExchangeValue Pointer value used in exchange operation.\r | |
3257 | \r | |
38bbd3d9 | 3258 | @return The original *Value before exchange.\r |
ac644614 | 3259 | **/\r |
3260 | VOID *\r | |
3261 | EFIAPI\r | |
3262 | InterlockedCompareExchangePointer (\r | |
3263 | IN OUT VOID **Value,\r | |
3264 | IN VOID *CompareValue,\r | |
3265 | IN VOID *ExchangeValue\r | |
3266 | );\r | |
3267 | \r | |
3268 | \r | |
3269 | //\r | |
3270 | // Base Library Checksum Functions\r | |
3271 | //\r | |
3272 | \r | |
3273 | /**\r | |
17f695ed | 3274 | Returns the sum of all elements in a buffer in unit of UINT8.\r |
ac644614 | 3275 | During calculation, the carry bits are dropped.\r |
3276 | \r | |
3277 | This function calculates the sum of all elements in a buffer\r | |
3278 | in unit of UINT8. The carry bits in result of addition are dropped.\r | |
3279 | The result is returned as UINT8. If Length is Zero, then Zero is\r | |
3280 | returned.\r | |
3281 | \r | |
3282 | If Buffer is NULL, then ASSERT().\r | |
3283 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3284 | \r | |
1106ffe1 | 3285 | @param Buffer Pointer to the buffer to carry out the sum operation.\r |
17f695ed | 3286 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3287 | \r |
3288 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3289 | \r | |
3290 | **/\r | |
3291 | UINT8\r | |
3292 | EFIAPI\r | |
3293 | CalculateSum8 (\r | |
ee6c452c | 3294 | IN CONST UINT8 *Buffer,\r |
3295 | IN UINTN Length\r | |
ac644614 | 3296 | );\r |
3297 | \r | |
3298 | \r | |
3299 | /**\r | |
3300 | Returns the two's complement checksum of all elements in a buffer\r | |
3301 | of 8-bit values.\r | |
3302 | \r | |
3303 | This function first calculates the sum of the 8-bit values in the\r | |
3304 | buffer specified by Buffer and Length. The carry bits in the result\r | |
3305 | of addition are dropped. Then, the two's complement of the sum is\r | |
3306 | returned. If Length is 0, then 0 is returned.\r | |
3307 | \r | |
3308 | If Buffer is NULL, then ASSERT().\r | |
3309 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3310 | \r | |
1106ffe1 | 3311 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r |
3312 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3313 | \r |
ee6c452c | 3314 | @return Checksum The 2's complement checksum of Buffer.\r |
ac644614 | 3315 | \r |
3316 | **/\r | |
3317 | UINT8\r | |
3318 | EFIAPI\r | |
3319 | CalculateCheckSum8 (\r | |
ee6c452c | 3320 | IN CONST UINT8 *Buffer,\r |
3321 | IN UINTN Length\r | |
ac644614 | 3322 | );\r |
3323 | \r | |
3324 | \r | |
3325 | /**\r | |
3326 | Returns the sum of all elements in a buffer of 16-bit values. During\r | |
3327 | calculation, the carry bits are dropped.\r | |
3328 | \r | |
3329 | This function calculates the sum of the 16-bit values in the buffer\r | |
3330 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3331 | The 16-bit result is returned. If Length is 0, then 0 is returned.\r | |
3332 | \r | |
3333 | If Buffer is NULL, then ASSERT().\r | |
3334 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3335 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
3336 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3337 | \r | |
1106ffe1 | 3338 | @param Buffer Pointer to the buffer to carry out the sum operation.\r |
3339 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3340 | \r |
3341 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3342 | \r | |
3343 | **/\r | |
3344 | UINT16\r | |
3345 | EFIAPI\r | |
3346 | CalculateSum16 (\r | |
ee6c452c | 3347 | IN CONST UINT16 *Buffer,\r |
3348 | IN UINTN Length\r | |
ac644614 | 3349 | );\r |
3350 | \r | |
3351 | \r | |
3352 | /**\r | |
3353 | Returns the two's complement checksum of all elements in a buffer of\r | |
3354 | 16-bit values.\r | |
3355 | \r | |
3356 | This function first calculates the sum of the 16-bit values in the buffer\r | |
3357 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3358 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3359 | is 0, then 0 is returned.\r | |
3360 | \r | |
3361 | If Buffer is NULL, then ASSERT().\r | |
3362 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3363 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
3364 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3365 | \r | |
1106ffe1 | 3366 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r |
3367 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3368 | \r |
ee6c452c | 3369 | @return Checksum The 2's complement checksum of Buffer.\r |
ac644614 | 3370 | \r |
3371 | **/\r | |
3372 | UINT16\r | |
3373 | EFIAPI\r | |
3374 | CalculateCheckSum16 (\r | |
ee6c452c | 3375 | IN CONST UINT16 *Buffer,\r |
3376 | IN UINTN Length\r | |
ac644614 | 3377 | );\r |
3378 | \r | |
3379 | \r | |
3380 | /**\r | |
17f695ed | 3381 | Returns the sum of all elements in a buffer of 32-bit values. During\r |
ac644614 | 3382 | calculation, the carry bits are dropped.\r |
3383 | \r | |
3384 | This function calculates the sum of the 32-bit values in the buffer\r | |
3385 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
17f695ed | 3386 | The 32-bit result is returned. If Length is 0, then 0 is returned.\r |
ac644614 | 3387 | \r |
3388 | If Buffer is NULL, then ASSERT().\r | |
3389 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3390 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3391 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3392 | \r | |
1106ffe1 | 3393 | @param Buffer Pointer to the buffer to carry out the sum operation.\r |
3394 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3395 | \r |
3396 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3397 | \r | |
3398 | **/\r | |
3399 | UINT32\r | |
3400 | EFIAPI\r | |
3401 | CalculateSum32 (\r | |
ee6c452c | 3402 | IN CONST UINT32 *Buffer,\r |
3403 | IN UINTN Length\r | |
ac644614 | 3404 | );\r |
3405 | \r | |
3406 | \r | |
3407 | /**\r | |
3408 | Returns the two's complement checksum of all elements in a buffer of\r | |
3409 | 32-bit values.\r | |
3410 | \r | |
3411 | This function first calculates the sum of the 32-bit values in the buffer\r | |
3412 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3413 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3414 | is 0, then 0 is returned.\r | |
3415 | \r | |
3416 | If Buffer is NULL, then ASSERT().\r | |
3417 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3418 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3419 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3420 | \r | |
1106ffe1 | 3421 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r |
3422 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3423 | \r |
ee6c452c | 3424 | @return Checksum The 2's complement checksum of Buffer.\r |
ac644614 | 3425 | \r |
3426 | **/\r | |
3427 | UINT32\r | |
3428 | EFIAPI\r | |
3429 | CalculateCheckSum32 (\r | |
ee6c452c | 3430 | IN CONST UINT32 *Buffer,\r |
3431 | IN UINTN Length\r | |
ac644614 | 3432 | );\r |
3433 | \r | |
3434 | \r | |
3435 | /**\r | |
3436 | Returns the sum of all elements in a buffer of 64-bit values. During\r | |
3437 | calculation, the carry bits are dropped.\r | |
3438 | \r | |
3439 | This function calculates the sum of the 64-bit values in the buffer\r | |
3440 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3441 | The 64-bit result is returned. If Length is 0, then 0 is returned.\r | |
3442 | \r | |
3443 | If Buffer is NULL, then ASSERT().\r | |
3444 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3445 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3446 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3447 | \r | |
1106ffe1 | 3448 | @param Buffer Pointer to the buffer to carry out the sum operation.\r |
3449 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3450 | \r |
3451 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3452 | \r | |
3453 | **/\r | |
3454 | UINT64\r | |
3455 | EFIAPI\r | |
3456 | CalculateSum64 (\r | |
ee6c452c | 3457 | IN CONST UINT64 *Buffer,\r |
3458 | IN UINTN Length\r | |
ac644614 | 3459 | );\r |
3460 | \r | |
3461 | \r | |
3462 | /**\r | |
3463 | Returns the two's complement checksum of all elements in a buffer of\r | |
3464 | 64-bit values.\r | |
3465 | \r | |
3466 | This function first calculates the sum of the 64-bit values in the buffer\r | |
3467 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3468 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3469 | is 0, then 0 is returned.\r | |
3470 | \r | |
3471 | If Buffer is NULL, then ASSERT().\r | |
3472 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3473 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3474 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3475 | \r | |
1106ffe1 | 3476 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r |
3477 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3478 | \r |
ee6c452c | 3479 | @return Checksum The 2's complement checksum of Buffer.\r |
ac644614 | 3480 | \r |
3481 | **/\r | |
3482 | UINT64\r | |
3483 | EFIAPI\r | |
3484 | CalculateCheckSum64 (\r | |
ee6c452c | 3485 | IN CONST UINT64 *Buffer,\r |
3486 | IN UINTN Length\r | |
ac644614 | 3487 | );\r |
3488 | \r | |
3489 | \r | |
1106ffe1 | 3490 | ///\r |
3491 | /// Base Library CPU Functions\r | |
3492 | ///\r | |
ac644614 | 3493 | typedef\r |
3494 | VOID\r | |
9810cdd8 | 3495 | (EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r |
ac644614 | 3496 | IN VOID *Context1, OPTIONAL\r |
3497 | IN VOID *Context2 OPTIONAL\r | |
3498 | );\r | |
3499 | \r | |
3500 | \r | |
3501 | /**\r | |
3502 | Used to serialize load and store operations.\r | |
3503 | \r | |
3504 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
3505 | globally visible when this function returns.\r | |
3506 | \r | |
3507 | **/\r | |
3508 | VOID\r | |
3509 | EFIAPI\r | |
3510 | MemoryFence (\r | |
3511 | VOID\r | |
3512 | );\r | |
3513 | \r | |
3514 | \r | |
3515 | /**\r | |
3516 | Saves the current CPU context that can be restored with a call to LongJump()\r | |
3517 | and returns 0.\r | |
3518 | \r | |
3519 | Saves the current CPU context in the buffer specified by JumpBuffer and\r | |
3520 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r | |
3521 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r | |
3522 | \r | |
3523 | If JumpBuffer is NULL, then ASSERT().\r | |
3524 | For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
17f695ed | 3525 | \r |
3526 | NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r | |
3527 | The same structure must never be used for more than one CPU architecture context.\r | |
3528 | For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r | |
3529 | SetJump()/LongJump() is not currently supported for the EBC processor type. \r | |
ac644614 | 3530 | \r |
3531 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3532 | \r | |
3533 | @retval 0 Indicates a return from SetJump().\r | |
3534 | \r | |
3535 | **/\r | |
3536 | UINTN\r | |
3537 | EFIAPI\r | |
3538 | SetJump (\r | |
3539 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
3540 | );\r | |
3541 | \r | |
3542 | \r | |
3543 | /**\r | |
3544 | Restores the CPU context that was saved with SetJump().\r | |
3545 | \r | |
3546 | Restores the CPU context from the buffer specified by JumpBuffer. This\r | |
3547 | function never returns to the caller. Instead is resumes execution based on\r | |
3548 | the state of JumpBuffer.\r | |
3549 | \r | |
3550 | If JumpBuffer is NULL, then ASSERT().\r | |
3551 | For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
3552 | If Value is 0, then ASSERT().\r | |
3553 | \r | |
3554 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3555 | @param Value The value to return when the SetJump() context is\r | |
3556 | restored and must be non-zero.\r | |
3557 | \r | |
3558 | **/\r | |
3559 | VOID\r | |
3560 | EFIAPI\r | |
3561 | LongJump (\r | |
3562 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
3563 | IN UINTN Value\r | |
3564 | );\r | |
3565 | \r | |
3566 | \r | |
3567 | /**\r | |
3568 | Enables CPU interrupts.\r | |
3569 | \r | |
ac644614 | 3570 | **/\r |
3571 | VOID\r | |
3572 | EFIAPI\r | |
3573 | EnableInterrupts (\r | |
3574 | VOID\r | |
3575 | );\r | |
3576 | \r | |
3577 | \r | |
3578 | /**\r | |
3579 | Disables CPU interrupts.\r | |
3580 | \r | |
ac644614 | 3581 | **/\r |
3582 | VOID\r | |
3583 | EFIAPI\r | |
3584 | DisableInterrupts (\r | |
3585 | VOID\r | |
3586 | );\r | |
3587 | \r | |
3588 | \r | |
3589 | /**\r | |
3590 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
3591 | operation.\r | |
3592 | \r | |
ac644614 | 3593 | @retval TRUE CPU interrupts were enabled on entry to this call.\r |
3594 | @retval FALSE CPU interrupts were disabled on entry to this call.\r | |
3595 | \r | |
3596 | **/\r | |
3597 | BOOLEAN\r | |
3598 | EFIAPI\r | |
3599 | SaveAndDisableInterrupts (\r | |
3600 | VOID\r | |
3601 | );\r | |
3602 | \r | |
3603 | \r | |
3604 | /**\r | |
3605 | Enables CPU interrupts for the smallest window required to capture any\r | |
3606 | pending interrupts.\r | |
3607 | \r | |
ac644614 | 3608 | **/\r |
3609 | VOID\r | |
3610 | EFIAPI\r | |
3611 | EnableDisableInterrupts (\r | |
3612 | VOID\r | |
3613 | );\r | |
3614 | \r | |
3615 | \r | |
3616 | /**\r | |
3617 | Retrieves the current CPU interrupt state.\r | |
3618 | \r | |
38bbd3d9 | 3619 | Returns TRUE is interrupts are currently enabled. Otherwise\r |
3620 | returns FALSE.\r | |
ac644614 | 3621 | \r |
3622 | @retval TRUE CPU interrupts are enabled.\r | |
3623 | @retval FALSE CPU interrupts are disabled.\r | |
3624 | \r | |
3625 | **/\r | |
3626 | BOOLEAN\r | |
3627 | EFIAPI\r | |
3628 | GetInterruptState (\r | |
3629 | VOID\r | |
3630 | );\r | |
3631 | \r | |
3632 | \r | |
3633 | /**\r | |
3634 | Set the current CPU interrupt state.\r | |
3635 | \r | |
3636 | Sets the current CPU interrupt state to the state specified by\r | |
3637 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r | |
3638 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r | |
3639 | returned.\r | |
3640 | \r | |
3641 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r | |
3642 | interrupts should be disabled.\r | |
3643 | \r | |
3644 | @return InterruptState\r | |
3645 | \r | |
3646 | **/\r | |
3647 | BOOLEAN\r | |
3648 | EFIAPI\r | |
3649 | SetInterruptState (\r | |
3650 | IN BOOLEAN InterruptState\r | |
3651 | );\r | |
3652 | \r | |
3653 | \r | |
3654 | /**\r | |
3655 | Requests CPU to pause for a short period of time.\r | |
3656 | \r | |
3657 | Requests CPU to pause for a short period of time. Typically used in MP\r | |
3658 | systems to prevent memory starvation while waiting for a spin lock.\r | |
3659 | \r | |
3660 | **/\r | |
3661 | VOID\r | |
3662 | EFIAPI\r | |
3663 | CpuPause (\r | |
3664 | VOID\r | |
3665 | );\r | |
3666 | \r | |
3667 | \r | |
3668 | /**\r | |
3669 | Transfers control to a function starting with a new stack.\r | |
3670 | \r | |
3671 | Transfers control to the function specified by EntryPoint using the\r | |
3672 | new stack specified by NewStack and passing in the parameters specified\r | |
3673 | by Context1 and Context2. Context1 and Context2 are optional and may\r | |
3674 | be NULL. The function EntryPoint must never return. This function\r | |
3675 | supports a variable number of arguments following the NewStack parameter.\r | |
3676 | These additional arguments are ignored on IA-32, x64, and EBC.\r | |
3677 | IPF CPUs expect one additional parameter of type VOID * that specifies\r | |
3678 | the new backing store pointer.\r | |
3679 | \r | |
3680 | If EntryPoint is NULL, then ASSERT().\r | |
3681 | If NewStack is NULL, then ASSERT().\r | |
3682 | \r | |
3683 | @param EntryPoint A pointer to function to call with the new stack.\r | |
3684 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
3685 | function.\r | |
3686 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
3687 | function.\r | |
3688 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
3689 | function.\r | |
285010e7 | 3690 | @param ... This variable argument list is ignored for IA32, x64, and EBC. \r |
3691 | For IPF, this variable argument list is expected to contain \r | |
3692 | a single parameter of type VOID * that specifies the new backing \r | |
3693 | store pointer.\r | |
42eedea9 | 3694 | \r |
ac644614 | 3695 | \r |
3696 | **/\r | |
3697 | VOID\r | |
3698 | EFIAPI\r | |
3699 | SwitchStack (\r | |
3700 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
3701 | IN VOID *Context1, OPTIONAL\r | |
3702 | IN VOID *Context2, OPTIONAL\r | |
3703 | IN VOID *NewStack,\r | |
3704 | ...\r | |
3705 | );\r | |
3706 | \r | |
3707 | \r | |
3708 | /**\r | |
3709 | Generates a breakpoint on the CPU.\r | |
3710 | \r | |
3711 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
3712 | that code can resume normal execution after the breakpoint.\r | |
3713 | \r | |
3714 | **/\r | |
3715 | VOID\r | |
3716 | EFIAPI\r | |
3717 | CpuBreakpoint (\r | |
3718 | VOID\r | |
3719 | );\r | |
3720 | \r | |
3721 | \r | |
3722 | /**\r | |
3723 | Executes an infinite loop.\r | |
3724 | \r | |
3725 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r | |
3726 | past the loop and the code that follows the loop must execute properly. This\r | |
3727 | implies that the infinite loop must not cause the code that follow it to be\r | |
3728 | optimized away.\r | |
3729 | \r | |
3730 | **/\r | |
3731 | VOID\r | |
3732 | EFIAPI\r | |
3733 | CpuDeadLoop (\r | |
3734 | VOID\r | |
3735 | );\r | |
3736 | \r | |
ac644614 | 3737 | #if defined (MDE_CPU_IPF)\r |
3738 | \r | |
3739 | /**\r | |
3740 | Flush a range of cache lines in the cache coherency domain of the calling\r | |
3741 | CPU.\r | |
3742 | \r | |
3743 | Invalidates the cache lines specified by Address and Length. If Address is\r | |
3744 | not aligned on a cache line boundary, then entire cache line containing\r | |
3745 | Address is invalidated. If Address + Length is not aligned on a cache line\r | |
3746 | boundary, then the entire instruction cache line containing Address + Length\r | |
3747 | -1 is invalidated. This function may choose to invalidate the entire\r | |
3748 | instruction cache if that is more efficient than invalidating the specified\r | |
3749 | range. If Length is 0, the no instruction cache lines are invalidated.\r | |
3750 | Address is returned.\r | |
3751 | \r | |
3752 | If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r | |
3753 | \r | |
3754 | @param Address The base address of the instruction lines to invalidate. If\r | |
3755 | the CPU is in a physical addressing mode, then Address is a\r | |
3756 | physical address. If the CPU is in a virtual addressing mode,\r | |
3757 | then Address is a virtual address.\r | |
3758 | \r | |
3759 | @param Length The number of bytes to invalidate from the instruction cache.\r | |
3760 | \r | |
3761 | @return Address\r | |
3762 | \r | |
3763 | **/\r | |
3764 | VOID *\r | |
3765 | EFIAPI\r | |
3766 | IpfFlushCacheRange (\r | |
3767 | IN VOID *Address,\r | |
3768 | IN UINTN Length\r | |
3769 | );\r | |
3770 | \r | |
3771 | \r | |
3772 | /**\r | |
3773 | Executes a FC instruction\r | |
3774 | Executes a FC instruction on the cache line specified by Address.\r | |
3775 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r | |
3776 | An implementation may flush a larger region. This function is only available on IPF.\r | |
3777 | \r | |
ee6c452c | 3778 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3779 | \r |
3780 | @return The address of FC instruction executed.\r | |
3781 | \r | |
3782 | **/\r | |
3783 | UINT64\r | |
3784 | EFIAPI\r | |
3785 | AsmFc (\r | |
3786 | IN UINT64 Address\r | |
3787 | );\r | |
3788 | \r | |
3789 | \r | |
3790 | /**\r | |
3791 | Executes a FC.I instruction.\r | |
3792 | Executes a FC.I instruction on the cache line specified by Address.\r | |
3793 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r | |
3794 | An implementation may flush a larger region. This function is only available on IPF.\r | |
3795 | \r | |
ee6c452c | 3796 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3797 | \r |
3798 | @return The address of FC.I instruction executed.\r | |
3799 | \r | |
3800 | **/\r | |
3801 | UINT64\r | |
3802 | EFIAPI\r | |
3803 | AsmFci (\r | |
3804 | IN UINT64 Address\r | |
3805 | );\r | |
3806 | \r | |
3807 | \r | |
3808 | /**\r | |
3809 | Reads the current value of a Processor Identifier Register (CPUID).\r | |
17f695ed | 3810 | \r |
3811 | Reads and returns the current value of Processor Identifier Register specified by Index. \r | |
ac644614 | 3812 | The Index of largest implemented CPUID (One less than the number of implemented CPUID\r |
3813 | registers) is determined by CPUID [3] bits {7:0}.\r | |
3814 | No parameter checking is performed on Index. If the Index value is beyond the\r | |
3815 | implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r | |
3816 | must either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
3817 | catch the faults. This function is only available on IPF.\r | |
3818 | \r | |
ee6c452c | 3819 | @param Index The 8-bit Processor Identifier Register index to read.\r |
ac644614 | 3820 | \r |
3821 | @return The current value of Processor Identifier Register specified by Index.\r | |
3822 | \r | |
3823 | **/\r | |
3824 | UINT64\r | |
3825 | EFIAPI\r | |
3826 | AsmReadCpuid (\r | |
3827 | IN UINT8 Index\r | |
3828 | );\r | |
3829 | \r | |
3830 | \r | |
3831 | /**\r | |
3832 | Reads the current value of 64-bit Processor Status Register (PSR).\r | |
3833 | This function is only available on IPF.\r | |
3834 | \r | |
3835 | @return The current value of PSR.\r | |
3836 | \r | |
3837 | **/\r | |
3838 | UINT64\r | |
3839 | EFIAPI\r | |
3840 | AsmReadPsr (\r | |
3841 | VOID\r | |
3842 | );\r | |
3843 | \r | |
3844 | \r | |
3845 | /**\r | |
3846 | Writes the current value of 64-bit Processor Status Register (PSR).\r | |
22388319 | 3847 | \r |
ac644614 | 3848 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
22388319 | 3849 | reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r |
3850 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
3851 | fault handlers to catch the faults. This function is only available on IPF.\r | |
ac644614 | 3852 | \r |
ee6c452c | 3853 | @param Value The 64-bit value to write to PSR.\r |
ac644614 | 3854 | \r |
3855 | @return The 64-bit value written to the PSR.\r | |
3856 | \r | |
3857 | **/\r | |
3858 | UINT64\r | |
3859 | EFIAPI\r | |
3860 | AsmWritePsr (\r | |
3861 | IN UINT64 Value\r | |
3862 | );\r | |
3863 | \r | |
3864 | \r | |
3865 | /**\r | |
3866 | Reads the current value of 64-bit Kernel Register #0 (KR0).\r | |
3867 | This function is only available on IPF.\r | |
3868 | \r | |
3869 | @return The current value of KR0.\r | |
3870 | \r | |
3871 | **/\r | |
3872 | UINT64\r | |
3873 | EFIAPI\r | |
3874 | AsmReadKr0 (\r | |
3875 | VOID\r | |
3876 | );\r | |
3877 | \r | |
3878 | \r | |
3879 | /**\r | |
3880 | Reads the current value of 64-bit Kernel Register #1 (KR1).\r | |
3881 | This function is only available on IPF.\r | |
3882 | \r | |
3883 | @return The current value of KR1.\r | |
3884 | \r | |
3885 | **/\r | |
3886 | UINT64\r | |
3887 | EFIAPI\r | |
3888 | AsmReadKr1 (\r | |
3889 | VOID\r | |
3890 | );\r | |
3891 | \r | |
3892 | \r | |
3893 | /**\r | |
3894 | Reads the current value of 64-bit Kernel Register #2 (KR2).\r | |
3895 | This function is only available on IPF.\r | |
3896 | \r | |
3897 | @return The current value of KR2.\r | |
3898 | \r | |
3899 | **/\r | |
3900 | UINT64\r | |
3901 | EFIAPI\r | |
3902 | AsmReadKr2 (\r | |
3903 | VOID\r | |
3904 | );\r | |
3905 | \r | |
3906 | \r | |
3907 | /**\r | |
3908 | Reads the current value of 64-bit Kernel Register #3 (KR3).\r | |
3909 | This function is only available on IPF.\r | |
3910 | \r | |
3911 | @return The current value of KR3.\r | |
3912 | \r | |
3913 | **/\r | |
3914 | UINT64\r | |
3915 | EFIAPI\r | |
3916 | AsmReadKr3 (\r | |
3917 | VOID\r | |
3918 | );\r | |
3919 | \r | |
3920 | \r | |
3921 | /**\r | |
3922 | Reads the current value of 64-bit Kernel Register #4 (KR4).\r | |
3923 | This function is only available on IPF.\r | |
3924 | \r | |
3925 | @return The current value of KR4.\r | |
3926 | \r | |
3927 | **/\r | |
3928 | UINT64\r | |
3929 | EFIAPI\r | |
3930 | AsmReadKr4 (\r | |
3931 | VOID\r | |
3932 | );\r | |
3933 | \r | |
3934 | \r | |
3935 | /**\r | |
3936 | Reads the current value of 64-bit Kernel Register #5 (KR5).\r | |
3937 | This function is only available on IPF.\r | |
3938 | \r | |
3939 | @return The current value of KR5.\r | |
3940 | \r | |
3941 | **/\r | |
3942 | UINT64\r | |
3943 | EFIAPI\r | |
3944 | AsmReadKr5 (\r | |
3945 | VOID\r | |
3946 | );\r | |
3947 | \r | |
3948 | \r | |
3949 | /**\r | |
3950 | Reads the current value of 64-bit Kernel Register #6 (KR6).\r | |
3951 | This function is only available on IPF.\r | |
3952 | \r | |
3953 | @return The current value of KR6.\r | |
3954 | \r | |
3955 | **/\r | |
3956 | UINT64\r | |
3957 | EFIAPI\r | |
3958 | AsmReadKr6 (\r | |
3959 | VOID\r | |
3960 | );\r | |
3961 | \r | |
3962 | \r | |
3963 | /**\r | |
3964 | Reads the current value of 64-bit Kernel Register #7 (KR7).\r | |
3965 | This function is only available on IPF.\r | |
3966 | \r | |
3967 | @return The current value of KR7.\r | |
3968 | \r | |
3969 | **/\r | |
3970 | UINT64\r | |
3971 | EFIAPI\r | |
3972 | AsmReadKr7 (\r | |
3973 | VOID\r | |
3974 | );\r | |
3975 | \r | |
3976 | \r | |
3977 | /**\r | |
3978 | Write the current value of 64-bit Kernel Register #0 (KR0).\r | |
3979 | This function is only available on IPF.\r | |
3980 | \r | |
ee6c452c | 3981 | @param Value The 64-bit value to write to KR0.\r |
ac644614 | 3982 | \r |
3983 | @return The 64-bit value written to the KR0.\r | |
3984 | \r | |
3985 | **/\r | |
3986 | UINT64\r | |
3987 | EFIAPI\r | |
3988 | AsmWriteKr0 (\r | |
3989 | IN UINT64 Value\r | |
3990 | );\r | |
3991 | \r | |
3992 | \r | |
3993 | /**\r | |
3994 | Write the current value of 64-bit Kernel Register #1 (KR1).\r | |
3995 | This function is only available on IPF.\r | |
3996 | \r | |
ee6c452c | 3997 | @param Value The 64-bit value to write to KR1.\r |
ac644614 | 3998 | \r |
3999 | @return The 64-bit value written to the KR1.\r | |
4000 | \r | |
4001 | **/\r | |
4002 | UINT64\r | |
4003 | EFIAPI\r | |
4004 | AsmWriteKr1 (\r | |
4005 | IN UINT64 Value\r | |
4006 | );\r | |
4007 | \r | |
4008 | \r | |
4009 | /**\r | |
4010 | Write the current value of 64-bit Kernel Register #2 (KR2).\r | |
4011 | This function is only available on IPF.\r | |
4012 | \r | |
ee6c452c | 4013 | @param Value The 64-bit value to write to KR2.\r |
ac644614 | 4014 | \r |
4015 | @return The 64-bit value written to the KR2.\r | |
4016 | \r | |
4017 | **/\r | |
4018 | UINT64\r | |
4019 | EFIAPI\r | |
4020 | AsmWriteKr2 (\r | |
4021 | IN UINT64 Value\r | |
4022 | );\r | |
4023 | \r | |
4024 | \r | |
4025 | /**\r | |
4026 | Write the current value of 64-bit Kernel Register #3 (KR3).\r | |
4027 | This function is only available on IPF.\r | |
4028 | \r | |
ee6c452c | 4029 | @param Value The 64-bit value to write to KR3.\r |
ac644614 | 4030 | \r |
4031 | @return The 64-bit value written to the KR3.\r | |
4032 | \r | |
4033 | **/\r | |
4034 | UINT64\r | |
4035 | EFIAPI\r | |
4036 | AsmWriteKr3 (\r | |
4037 | IN UINT64 Value\r | |
4038 | );\r | |
4039 | \r | |
4040 | \r | |
4041 | /**\r | |
4042 | Write the current value of 64-bit Kernel Register #4 (KR4).\r | |
4043 | This function is only available on IPF.\r | |
4044 | \r | |
ee6c452c | 4045 | @param Value The 64-bit value to write to KR4.\r |
ac644614 | 4046 | \r |
4047 | @return The 64-bit value written to the KR4.\r | |
4048 | \r | |
4049 | **/\r | |
4050 | UINT64\r | |
4051 | EFIAPI\r | |
4052 | AsmWriteKr4 (\r | |
4053 | IN UINT64 Value\r | |
4054 | );\r | |
4055 | \r | |
4056 | \r | |
4057 | /**\r | |
4058 | Write the current value of 64-bit Kernel Register #5 (KR5).\r | |
4059 | This function is only available on IPF.\r | |
4060 | \r | |
ee6c452c | 4061 | @param Value The 64-bit value to write to KR5.\r |
ac644614 | 4062 | \r |
4063 | @return The 64-bit value written to the KR5.\r | |
4064 | \r | |
4065 | **/\r | |
4066 | UINT64\r | |
4067 | EFIAPI\r | |
4068 | AsmWriteKr5 (\r | |
4069 | IN UINT64 Value\r | |
4070 | );\r | |
4071 | \r | |
4072 | \r | |
4073 | /**\r | |
4074 | Write the current value of 64-bit Kernel Register #6 (KR6).\r | |
4075 | This function is only available on IPF.\r | |
4076 | \r | |
ee6c452c | 4077 | @param Value The 64-bit value to write to KR6.\r |
ac644614 | 4078 | \r |
4079 | @return The 64-bit value written to the KR6.\r | |
4080 | \r | |
4081 | **/\r | |
4082 | UINT64\r | |
4083 | EFIAPI\r | |
4084 | AsmWriteKr6 (\r | |
4085 | IN UINT64 Value\r | |
4086 | );\r | |
4087 | \r | |
4088 | \r | |
4089 | /**\r | |
4090 | Write the current value of 64-bit Kernel Register #7 (KR7).\r | |
4091 | This function is only available on IPF.\r | |
4092 | \r | |
ee6c452c | 4093 | @param Value The 64-bit value to write to KR7.\r |
ac644614 | 4094 | \r |
4095 | @return The 64-bit value written to the KR7.\r | |
4096 | \r | |
4097 | **/\r | |
4098 | UINT64\r | |
4099 | EFIAPI\r | |
4100 | AsmWriteKr7 (\r | |
4101 | IN UINT64 Value\r | |
4102 | );\r | |
4103 | \r | |
4104 | \r | |
4105 | /**\r | |
4106 | Reads the current value of Interval Timer Counter Register (ITC).\r | |
4107 | This function is only available on IPF.\r | |
4108 | \r | |
4109 | @return The current value of ITC.\r | |
4110 | \r | |
4111 | **/\r | |
4112 | UINT64\r | |
4113 | EFIAPI\r | |
4114 | AsmReadItc (\r | |
4115 | VOID\r | |
4116 | );\r | |
4117 | \r | |
4118 | \r | |
4119 | /**\r | |
4120 | Reads the current value of Interval Timer Vector Register (ITV).\r | |
4121 | This function is only available on IPF.\r | |
4122 | \r | |
4123 | @return The current value of ITV.\r | |
4124 | \r | |
4125 | **/\r | |
4126 | UINT64\r | |
4127 | EFIAPI\r | |
4128 | AsmReadItv (\r | |
4129 | VOID\r | |
4130 | );\r | |
4131 | \r | |
4132 | \r | |
4133 | /**\r | |
4134 | Reads the current value of Interval Timer Match Register (ITM).\r | |
4135 | This function is only available on IPF.\r | |
4136 | \r | |
4137 | @return The current value of ITM.\r | |
4138 | **/\r | |
4139 | UINT64\r | |
4140 | EFIAPI\r | |
4141 | AsmReadItm (\r | |
4142 | VOID\r | |
4143 | );\r | |
4144 | \r | |
4145 | \r | |
4146 | /**\r | |
4147 | Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r | |
4148 | This function is only available on IPF.\r | |
4149 | \r | |
ee6c452c | 4150 | @param Value The 64-bit value to write to ITC.\r |
ac644614 | 4151 | \r |
4152 | @return The 64-bit value written to the ITC.\r | |
4153 | \r | |
4154 | **/\r | |
4155 | UINT64\r | |
4156 | EFIAPI\r | |
4157 | AsmWriteItc (\r | |
4158 | IN UINT64 Value\r | |
4159 | );\r | |
4160 | \r | |
4161 | \r | |
4162 | /**\r | |
4163 | Writes the current value of 64-bit Interval Timer Match Register (ITM).\r | |
4164 | This function is only available on IPF.\r | |
4165 | \r | |
ee6c452c | 4166 | @param Value The 64-bit value to write to ITM.\r |
ac644614 | 4167 | \r |
4168 | @return The 64-bit value written to the ITM.\r | |
4169 | \r | |
4170 | **/\r | |
4171 | UINT64\r | |
4172 | EFIAPI\r | |
4173 | AsmWriteItm (\r | |
4174 | IN UINT64 Value\r | |
4175 | );\r | |
4176 | \r | |
4177 | \r | |
4178 | /**\r | |
4179 | Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r | |
4180 | No parameter checking is performed on Value. All bits of Value corresponding to\r | |
4181 | reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r | |
4182 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4183 | fault handlers to catch the faults.\r | |
4184 | This function is only available on IPF.\r | |
4185 | \r | |
ee6c452c | 4186 | @param Value The 64-bit value to write to ITV.\r |
ac644614 | 4187 | \r |
4188 | @return The 64-bit value written to the ITV.\r | |
4189 | \r | |
4190 | **/\r | |
4191 | UINT64\r | |
4192 | EFIAPI\r | |
4193 | AsmWriteItv (\r | |
4194 | IN UINT64 Value\r | |
4195 | );\r | |
4196 | \r | |
4197 | \r | |
4198 | /**\r | |
4199 | Reads the current value of Default Control Register (DCR).\r | |
4200 | This function is only available on IPF.\r | |
4201 | \r | |
4202 | @return The current value of DCR.\r | |
4203 | \r | |
4204 | **/\r | |
4205 | UINT64\r | |
4206 | EFIAPI\r | |
4207 | AsmReadDcr (\r | |
4208 | VOID\r | |
4209 | );\r | |
4210 | \r | |
4211 | \r | |
4212 | /**\r | |
4213 | Reads the current value of Interruption Vector Address Register (IVA).\r | |
4214 | This function is only available on IPF.\r | |
4215 | \r | |
4216 | @return The current value of IVA.\r | |
4217 | **/\r | |
4218 | UINT64\r | |
4219 | EFIAPI\r | |
4220 | AsmReadIva (\r | |
4221 | VOID\r | |
4222 | );\r | |
4223 | \r | |
4224 | \r | |
4225 | /**\r | |
4226 | Reads the current value of Page Table Address Register (PTA).\r | |
4227 | This function is only available on IPF.\r | |
4228 | \r | |
4229 | @return The current value of PTA.\r | |
4230 | \r | |
4231 | **/\r | |
4232 | UINT64\r | |
4233 | EFIAPI\r | |
4234 | AsmReadPta (\r | |
4235 | VOID\r | |
4236 | );\r | |
4237 | \r | |
4238 | \r | |
4239 | /**\r | |
4240 | Writes the current value of 64-bit Default Control Register (DCR).\r | |
4241 | No parameter checking is performed on Value. All bits of Value corresponding to\r | |
4242 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
4243 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4244 | fault handlers to catch the faults.\r | |
4245 | This function is only available on IPF.\r | |
4246 | \r | |
ee6c452c | 4247 | @param Value The 64-bit value to write to DCR.\r |
ac644614 | 4248 | \r |
4249 | @return The 64-bit value written to the DCR.\r | |
4250 | \r | |
4251 | **/\r | |
4252 | UINT64\r | |
4253 | EFIAPI\r | |
4254 | AsmWriteDcr (\r | |
4255 | IN UINT64 Value\r | |
4256 | );\r | |
4257 | \r | |
4258 | \r | |
4259 | /**\r | |
4260 | Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r | |
4261 | The size of vector table is 32 K bytes and is 32 K bytes aligned\r | |
4262 | the low 15 bits of Value is ignored when written.\r | |
4263 | This function is only available on IPF.\r | |
4264 | \r | |
ee6c452c | 4265 | @param Value The 64-bit value to write to IVA.\r |
ac644614 | 4266 | \r |
4267 | @return The 64-bit value written to the IVA.\r | |
4268 | \r | |
4269 | **/\r | |
4270 | UINT64\r | |
4271 | EFIAPI\r | |
4272 | AsmWriteIva (\r | |
4273 | IN UINT64 Value\r | |
4274 | );\r | |
4275 | \r | |
4276 | \r | |
4277 | /**\r | |
4278 | Writes the current value of 64-bit Page Table Address Register (PTA).\r | |
4279 | No parameter checking is performed on Value. All bits of Value corresponding to\r | |
4280 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
4281 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4282 | fault handlers to catch the faults.\r | |
4283 | This function is only available on IPF.\r | |
4284 | \r | |
ee6c452c | 4285 | @param Value The 64-bit value to write to PTA.\r |
ac644614 | 4286 | \r |
4287 | @return The 64-bit value written to the PTA.\r | |
4288 | **/\r | |
4289 | UINT64\r | |
4290 | EFIAPI\r | |
4291 | AsmWritePta (\r | |
4292 | IN UINT64 Value\r | |
4293 | );\r | |
4294 | \r | |
4295 | \r | |
4296 | /**\r | |
4297 | Reads the current value of Local Interrupt ID Register (LID).\r | |
4298 | This function is only available on IPF.\r | |
4299 | \r | |
4300 | @return The current value of LID.\r | |
4301 | \r | |
4302 | **/\r | |
4303 | UINT64\r | |
4304 | EFIAPI\r | |
4305 | AsmReadLid (\r | |
4306 | VOID\r | |
4307 | );\r | |
4308 | \r | |
4309 | \r | |
4310 | /**\r | |
4311 | Reads the current value of External Interrupt Vector Register (IVR).\r | |
4312 | This function is only available on IPF.\r | |
4313 | \r | |
4314 | @return The current value of IVR.\r | |
4315 | \r | |
4316 | **/\r | |
4317 | UINT64\r | |
4318 | EFIAPI\r | |
4319 | AsmReadIvr (\r | |
4320 | VOID\r | |
4321 | );\r | |
4322 | \r | |
4323 | \r | |
4324 | /**\r | |
4325 | Reads the current value of Task Priority Register (TPR).\r | |
4326 | This function is only available on IPF.\r | |
4327 | \r | |
4328 | @return The current value of TPR.\r | |
4329 | \r | |
4330 | **/\r | |
4331 | UINT64\r | |
4332 | EFIAPI\r | |
4333 | AsmReadTpr (\r | |
4334 | VOID\r | |
4335 | );\r | |
4336 | \r | |
4337 | \r | |
4338 | /**\r | |
4339 | Reads the current value of External Interrupt Request Register #0 (IRR0).\r | |
4340 | This function is only available on IPF.\r | |
4341 | \r | |
4342 | @return The current value of IRR0.\r | |
4343 | \r | |
4344 | **/\r | |
4345 | UINT64\r | |
4346 | EFIAPI\r | |
4347 | AsmReadIrr0 (\r | |
4348 | VOID\r | |
4349 | );\r | |
4350 | \r | |
4351 | \r | |
4352 | /**\r | |
4353 | Reads the current value of External Interrupt Request Register #1 (IRR1).\r | |
4354 | This function is only available on IPF.\r | |
4355 | \r | |
4356 | @return The current value of IRR1.\r | |
4357 | \r | |
4358 | **/\r | |
4359 | UINT64\r | |
4360 | EFIAPI\r | |
4361 | AsmReadIrr1 (\r | |
4362 | VOID\r | |
4363 | );\r | |
4364 | \r | |
4365 | \r | |
4366 | /**\r | |
4367 | Reads the current value of External Interrupt Request Register #2 (IRR2).\r | |
4368 | This function is only available on IPF.\r | |
4369 | \r | |
4370 | @return The current value of IRR2.\r | |
4371 | \r | |
4372 | **/\r | |
4373 | UINT64\r | |
4374 | EFIAPI\r | |
4375 | AsmReadIrr2 (\r | |
4376 | VOID\r | |
4377 | );\r | |
4378 | \r | |
4379 | \r | |
4380 | /**\r | |
4381 | Reads the current value of External Interrupt Request Register #3 (IRR3).\r | |
4382 | This function is only available on IPF.\r | |
4383 | \r | |
4384 | @return The current value of IRR3.\r | |
4385 | \r | |
4386 | **/\r | |
4387 | UINT64\r | |
4388 | EFIAPI\r | |
4389 | AsmReadIrr3 (\r | |
4390 | VOID\r | |
4391 | );\r | |
4392 | \r | |
4393 | \r | |
4394 | /**\r | |
4395 | Reads the current value of Performance Monitor Vector Register (PMV).\r | |
4396 | This function is only available on IPF.\r | |
4397 | \r | |
4398 | @return The current value of PMV.\r | |
4399 | \r | |
4400 | **/\r | |
4401 | UINT64\r | |
4402 | EFIAPI\r | |
4403 | AsmReadPmv (\r | |
4404 | VOID\r | |
4405 | );\r | |
4406 | \r | |
4407 | \r | |
4408 | /**\r | |
4409 | Reads the current value of Corrected Machine Check Vector Register (CMCV).\r | |
4410 | This function is only available on IPF.\r | |
4411 | \r | |
4412 | @return The current value of CMCV.\r | |
4413 | \r | |
4414 | **/\r | |
4415 | UINT64\r | |
4416 | EFIAPI\r | |
4417 | AsmReadCmcv (\r | |
4418 | VOID\r | |
4419 | );\r | |
4420 | \r | |
4421 | \r | |
4422 | /**\r | |
4423 | Reads the current value of Local Redirection Register #0 (LRR0).\r | |
4424 | This function is only available on IPF.\r | |
4425 | \r | |
4426 | @return The current value of LRR0.\r | |
4427 | \r | |
4428 | **/\r | |
4429 | UINT64\r | |
4430 | EFIAPI\r | |
4431 | AsmReadLrr0 (\r | |
4432 | VOID\r | |
4433 | );\r | |
4434 | \r | |
4435 | \r | |
4436 | /**\r | |
4437 | Reads the current value of Local Redirection Register #1 (LRR1).\r | |
4438 | This function is only available on IPF.\r | |
4439 | \r | |
4440 | @return The current value of LRR1.\r | |
4441 | \r | |
4442 | **/\r | |
4443 | UINT64\r | |
4444 | EFIAPI\r | |
4445 | AsmReadLrr1 (\r | |
4446 | VOID\r | |
4447 | );\r | |
4448 | \r | |
4449 | \r | |
4450 | /**\r | |
4451 | Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r | |
4452 | No parameter checking is performed on Value. All bits of Value corresponding to\r | |
4453 | reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r | |
4454 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4455 | fault handlers to catch the faults.\r | |
4456 | This function is only available on IPF.\r | |
4457 | \r | |
ee6c452c | 4458 | @param Value The 64-bit value to write to LID.\r |
ac644614 | 4459 | \r |
4460 | @return The 64-bit value written to the LID.\r | |
4461 | \r | |
4462 | **/\r | |
4463 | UINT64\r | |
4464 | EFIAPI\r | |
4465 | AsmWriteLid (\r | |
4466 | IN UINT64 Value\r | |
4467 | );\r | |
4468 | \r | |
4469 | \r | |
4470 | /**\r | |
4471 | Writes the current value of 64-bit Task Priority Register (TPR).\r | |
4472 | No parameter checking is performed on Value. All bits of Value corresponding to\r | |
4473 | reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r | |
4474 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4475 | fault handlers to catch the faults.\r | |
4476 | This function is only available on IPF.\r | |
4477 | \r | |
ee6c452c | 4478 | @param Value The 64-bit value to write to TPR.\r |
ac644614 | 4479 | \r |
4480 | @return The 64-bit value written to the TPR.\r | |
4481 | \r | |
4482 | **/\r | |
4483 | UINT64\r | |
4484 | EFIAPI\r | |
4485 | AsmWriteTpr (\r | |
4486 | IN UINT64 Value\r | |
4487 | );\r | |
4488 | \r | |
4489 | \r | |
4490 | /**\r | |
4491 | Performs a write operation on End OF External Interrupt Register (EOI).\r | |
4492 | Writes a value of 0 to the EOI Register. This function is only available on IPF.\r | |
4493 | \r | |
4494 | **/\r | |
4495 | VOID\r | |
4496 | EFIAPI\r | |
4497 | AsmWriteEoi (\r | |
4498 | VOID\r | |
4499 | );\r | |
4500 | \r | |
4501 | \r | |
4502 | /**\r | |
4503 | Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r | |
4504 | No parameter checking is performed on Value. All bits of Value corresponding\r | |
4505 | to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r | |
4506 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4507 | fault handlers to catch the faults.\r | |
4508 | This function is only available on IPF.\r | |
4509 | \r | |
ee6c452c | 4510 | @param Value The 64-bit value to write to PMV.\r |
ac644614 | 4511 | \r |
4512 | @return The 64-bit value written to the PMV.\r | |
4513 | \r | |
4514 | **/\r | |
4515 | UINT64\r | |
4516 | EFIAPI\r | |
4517 | AsmWritePmv (\r | |
4518 | IN UINT64 Value\r | |
4519 | );\r | |
4520 | \r | |
4521 | \r | |
4522 | /**\r | |
4523 | Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r | |
4524 | No parameter checking is performed on Value. All bits of Value corresponding\r | |
4525 | to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r | |
4526 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4527 | fault handlers to catch the faults.\r | |
4528 | This function is only available on IPF.\r | |
4529 | \r | |
ee6c452c | 4530 | @param Value The 64-bit value to write to CMCV.\r |
ac644614 | 4531 | \r |
4532 | @return The 64-bit value written to the CMCV.\r | |
4533 | \r | |
4534 | **/\r | |
4535 | UINT64\r | |
4536 | EFIAPI\r | |
4537 | AsmWriteCmcv (\r | |
4538 | IN UINT64 Value\r | |
4539 | );\r | |
4540 | \r | |
4541 | \r | |
4542 | /**\r | |
4543 | Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r | |
4544 | No parameter checking is performed on Value. All bits of Value corresponding\r | |
4545 | to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r | |
4546 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4547 | fault handlers to catch the faults.\r | |
4548 | This function is only available on IPF.\r | |
4549 | \r | |
ee6c452c | 4550 | @param Value The 64-bit value to write to LRR0.\r |
ac644614 | 4551 | \r |
4552 | @return The 64-bit value written to the LRR0.\r | |
4553 | \r | |
4554 | **/\r | |
4555 | UINT64\r | |
4556 | EFIAPI\r | |
4557 | AsmWriteLrr0 (\r | |
4558 | IN UINT64 Value\r | |
4559 | );\r | |
4560 | \r | |
4561 | \r | |
4562 | /**\r | |
4563 | Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r | |
4564 | No parameter checking is performed on Value. All bits of Value corresponding\r | |
4565 | to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r | |
4566 | The caller must either guarantee that Value is valid, or the caller must\r | |
4567 | set up fault handlers to catch the faults.\r | |
4568 | This function is only available on IPF.\r | |
4569 | \r | |
ee6c452c | 4570 | @param Value The 64-bit value to write to LRR1.\r |
ac644614 | 4571 | \r |
4572 | @return The 64-bit value written to the LRR1.\r | |
4573 | \r | |
4574 | **/\r | |
4575 | UINT64\r | |
4576 | EFIAPI\r | |
4577 | AsmWriteLrr1 (\r | |
4578 | IN UINT64 Value\r | |
4579 | );\r | |
4580 | \r | |
4581 | \r | |
4582 | /**\r | |
4583 | Reads the current value of Instruction Breakpoint Register (IBR).\r | |
4584 | \r | |
4585 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4586 | registers contain breakpoint addresses, and the odd numbered registers contain\r | |
4587 | breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r | |
4588 | on all processor models. Implemented registers are contiguous starting with\r | |
4589 | register 0. No parameter checking is performed on Index, and if the Index value\r | |
4590 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4591 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4592 | set up fault handlers to catch the faults.\r | |
4593 | This function is only available on IPF.\r | |
4594 | \r | |
ee6c452c | 4595 | @param Index The 8-bit Instruction Breakpoint Register index to read.\r |
ac644614 | 4596 | \r |
4597 | @return The current value of Instruction Breakpoint Register specified by Index.\r | |
4598 | \r | |
4599 | **/\r | |
4600 | UINT64\r | |
4601 | EFIAPI\r | |
4602 | AsmReadIbr (\r | |
4603 | IN UINT8 Index\r | |
4604 | );\r | |
4605 | \r | |
4606 | \r | |
4607 | /**\r | |
4608 | Reads the current value of Data Breakpoint Register (DBR).\r | |
4609 | \r | |
4610 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4611 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
4612 | mask conditions. At least 4 data registers pairs are implemented on all processor\r | |
4613 | models. Implemented registers are contiguous starting with register 0.\r | |
4614 | No parameter checking is performed on Index. If the Index value is beyond\r | |
4615 | the implemented DBR register range, a Reserved Register/Field fault may occur.\r | |
4616 | The caller must either guarantee that Index is valid, or the caller must set up\r | |
4617 | fault handlers to catch the faults.\r | |
4618 | This function is only available on IPF.\r | |
4619 | \r | |
ee6c452c | 4620 | @param Index The 8-bit Data Breakpoint Register index to read.\r |
ac644614 | 4621 | \r |
4622 | @return The current value of Data Breakpoint Register specified by Index.\r | |
4623 | \r | |
4624 | **/\r | |
4625 | UINT64\r | |
4626 | EFIAPI\r | |
4627 | AsmReadDbr (\r | |
4628 | IN UINT8 Index\r | |
4629 | );\r | |
4630 | \r | |
4631 | \r | |
4632 | /**\r | |
4633 | Reads the current value of Performance Monitor Configuration Register (PMC).\r | |
4634 | \r | |
4635 | All processor implementations provide at least 4 performance counters\r | |
4636 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r | |
4637 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r | |
4638 | additional implementation-dependent PMC and PMD to increase the number of\r | |
4639 | 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4640 | register set is implementation dependent. No parameter checking is performed\r | |
4641 | on Index. If the Index value is beyond the implemented PMC register range,\r | |
4642 | zero value will be returned.\r | |
4643 | This function is only available on IPF.\r | |
4644 | \r | |
ee6c452c | 4645 | @param Index The 8-bit Performance Monitor Configuration Register index to read.\r |
ac644614 | 4646 | \r |
4647 | @return The current value of Performance Monitor Configuration Register\r | |
4648 | specified by Index.\r | |
4649 | \r | |
4650 | **/\r | |
4651 | UINT64\r | |
4652 | EFIAPI\r | |
4653 | AsmReadPmc (\r | |
4654 | IN UINT8 Index\r | |
4655 | );\r | |
4656 | \r | |
4657 | \r | |
4658 | /**\r | |
4659 | Reads the current value of Performance Monitor Data Register (PMD).\r | |
4660 | \r | |
4661 | All processor implementations provide at least 4 performance counters\r | |
4662 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r | |
4663 | overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r | |
4664 | provide additional implementation-dependent PMC and PMD to increase the number\r | |
4665 | of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4666 | register set is implementation dependent. No parameter checking is performed\r | |
4667 | on Index. If the Index value is beyond the implemented PMD register range,\r | |
4668 | zero value will be returned.\r | |
4669 | This function is only available on IPF.\r | |
4670 | \r | |
ee6c452c | 4671 | @param Index The 8-bit Performance Monitor Data Register index to read.\r |
ac644614 | 4672 | \r |
4673 | @return The current value of Performance Monitor Data Register specified by Index.\r | |
4674 | \r | |
4675 | **/\r | |
4676 | UINT64\r | |
4677 | EFIAPI\r | |
4678 | AsmReadPmd (\r | |
4679 | IN UINT8 Index\r | |
4680 | );\r | |
4681 | \r | |
4682 | \r | |
4683 | /**\r | |
4684 | Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r | |
4685 | \r | |
4686 | Writes current value of Instruction Breakpoint Register specified by Index.\r | |
4687 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4688 | registers contain breakpoint addresses, and odd numbered registers contain\r | |
4689 | breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r | |
4690 | on all processor models. Implemented registers are contiguous starting with\r | |
4691 | register 0. No parameter checking is performed on Index. If the Index value\r | |
4692 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4693 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4694 | set up fault handlers to catch the faults.\r | |
4695 | This function is only available on IPF.\r | |
4696 | \r | |
ee6c452c | 4697 | @param Index The 8-bit Instruction Breakpoint Register index to write.\r |
4698 | @param Value The 64-bit value to write to IBR.\r | |
ac644614 | 4699 | \r |
4700 | @return The 64-bit value written to the IBR.\r | |
4701 | \r | |
4702 | **/\r | |
4703 | UINT64\r | |
4704 | EFIAPI\r | |
4705 | AsmWriteIbr (\r | |
4706 | IN UINT8 Index,\r | |
4707 | IN UINT64 Value\r | |
4708 | );\r | |
4709 | \r | |
4710 | \r | |
4711 | /**\r | |
4712 | Writes the current value of 64-bit Data Breakpoint Register (DBR).\r | |
4713 | \r | |
4714 | Writes current value of Data Breakpoint Register specified by Index.\r | |
4715 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4716 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
4717 | mask conditions. At least 4 data registers pairs are implemented on all processor\r | |
4718 | models. Implemented registers are contiguous starting with register 0. No parameter\r | |
4719 | checking is performed on Index. If the Index value is beyond the implemented\r | |
4720 | DBR register range, a Reserved Register/Field fault may occur. The caller must\r | |
4721 | either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
4722 | catch the faults.\r | |
4723 | This function is only available on IPF.\r | |
4724 | \r | |
ee6c452c | 4725 | @param Index The 8-bit Data Breakpoint Register index to write.\r |
4726 | @param Value The 64-bit value to write to DBR.\r | |
ac644614 | 4727 | \r |
4728 | @return The 64-bit value written to the DBR.\r | |
4729 | \r | |
4730 | **/\r | |
4731 | UINT64\r | |
4732 | EFIAPI\r | |
4733 | AsmWriteDbr (\r | |
4734 | IN UINT8 Index,\r | |
4735 | IN UINT64 Value\r | |
4736 | );\r | |
4737 | \r | |
4738 | \r | |
4739 | /**\r | |
4740 | Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r | |
4741 | \r | |
4742 | Writes current value of Performance Monitor Configuration Register specified by Index.\r | |
4743 | All processor implementations provide at least 4 performance counters\r | |
4744 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status\r | |
4745 | registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r | |
4746 | implementation-dependent PMC and PMD to increase the number of 'generic' performance\r | |
4747 | counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r | |
4748 | dependent. No parameter checking is performed on Index. If the Index value is\r | |
4749 | beyond the implemented PMC register range, the write is ignored.\r | |
4750 | This function is only available on IPF.\r | |
4751 | \r | |
ee6c452c | 4752 | @param Index The 8-bit Performance Monitor Configuration Register index to write.\r |
4753 | @param Value The 64-bit value to write to PMC.\r | |
ac644614 | 4754 | \r |
4755 | @return The 64-bit value written to the PMC.\r | |
4756 | \r | |
4757 | **/\r | |
4758 | UINT64\r | |
4759 | EFIAPI\r | |
4760 | AsmWritePmc (\r | |
4761 | IN UINT8 Index,\r | |
4762 | IN UINT64 Value\r | |
4763 | );\r | |
4764 | \r | |
4765 | \r | |
4766 | /**\r | |
4767 | Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r | |
4768 | \r | |
4769 | Writes current value of Performance Monitor Data Register specified by Index.\r | |
4770 | All processor implementations provide at least 4 performance counters\r | |
4771 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r | |
4772 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r | |
4773 | additional implementation-dependent PMC and PMD to increase the number of 'generic'\r | |
4774 | performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r | |
4775 | is implementation dependent. No parameter checking is performed on Index. If the\r | |
4776 | Index value is beyond the implemented PMD register range, the write is ignored.\r | |
4777 | This function is only available on IPF.\r | |
4778 | \r | |
ee6c452c | 4779 | @param Index The 8-bit Performance Monitor Data Register index to write.\r |
4780 | @param Value The 64-bit value to write to PMD.\r | |
ac644614 | 4781 | \r |
4782 | @return The 64-bit value written to the PMD.\r | |
4783 | \r | |
4784 | **/\r | |
4785 | UINT64\r | |
4786 | EFIAPI\r | |
4787 | AsmWritePmd (\r | |
4788 | IN UINT8 Index,\r | |
4789 | IN UINT64 Value\r | |
4790 | );\r | |
4791 | \r | |
4792 | \r | |
4793 | /**\r | |
4794 | Reads the current value of 64-bit Global Pointer (GP).\r | |
4795 | \r | |
4796 | Reads and returns the current value of GP.\r | |
4797 | This function is only available on IPF.\r | |
4798 | \r | |
4799 | @return The current value of GP.\r | |
4800 | \r | |
4801 | **/\r | |
4802 | UINT64\r | |
4803 | EFIAPI\r | |
4804 | AsmReadGp (\r | |
4805 | VOID\r | |
4806 | );\r | |
4807 | \r | |
4808 | \r | |
4809 | /**\r | |
4810 | Write the current value of 64-bit Global Pointer (GP).\r | |
4811 | \r | |
4812 | Writes the current value of GP. The 64-bit value written to the GP is returned.\r | |
4813 | No parameter checking is performed on Value.\r | |
4814 | This function is only available on IPF.\r | |
4815 | \r | |
4816 | @param Value The 64-bit value to write to GP.\r | |
4817 | \r | |
4818 | @return The 64-bit value written to the GP.\r | |
4819 | \r | |
4820 | **/\r | |
4821 | UINT64\r | |
4822 | EFIAPI\r | |
4823 | AsmWriteGp (\r | |
4824 | IN UINT64 Value\r | |
4825 | );\r | |
4826 | \r | |
4827 | \r | |
4828 | /**\r | |
4829 | Reads the current value of 64-bit Stack Pointer (SP).\r | |
4830 | \r | |
4831 | Reads and returns the current value of SP.\r | |
4832 | This function is only available on IPF.\r | |
4833 | \r | |
4834 | @return The current value of SP.\r | |
4835 | \r | |
4836 | **/\r | |
4837 | UINT64\r | |
4838 | EFIAPI\r | |
4839 | AsmReadSp (\r | |
4840 | VOID\r | |
4841 | );\r | |
4842 | \r | |
4843 | \r | |
4844 | /**\r | |
4845 | Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r | |
4846 | \r | |
4847 | Determines the current execution mode of the CPU.\r | |
4848 | If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r | |
4849 | If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r | |
4850 | If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r | |
4851 | and -1 is returned.\r | |
4852 | This function is only available on IPF.\r | |
4853 | \r | |
17f695ed | 4854 | @retval 1 The CPU is in virtual mode.\r |
4855 | @retval 0 The CPU is in physical mode.\r | |
4856 | @retval -1 The CPU is in mixed mode.\r | |
ac644614 | 4857 | \r |
4858 | **/\r | |
4859 | INT64\r | |
4860 | EFIAPI\r | |
4861 | AsmCpuVirtual (\r | |
4862 | VOID\r | |
4863 | );\r | |
4864 | \r | |
4865 | \r | |
4866 | /**\r | |
4867 | Makes a PAL procedure call.\r | |
4868 | \r | |
4869 | This is a wrapper function to make a PAL procedure call. Based on the Index\r | |
4870 | value this API will make static or stacked PAL call. The following table\r | |
4871 | describes the usage of PAL Procedure Index Assignment. Architected procedures\r | |
4872 | may be designated as required or optional. If a PAL procedure is specified\r | |
4873 | as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r | |
4874 | Status field of the PAL_CALL_RETURN structure.\r | |
4875 | This indicates that the procedure is not present in this PAL implementation.\r | |
4876 | It is the caller's responsibility to check for this return code after calling\r | |
4877 | any optional PAL procedure.\r | |
4878 | No parameter checking is performed on the 5 input parameters, but there are\r | |
4879 | some common rules that the caller should follow when making a PAL call. Any\r | |
4880 | address passed to PAL as buffers for return parameters must be 8-byte aligned.\r | |
4881 | Unaligned addresses may cause undefined results. For those parameters defined\r | |
4882 | as reserved or some fields defined as reserved must be zero filled or the invalid\r | |
4883 | argument return value may be returned or undefined result may occur during the\r | |
4884 | execution of the procedure. If the PalEntryPoint does not point to a valid\r | |
4885 | PAL entry point then the system behavior is undefined. This function is only\r | |
4886 | available on IPF.\r | |
4887 | \r | |
ee6c452c | 4888 | @param PalEntryPoint The PAL procedure calls entry point.\r |
4889 | @param Index The PAL procedure Index number.\r | |
4890 | @param Arg2 The 2nd parameter for PAL procedure calls.\r | |
4891 | @param Arg3 The 3rd parameter for PAL procedure calls.\r | |
4892 | @param Arg4 The 4th parameter for PAL procedure calls.\r | |
ac644614 | 4893 | \r |
4894 | @return structure returned from the PAL Call procedure, including the status and return value.\r | |
4895 | \r | |
4896 | **/\r | |
4897 | PAL_CALL_RETURN\r | |
4898 | EFIAPI\r | |
4899 | AsmPalCall (\r | |
4900 | IN UINT64 PalEntryPoint,\r | |
4901 | IN UINT64 Index,\r | |
4902 | IN UINT64 Arg2,\r | |
4903 | IN UINT64 Arg3,\r | |
4904 | IN UINT64 Arg4\r | |
4905 | );\r | |
4906 | \r | |
4907 | \r | |
4908 | /**\r | |
4909 | Transfers control to a function starting with a new stack.\r | |
4910 | \r | |
4911 | Transfers control to the function specified by EntryPoint using the new stack\r | |
4912 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
4913 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
4914 | EntryPoint must never return.\r | |
4915 | \r | |
4916 | If EntryPoint is NULL, then ASSERT().\r | |
4917 | If NewStack is NULL, then ASSERT().\r | |
4918 | \r | |
4919 | @param EntryPoint A pointer to function to call with the new stack.\r | |
4920 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
4921 | function.\r | |
4922 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
4923 | function.\r | |
4924 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
4925 | function.\r | |
4926 | @param NewBsp A pointer to the new memory location for RSE backing\r | |
4927 | store.\r | |
4928 | \r | |
4929 | **/\r | |
4930 | VOID\r | |
4931 | EFIAPI\r | |
4932 | AsmSwitchStackAndBackingStore (\r | |
4933 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
4934 | IN VOID *Context1, OPTIONAL\r | |
4935 | IN VOID *Context2, OPTIONAL\r | |
4936 | IN VOID *NewStack,\r | |
4937 | IN VOID *NewBsp\r | |
4938 | );\r | |
4939 | \r | |
ac644614 | 4940 | /**\r |
1106ffe1 | 4941 | @todo This call should be removed after the PalCall\r |
4942 | Instance issue has been fixed.\r | |
4943 | \r | |
ac644614 | 4944 | Performs a PAL call using static calling convention.\r |
4945 | \r | |
4946 | An internal function to perform a PAL call using static calling convention.\r | |
4947 | \r | |
4948 | @param PalEntryPoint The entry point address of PAL. The address in ar.kr5\r | |
4949 | would be used if this parameter were NULL on input.\r | |
4950 | @param Arg1 The first argument of a PAL call.\r | |
42eedea9 | 4951 | @param Arg2 The second argument of a PAL call.\r |
4952 | @param Arg3 The third argument of a PAL call.\r | |
4953 | @param Arg4 The fourth argument of a PAL call.\r | |
ac644614 | 4954 | \r |
4955 | @return The values returned in r8, r9, r10 and r11.\r | |
4956 | \r | |
4957 | **/\r | |
4958 | PAL_CALL_RETURN\r | |
4959 | PalCallStatic (\r | |
4960 | IN CONST VOID *PalEntryPoint,\r | |
4961 | IN UINT64 Arg1,\r | |
4962 | IN UINT64 Arg2,\r | |
4963 | IN UINT64 Arg3,\r | |
4964 | IN UINT64 Arg4\r | |
4965 | );\r | |
4966 | \r | |
4967 | \r | |
17f695ed | 4968 | \r |
ac644614 | 4969 | #elif defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r |
1106ffe1 | 4970 | ///\r |
4971 | /// IA32 and X64 Specific Functions\r | |
4972 | /// Byte packed structure for 16-bit Real Mode EFLAGS\r | |
4973 | ///\r | |
ac644614 | 4974 | typedef union {\r |
4975 | struct {\r | |
1106ffe1 | 4976 | UINT32 CF:1; /// Carry Flag\r |
4977 | UINT32 Reserved_0:1; /// Reserved\r | |
4978 | UINT32 PF:1; /// Parity Flag\r | |
4979 | UINT32 Reserved_1:1; /// Reserved\r | |
4980 | UINT32 AF:1; /// Auxiliary Carry Flag\r | |
4981 | UINT32 Reserved_2:1; /// Reserved\r | |
4982 | UINT32 ZF:1; /// Zero Flag\r | |
4983 | UINT32 SF:1; /// Sign Flag\r | |
4984 | UINT32 TF:1; /// Trap Flag\r | |
4985 | UINT32 IF:1; /// Interrupt Enable Flag\r | |
4986 | UINT32 DF:1; /// Direction Flag\r | |
4987 | UINT32 OF:1; /// Overflow Flag\r | |
4988 | UINT32 IOPL:2; /// I/O Privilege Level\r | |
4989 | UINT32 NT:1; /// Nested Task\r | |
4990 | UINT32 Reserved_3:1; /// Reserved\r | |
ac644614 | 4991 | } Bits;\r |
4992 | UINT16 Uint16;\r | |
4993 | } IA32_FLAGS16;\r | |
4994 | \r | |
1106ffe1 | 4995 | ///\r |
4996 | /// Byte packed structure for EFLAGS/RFLAGS\r | |
4997 | /// 32-bits on IA-32\r | |
4998 | /// 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
4999 | ///\r | |
ac644614 | 5000 | typedef union {\r |
5001 | struct {\r | |
1106ffe1 | 5002 | UINT32 CF:1; /// Carry Flag\r |
5003 | UINT32 Reserved_0:1; /// Reserved\r | |
5004 | UINT32 PF:1; /// Parity Flag\r | |
5005 | UINT32 Reserved_1:1; /// Reserved\r | |
5006 | UINT32 AF:1; /// Auxiliary Carry Flag\r | |
5007 | UINT32 Reserved_2:1; /// Reserved\r | |
5008 | UINT32 ZF:1; /// Zero Flag\r | |
5009 | UINT32 SF:1; /// Sign Flag\r | |
5010 | UINT32 TF:1; /// Trap Flag\r | |
5011 | UINT32 IF:1; /// Interrupt Enable Flag\r | |
5012 | UINT32 DF:1; /// Direction Flag\r | |
5013 | UINT32 OF:1; /// Overflow Flag\r | |
5014 | UINT32 IOPL:2; /// I/O Privilege Level\r | |
5015 | UINT32 NT:1; /// Nested Task\r | |
5016 | UINT32 Reserved_3:1; /// Reserved\r | |
5017 | UINT32 RF:1; /// Resume Flag\r | |
5018 | UINT32 VM:1; /// Virtual 8086 Mode\r | |
5019 | UINT32 AC:1; /// Alignment Check\r | |
5020 | UINT32 VIF:1; /// Virtual Interrupt Flag\r | |
5021 | UINT32 VIP:1; /// Virtual Interrupt Pending\r | |
5022 | UINT32 ID:1; /// ID Flag\r | |
5023 | UINT32 Reserved_4:10; /// Reserved\r | |
ac644614 | 5024 | } Bits;\r |
5025 | UINTN UintN;\r | |
5026 | } IA32_EFLAGS32;\r | |
5027 | \r | |
1106ffe1 | 5028 | ///\r |
5029 | /// Byte packed structure for Control Register 0 (CR0)\r | |
5030 | /// 32-bits on IA-32\r | |
5031 | /// 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
5032 | ///\r | |
ac644614 | 5033 | typedef union {\r |
5034 | struct {\r | |
1106ffe1 | 5035 | UINT32 PE:1; /// Protection Enable\r |
5036 | UINT32 MP:1; /// Monitor Coprocessor\r | |
5037 | UINT32 EM:1; /// Emulation\r | |
5038 | UINT32 TS:1; /// Task Switched\r | |
5039 | UINT32 ET:1; /// Extension Type\r | |
5040 | UINT32 NE:1; /// Numeric Error\r | |
5041 | UINT32 Reserved_0:10; /// Reserved\r | |
5042 | UINT32 WP:1; /// Write Protect\r | |
5043 | UINT32 Reserved_1:1; /// Reserved\r | |
5044 | UINT32 AM:1; /// Alignment Mask\r | |
5045 | UINT32 Reserved_2:10; /// Reserved\r | |
5046 | UINT32 NW:1; /// Mot Write-through\r | |
5047 | UINT32 CD:1; /// Cache Disable\r | |
5048 | UINT32 PG:1; /// Paging\r | |
ac644614 | 5049 | } Bits;\r |
5050 | UINTN UintN;\r | |
5051 | } IA32_CR0;\r | |
5052 | \r | |
1106ffe1 | 5053 | ///\r |
5054 | /// Byte packed structure for Control Register 4 (CR4)\r | |
5055 | /// 32-bits on IA-32\r | |
5056 | /// 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
5057 | ///\r | |
ac644614 | 5058 | typedef union {\r |
5059 | struct {\r | |
1106ffe1 | 5060 | UINT32 VME:1; /// Virtual-8086 Mode Extensions\r |
5061 | UINT32 PVI:1; /// Protected-Mode Virtual Interrupts\r | |
5062 | UINT32 TSD:1; /// Time Stamp Disable\r | |
5063 | UINT32 DE:1; /// Debugging Extensions\r | |
5064 | UINT32 PSE:1; /// Page Size Extensions\r | |
5065 | UINT32 PAE:1; /// Physical Address Extension\r | |
5066 | UINT32 MCE:1; /// Machine Check Enable\r | |
5067 | UINT32 PGE:1; /// Page Global Enable\r | |
5068 | UINT32 PCE:1; /// Performance Monitoring Counter\r | |
5069 | /// Enable\r | |
5070 | UINT32 OSFXSR:1; /// Operating System Support for\r | |
5071 | /// FXSAVE and FXRSTOR instructions\r | |
5072 | UINT32 OSXMMEXCPT:1; /// Operating System Support for\r | |
5073 | /// Unmasked SIMD Floating Point\r | |
5074 | /// Exceptions\r | |
5075 | UINT32 Reserved_0:2; /// Reserved\r | |
5076 | UINT32 VMXE:1; /// VMX Enable\r | |
5077 | UINT32 Reserved_1:18; /// Reseved\r | |
ac644614 | 5078 | } Bits;\r |
5079 | UINTN UintN;\r | |
5080 | } IA32_CR4;\r | |
5081 | \r | |
1106ffe1 | 5082 | ///\r |
5083 | /// Byte packed structure for an IDTR, GDTR, LDTR descriptor\r | |
5084 | /// @todo How to make this structure byte-packed in a compiler independent way?\r | |
5085 | ///\r | |
ac644614 | 5086 | #pragma pack (1)\r |
5087 | typedef struct {\r | |
5088 | UINT16 Limit;\r | |
5089 | UINTN Base;\r | |
5090 | } IA32_DESCRIPTOR;\r | |
5091 | #pragma pack ()\r | |
5092 | \r | |
5093 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r | |
5094 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r | |
5095 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r | |
5096 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r | |
5097 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r | |
5098 | \r | |
1106ffe1 | 5099 | ///\r |
5100 | /// Byte packed structure for an Interrupt Gate Descriptor\r | |
5101 | ///\r | |
dc317713 | 5102 | #if defined (MDE_CPU_IA32)\r |
5103 | \r | |
5104 | typedef union {\r | |
5105 | struct {\r | |
5106 | UINT32 OffsetLow:16; // Offset bits 15..0\r | |
5107 | UINT32 Selector:16; // Selector\r | |
5108 | UINT32 Reserved_0:8; // Reserved\r | |
5109 | UINT32 GateType:8; // Gate Type. See #defines above\r | |
5110 | UINT32 OffsetHigh:16; // Offset bits 31..16\r | |
5111 | } Bits;\r | |
5112 | UINT64 Uint64;\r | |
5113 | } IA32_IDT_GATE_DESCRIPTOR;\r | |
5114 | \r | |
5115 | #endif\r | |
5116 | \r | |
5117 | #if defined (MDE_CPU_X64)\r | |
5118 | \r | |
ac644614 | 5119 | typedef union {\r |
5120 | struct {\r | |
dc317713 | 5121 | UINT32 OffsetLow:16; // Offset bits 15..0\r |
5122 | UINT32 Selector:16; // Selector\r | |
5123 | UINT32 Reserved_0:8; // Reserved\r | |
5124 | UINT32 GateType:8; // Gate Type. See #defines above\r | |
5125 | UINT32 OffsetHigh:16; // Offset bits 31..16\r | |
5126 | UINT32 OffsetUpper:32; // Offset bits 63..32\r | |
5127 | UINT32 Reserved_1:32; // Reserved\r | |
ac644614 | 5128 | } Bits;\r |
5129 | UINT64 Uint64;\r | |
dc317713 | 5130 | UINT64 Uint64_1;\r |
ac644614 | 5131 | } IA32_IDT_GATE_DESCRIPTOR;\r |
5132 | \r | |
dc317713 | 5133 | #endif\r |
5134 | \r | |
1106ffe1 | 5135 | ///\r |
5136 | /// Byte packed structure for an FP/SSE/SSE2 context\r | |
5137 | ///\r | |
ac644614 | 5138 | typedef struct {\r |
5139 | UINT8 Buffer[512];\r | |
5140 | } IA32_FX_BUFFER;\r | |
5141 | \r | |
1106ffe1 | 5142 | ///\r |
5143 | /// Structures for the 16-bit real mode thunks\r | |
5144 | ///\r | |
ac644614 | 5145 | typedef struct {\r |
5146 | UINT32 Reserved1;\r | |
5147 | UINT32 Reserved2;\r | |
5148 | UINT32 Reserved3;\r | |
5149 | UINT32 Reserved4;\r | |
5150 | UINT8 BL;\r | |
5151 | UINT8 BH;\r | |
5152 | UINT16 Reserved5;\r | |
5153 | UINT8 DL;\r | |
5154 | UINT8 DH;\r | |
5155 | UINT16 Reserved6;\r | |
5156 | UINT8 CL;\r | |
5157 | UINT8 CH;\r | |
5158 | UINT16 Reserved7;\r | |
5159 | UINT8 AL;\r | |
5160 | UINT8 AH;\r | |
5161 | UINT16 Reserved8;\r | |
5162 | } IA32_BYTE_REGS;\r | |
5163 | \r | |
5164 | typedef struct {\r | |
5165 | UINT16 DI;\r | |
5166 | UINT16 Reserved1;\r | |
5167 | UINT16 SI;\r | |
5168 | UINT16 Reserved2;\r | |
5169 | UINT16 BP;\r | |
5170 | UINT16 Reserved3;\r | |
5171 | UINT16 SP;\r | |
5172 | UINT16 Reserved4;\r | |
5173 | UINT16 BX;\r | |
5174 | UINT16 Reserved5;\r | |
5175 | UINT16 DX;\r | |
5176 | UINT16 Reserved6;\r | |
5177 | UINT16 CX;\r | |
5178 | UINT16 Reserved7;\r | |
5179 | UINT16 AX;\r | |
5180 | UINT16 Reserved8;\r | |
5181 | } IA32_WORD_REGS;\r | |
5182 | \r | |
5183 | typedef struct {\r | |
5184 | UINT32 EDI;\r | |
5185 | UINT32 ESI;\r | |
5186 | UINT32 EBP;\r | |
5187 | UINT32 ESP;\r | |
5188 | UINT32 EBX;\r | |
5189 | UINT32 EDX;\r | |
5190 | UINT32 ECX;\r | |
5191 | UINT32 EAX;\r | |
5192 | UINT16 DS;\r | |
5193 | UINT16 ES;\r | |
5194 | UINT16 FS;\r | |
5195 | UINT16 GS;\r | |
5196 | IA32_EFLAGS32 EFLAGS;\r | |
5197 | UINT32 Eip;\r | |
5198 | UINT16 CS;\r | |
5199 | UINT16 SS;\r | |
5200 | } IA32_DWORD_REGS;\r | |
5201 | \r | |
5202 | typedef union {\r | |
5203 | IA32_DWORD_REGS E;\r | |
5204 | IA32_WORD_REGS X;\r | |
5205 | IA32_BYTE_REGS H;\r | |
5206 | } IA32_REGISTER_SET;\r | |
5207 | \r | |
1106ffe1 | 5208 | ///\r |
5209 | /// Byte packed structure for an 16-bit real mode thunks\r | |
5210 | ///\r | |
ac644614 | 5211 | typedef struct {\r |
5212 | IA32_REGISTER_SET *RealModeState;\r | |
5213 | VOID *RealModeBuffer;\r | |
5214 | UINT32 RealModeBufferSize;\r | |
5215 | UINT32 ThunkAttributes;\r | |
5216 | } THUNK_CONTEXT;\r | |
5217 | \r | |
5218 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r | |
5219 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r | |
5220 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r | |
5221 | \r | |
5222 | /**\r | |
5223 | Retrieves CPUID information.\r | |
5224 | \r | |
5225 | Executes the CPUID instruction with EAX set to the value specified by Index.\r | |
5226 | This function always returns Index.\r | |
5227 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5228 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5229 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5230 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
5231 | This function is only available on IA-32 and X64.\r | |
5232 | \r | |
5233 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r | |
5234 | instruction.\r | |
5235 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r | |
5236 | instruction. This is an optional parameter that may be NULL.\r | |
5237 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r | |
5238 | instruction. This is an optional parameter that may be NULL.\r | |
5239 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r | |
5240 | instruction. This is an optional parameter that may be NULL.\r | |
5241 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r | |
5242 | instruction. This is an optional parameter that may be NULL.\r | |
5243 | \r | |
5244 | @return Index\r | |
5245 | \r | |
5246 | **/\r | |
5247 | UINT32\r | |
5248 | EFIAPI\r | |
5249 | AsmCpuid (\r | |
5250 | IN UINT32 Index,\r | |
5251 | OUT UINT32 *Eax, OPTIONAL\r | |
5252 | OUT UINT32 *Ebx, OPTIONAL\r | |
5253 | OUT UINT32 *Ecx, OPTIONAL\r | |
5254 | OUT UINT32 *Edx OPTIONAL\r | |
5255 | );\r | |
5256 | \r | |
5257 | \r | |
5258 | /**\r | |
5259 | Retrieves CPUID information using an extended leaf identifier.\r | |
5260 | \r | |
5261 | Executes the CPUID instruction with EAX set to the value specified by Index\r | |
5262 | and ECX set to the value specified by SubIndex. This function always returns\r | |
5263 | Index. This function is only available on IA-32 and x64.\r | |
5264 | \r | |
5265 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5266 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5267 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5268 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
5269 | \r | |
5270 | @param Index The 32-bit value to load into EAX prior to invoking the\r | |
5271 | CPUID instruction.\r | |
5272 | @param SubIndex The 32-bit value to load into ECX prior to invoking the\r | |
5273 | CPUID instruction.\r | |
5274 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r | |
5275 | instruction. This is an optional parameter that may be\r | |
5276 | NULL.\r | |
5277 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r | |
5278 | instruction. This is an optional parameter that may be\r | |
5279 | NULL.\r | |
5280 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r | |
5281 | instruction. This is an optional parameter that may be\r | |
5282 | NULL.\r | |
5283 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r | |
5284 | instruction. This is an optional parameter that may be\r | |
5285 | NULL.\r | |
5286 | \r | |
5287 | @return Index\r | |
5288 | \r | |
5289 | **/\r | |
5290 | UINT32\r | |
5291 | EFIAPI\r | |
5292 | AsmCpuidEx (\r | |
5293 | IN UINT32 Index,\r | |
5294 | IN UINT32 SubIndex,\r | |
5295 | OUT UINT32 *Eax, OPTIONAL\r | |
5296 | OUT UINT32 *Ebx, OPTIONAL\r | |
5297 | OUT UINT32 *Ecx, OPTIONAL\r | |
5298 | OUT UINT32 *Edx OPTIONAL\r | |
5299 | );\r | |
5300 | \r | |
5301 | \r | |
5302 | /**\r | |
5303 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
5304 | \r | |
5305 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
5306 | No parameter checking is performed on Index, and some Index values may cause\r | |
5307 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
5308 | caller must set up exception handlers to catch the exceptions. This function\r | |
5309 | is only available on IA-32 and X64.\r | |
5310 | \r | |
5311 | @param Index The 32-bit MSR index to read.\r | |
5312 | \r | |
5313 | @return The lower 32 bits of the MSR identified by Index.\r | |
5314 | \r | |
5315 | **/\r | |
5316 | UINT32\r | |
5317 | EFIAPI\r | |
5318 | AsmReadMsr32 (\r | |
5319 | IN UINT32 Index\r | |
5320 | );\r | |
5321 | \r | |
5322 | \r | |
5323 | /**\r | |
17f695ed | 5324 | Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r |
5325 | The upper 32-bits of the MSR are set to zero.\r | |
ac644614 | 5326 | \r |
5327 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
5328 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
5329 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
5330 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
5331 | that Index and Value are valid, or the caller must establish proper exception\r | |
5332 | handlers. This function is only available on IA-32 and X64.\r | |
5333 | \r | |
5334 | @param Index The 32-bit MSR index to write.\r | |
5335 | @param Value The 32-bit value to write to the MSR.\r | |
5336 | \r | |
5337 | @return Value\r | |
5338 | \r | |
5339 | **/\r | |
5340 | UINT32\r | |
5341 | EFIAPI\r | |
5342 | AsmWriteMsr32 (\r | |
5343 | IN UINT32 Index,\r | |
5344 | IN UINT32 Value\r | |
5345 | );\r | |
5346 | \r | |
5347 | \r | |
5348 | /**\r | |
5349 | Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and\r | |
5350 | writes the result back to the 64-bit MSR.\r | |
5351 | \r | |
5352 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
5353 | between the lower 32-bits of the read result and the value specified by\r | |
5354 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
5355 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
5356 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
5357 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
5358 | must establish proper exception handlers. This function is only available on\r | |
5359 | IA-32 and X64.\r | |
5360 | \r | |
5361 | @param Index The 32-bit MSR index to write.\r | |
5362 | @param OrData The value to OR with the read value from the MSR.\r | |
5363 | \r | |
5364 | @return The lower 32-bit value written to the MSR.\r | |
5365 | \r | |
5366 | **/\r | |
5367 | UINT32\r | |
5368 | EFIAPI\r | |
5369 | AsmMsrOr32 (\r | |
5370 | IN UINT32 Index,\r | |
5371 | IN UINT32 OrData\r | |
5372 | );\r | |
5373 | \r | |
5374 | \r | |
5375 | /**\r | |
5376 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
5377 | the result back to the 64-bit MSR.\r | |
5378 | \r | |
5379 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5380 | lower 32-bits of the read result and the value specified by AndData, and\r | |
5381 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
5382 | the value written to the MSR is returned. No parameter checking is performed\r | |
5383 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
5384 | must either guarantee that Index and AndData are valid, or the caller must\r | |
5385 | establish proper exception handlers. This function is only available on IA-32\r | |
5386 | and X64.\r | |
5387 | \r | |
5388 | @param Index The 32-bit MSR index to write.\r | |
5389 | @param AndData The value to AND with the read value from the MSR.\r | |
5390 | \r | |
5391 | @return The lower 32-bit value written to the MSR.\r | |
5392 | \r | |
5393 | **/\r | |
5394 | UINT32\r | |
5395 | EFIAPI\r | |
5396 | AsmMsrAnd32 (\r | |
5397 | IN UINT32 Index,\r | |
5398 | IN UINT32 AndData\r | |
5399 | );\r | |
5400 | \r | |
5401 | \r | |
5402 | /**\r | |
5403 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR\r | |
5404 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r | |
5405 | \r | |
5406 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5407 | lower 32-bits of the read result and the value specified by AndData\r | |
5408 | preserving the upper 32-bits, performs a bitwise inclusive OR between the\r | |
5409 | result of the AND operation and the value specified by OrData, and writes the\r | |
5410 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
5411 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
5412 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
5413 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
5414 | caller must establish proper exception handlers. This function is only\r | |
5415 | available on IA-32 and X64.\r | |
5416 | \r | |
5417 | @param Index The 32-bit MSR index to write.\r | |
5418 | @param AndData The value to AND with the read value from the MSR.\r | |
5419 | @param OrData The value to OR with the result of the AND operation.\r | |
5420 | \r | |
5421 | @return The lower 32-bit value written to the MSR.\r | |
5422 | \r | |
5423 | **/\r | |
5424 | UINT32\r | |
5425 | EFIAPI\r | |
5426 | AsmMsrAndThenOr32 (\r | |
5427 | IN UINT32 Index,\r | |
5428 | IN UINT32 AndData,\r | |
5429 | IN UINT32 OrData\r | |
5430 | );\r | |
5431 | \r | |
5432 | \r | |
5433 | /**\r | |
5434 | Reads a bit field of an MSR.\r | |
5435 | \r | |
5436 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
5437 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
5438 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
5439 | must set up exception handlers to catch the exceptions. This function is only\r | |
5440 | available on IA-32 and X64.\r | |
5441 | \r | |
5442 | If StartBit is greater than 31, then ASSERT().\r | |
5443 | If EndBit is greater than 31, then ASSERT().\r | |
5444 | If EndBit is less than StartBit, then ASSERT().\r | |
5445 | \r | |
5446 | @param Index The 32-bit MSR index to read.\r | |
5447 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5448 | Range 0..31.\r | |
5449 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5450 | Range 0..31.\r | |
5451 | \r | |
5452 | @return The bit field read from the MSR.\r | |
5453 | \r | |
5454 | **/\r | |
5455 | UINT32\r | |
5456 | EFIAPI\r | |
5457 | AsmMsrBitFieldRead32 (\r | |
5458 | IN UINT32 Index,\r | |
5459 | IN UINTN StartBit,\r | |
5460 | IN UINTN EndBit\r | |
5461 | );\r | |
5462 | \r | |
5463 | \r | |
5464 | /**\r | |
5465 | Writes a bit field to an MSR.\r | |
5466 | \r | |
5467 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r | |
5468 | field is specified by the StartBit and the EndBit. All other bits in the\r | |
5469 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
5470 | returned. Extra left bits in Value are stripped. The caller must either\r | |
5471 | guarantee that Index and the data written is valid, or the caller must set up\r | |
5472 | exception handlers to catch the exceptions. This function is only available\r | |
5473 | on IA-32 and X64.\r | |
5474 | \r | |
5475 | If StartBit is greater than 31, then ASSERT().\r | |
5476 | If EndBit is greater than 31, then ASSERT().\r | |
5477 | If EndBit is less than StartBit, then ASSERT().\r | |
5478 | \r | |
5479 | @param Index The 32-bit MSR index to write.\r | |
5480 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5481 | Range 0..31.\r | |
5482 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5483 | Range 0..31.\r | |
5484 | @param Value New value of the bit field.\r | |
5485 | \r | |
5486 | @return The lower 32-bit of the value written to the MSR.\r | |
5487 | \r | |
5488 | **/\r | |
5489 | UINT32\r | |
5490 | EFIAPI\r | |
5491 | AsmMsrBitFieldWrite32 (\r | |
5492 | IN UINT32 Index,\r | |
5493 | IN UINTN StartBit,\r | |
5494 | IN UINTN EndBit,\r | |
5495 | IN UINT32 Value\r | |
5496 | );\r | |
5497 | \r | |
5498 | \r | |
5499 | /**\r | |
5500 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
5501 | result back to the bit field in the 64-bit MSR.\r | |
5502 | \r | |
5503 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
5504 | between the read result and the value specified by OrData, and writes the\r | |
5505 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
5506 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
5507 | caller must either guarantee that Index and the data written is valid, or\r | |
5508 | the caller must set up exception handlers to catch the exceptions. This\r | |
5509 | function is only available on IA-32 and X64.\r | |
5510 | \r | |
5511 | If StartBit is greater than 31, then ASSERT().\r | |
5512 | If EndBit is greater than 31, then ASSERT().\r | |
5513 | If EndBit is less than StartBit, then ASSERT().\r | |
5514 | \r | |
5515 | @param Index The 32-bit MSR index to write.\r | |
5516 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5517 | Range 0..31.\r | |
5518 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5519 | Range 0..31.\r | |
5520 | @param OrData The value to OR with the read value from the MSR.\r | |
5521 | \r | |
5522 | @return The lower 32-bit of the value written to the MSR.\r | |
5523 | \r | |
5524 | **/\r | |
5525 | UINT32\r | |
5526 | EFIAPI\r | |
5527 | AsmMsrBitFieldOr32 (\r | |
5528 | IN UINT32 Index,\r | |
5529 | IN UINTN StartBit,\r | |
5530 | IN UINTN EndBit,\r | |
5531 | IN UINT32 OrData\r | |
5532 | );\r | |
5533 | \r | |
5534 | \r | |
5535 | /**\r | |
5536 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5537 | result back to the bit field in the 64-bit MSR.\r | |
5538 | \r | |
5539 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5540 | read result and the value specified by AndData, and writes the result to the\r | |
5541 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
5542 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
5543 | either guarantee that Index and the data written is valid, or the caller must\r | |
5544 | set up exception handlers to catch the exceptions. This function is only\r | |
5545 | available on IA-32 and X64.\r | |
5546 | \r | |
5547 | If StartBit is greater than 31, then ASSERT().\r | |
5548 | If EndBit is greater than 31, then ASSERT().\r | |
5549 | If EndBit is less than StartBit, then ASSERT().\r | |
5550 | \r | |
5551 | @param Index The 32-bit MSR index to write.\r | |
5552 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5553 | Range 0..31.\r | |
5554 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5555 | Range 0..31.\r | |
5556 | @param AndData The value to AND with the read value from the MSR.\r | |
5557 | \r | |
5558 | @return The lower 32-bit of the value written to the MSR.\r | |
5559 | \r | |
5560 | **/\r | |
5561 | UINT32\r | |
5562 | EFIAPI\r | |
5563 | AsmMsrBitFieldAnd32 (\r | |
5564 | IN UINT32 Index,\r | |
5565 | IN UINTN StartBit,\r | |
5566 | IN UINTN EndBit,\r | |
5567 | IN UINT32 AndData\r | |
5568 | );\r | |
5569 | \r | |
5570 | \r | |
5571 | /**\r | |
5572 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
5573 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
5574 | 64-bit MSR.\r | |
5575 | \r | |
5576 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
5577 | bitwise inclusive OR between the read result and the value specified by\r | |
5578 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r | |
5579 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
5580 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
5581 | that Index and the data written is valid, or the caller must set up exception\r | |
5582 | handlers to catch the exceptions. This function is only available on IA-32\r | |
5583 | and X64.\r | |
5584 | \r | |
5585 | If StartBit is greater than 31, then ASSERT().\r | |
5586 | If EndBit is greater than 31, then ASSERT().\r | |
5587 | If EndBit is less than StartBit, then ASSERT().\r | |
5588 | \r | |
5589 | @param Index The 32-bit MSR index to write.\r | |
5590 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5591 | Range 0..31.\r | |
5592 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5593 | Range 0..31.\r | |
5594 | @param AndData The value to AND with the read value from the MSR.\r | |
5595 | @param OrData The value to OR with the result of the AND operation.\r | |
5596 | \r | |
5597 | @return The lower 32-bit of the value written to the MSR.\r | |
5598 | \r | |
5599 | **/\r | |
5600 | UINT32\r | |
5601 | EFIAPI\r | |
5602 | AsmMsrBitFieldAndThenOr32 (\r | |
5603 | IN UINT32 Index,\r | |
5604 | IN UINTN StartBit,\r | |
5605 | IN UINTN EndBit,\r | |
5606 | IN UINT32 AndData,\r | |
5607 | IN UINT32 OrData\r | |
5608 | );\r | |
5609 | \r | |
5610 | \r | |
5611 | /**\r | |
5612 | Returns a 64-bit Machine Specific Register(MSR).\r | |
5613 | \r | |
5614 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r | |
5615 | performed on Index, and some Index values may cause CPU exceptions. The\r | |
5616 | caller must either guarantee that Index is valid, or the caller must set up\r | |
5617 | exception handlers to catch the exceptions. This function is only available\r | |
5618 | on IA-32 and X64.\r | |
5619 | \r | |
5620 | @param Index The 32-bit MSR index to read.\r | |
5621 | \r | |
5622 | @return The value of the MSR identified by Index.\r | |
5623 | \r | |
5624 | **/\r | |
5625 | UINT64\r | |
5626 | EFIAPI\r | |
5627 | AsmReadMsr64 (\r | |
5628 | IN UINT32 Index\r | |
5629 | );\r | |
5630 | \r | |
5631 | \r | |
5632 | /**\r | |
5633 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r | |
5634 | value.\r | |
5635 | \r | |
5636 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r | |
5637 | 64-bit value written to the MSR is returned. No parameter checking is\r | |
5638 | performed on Index or Value, and some of these may cause CPU exceptions. The\r | |
5639 | caller must either guarantee that Index and Value are valid, or the caller\r | |
5640 | must establish proper exception handlers. This function is only available on\r | |
5641 | IA-32 and X64.\r | |
5642 | \r | |
5643 | @param Index The 32-bit MSR index to write.\r | |
5644 | @param Value The 64-bit value to write to the MSR.\r | |
5645 | \r | |
5646 | @return Value\r | |
5647 | \r | |
5648 | **/\r | |
5649 | UINT64\r | |
5650 | EFIAPI\r | |
5651 | AsmWriteMsr64 (\r | |
5652 | IN UINT32 Index,\r | |
5653 | IN UINT64 Value\r | |
5654 | );\r | |
5655 | \r | |
5656 | \r | |
5657 | /**\r | |
5658 | Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result\r | |
5659 | back to the 64-bit MSR.\r | |
5660 | \r | |
5661 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
5662 | between the read result and the value specified by OrData, and writes the\r | |
5663 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5664 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
5665 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
5666 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
5667 | This function is only available on IA-32 and X64.\r | |
5668 | \r | |
5669 | @param Index The 32-bit MSR index to write.\r | |
5670 | @param OrData The value to OR with the read value from the MSR.\r | |
5671 | \r | |
5672 | @return The value written back to the MSR.\r | |
5673 | \r | |
5674 | **/\r | |
5675 | UINT64\r | |
5676 | EFIAPI\r | |
5677 | AsmMsrOr64 (\r | |
5678 | IN UINT32 Index,\r | |
5679 | IN UINT64 OrData\r | |
5680 | );\r | |
5681 | \r | |
5682 | \r | |
5683 | /**\r | |
5684 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
5685 | 64-bit MSR.\r | |
5686 | \r | |
5687 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5688 | read result and the value specified by OrData, and writes the result to the\r | |
5689 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
5690 | parameter checking is performed on Index or OrData, and some of these may\r | |
5691 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
5692 | are valid, or the caller must establish proper exception handlers. This\r | |
5693 | function is only available on IA-32 and X64.\r | |
5694 | \r | |
5695 | @param Index The 32-bit MSR index to write.\r | |
5696 | @param AndData The value to AND with the read value from the MSR.\r | |
5697 | \r | |
5698 | @return The value written back to the MSR.\r | |
5699 | \r | |
5700 | **/\r | |
5701 | UINT64\r | |
5702 | EFIAPI\r | |
5703 | AsmMsrAnd64 (\r | |
5704 | IN UINT32 Index,\r | |
5705 | IN UINT64 AndData\r | |
5706 | );\r | |
5707 | \r | |
5708 | \r | |
5709 | /**\r | |
5710 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive\r | |
5711 | OR, and writes the result back to the 64-bit MSR.\r | |
5712 | \r | |
5713 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
5714 | result and the value specified by AndData, performs a bitwise inclusive OR\r | |
5715 | between the result of the AND operation and the value specified by OrData,\r | |
5716 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
5717 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
5718 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
5719 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
5720 | establish proper exception handlers. This function is only available on IA-32\r | |
5721 | and X64.\r | |
5722 | \r | |
5723 | @param Index The 32-bit MSR index to write.\r | |
5724 | @param AndData The value to AND with the read value from the MSR.\r | |
5725 | @param OrData The value to OR with the result of the AND operation.\r | |
5726 | \r | |
5727 | @return The value written back to the MSR.\r | |
5728 | \r | |
5729 | **/\r | |
5730 | UINT64\r | |
5731 | EFIAPI\r | |
5732 | AsmMsrAndThenOr64 (\r | |
5733 | IN UINT32 Index,\r | |
5734 | IN UINT64 AndData,\r | |
5735 | IN UINT64 OrData\r | |
5736 | );\r | |
5737 | \r | |
5738 | \r | |
5739 | /**\r | |
5740 | Reads a bit field of an MSR.\r | |
5741 | \r | |
5742 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
5743 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
5744 | must either guarantee that Index is valid, or the caller must set up\r | |
5745 | exception handlers to catch the exceptions. This function is only available\r | |
5746 | on IA-32 and X64.\r | |
5747 | \r | |
5748 | If StartBit is greater than 63, then ASSERT().\r | |
5749 | If EndBit is greater than 63, then ASSERT().\r | |
5750 | If EndBit is less than StartBit, then ASSERT().\r | |
5751 | \r | |
5752 | @param Index The 32-bit MSR index to read.\r | |
5753 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5754 | Range 0..63.\r | |
5755 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5756 | Range 0..63.\r | |
5757 | \r | |
5758 | @return The value read from the MSR.\r | |
5759 | \r | |
5760 | **/\r | |
5761 | UINT64\r | |
5762 | EFIAPI\r | |
5763 | AsmMsrBitFieldRead64 (\r | |
5764 | IN UINT32 Index,\r | |
5765 | IN UINTN StartBit,\r | |
5766 | IN UINTN EndBit\r | |
5767 | );\r | |
5768 | \r | |
5769 | \r | |
5770 | /**\r | |
5771 | Writes a bit field to an MSR.\r | |
5772 | \r | |
5773 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
5774 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
5775 | preserved. The MSR written is returned. Extra left bits in Value are\r | |
5776 | stripped. The caller must either guarantee that Index and the data written is\r | |
5777 | valid, or the caller must set up exception handlers to catch the exceptions.\r | |
5778 | This function is only available on IA-32 and X64.\r | |
5779 | \r | |
5780 | If StartBit is greater than 63, then ASSERT().\r | |
5781 | If EndBit is greater than 63, then ASSERT().\r | |
5782 | If EndBit is less than StartBit, then ASSERT().\r | |
5783 | \r | |
5784 | @param Index The 32-bit MSR index to write.\r | |
5785 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5786 | Range 0..63.\r | |
5787 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5788 | Range 0..63.\r | |
5789 | @param Value New value of the bit field.\r | |
5790 | \r | |
5791 | @return The value written back to the MSR.\r | |
5792 | \r | |
5793 | **/\r | |
5794 | UINT64\r | |
5795 | EFIAPI\r | |
5796 | AsmMsrBitFieldWrite64 (\r | |
5797 | IN UINT32 Index,\r | |
5798 | IN UINTN StartBit,\r | |
5799 | IN UINTN EndBit,\r | |
5800 | IN UINT64 Value\r | |
5801 | );\r | |
5802 | \r | |
5803 | \r | |
5804 | /**\r | |
5805 | Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and\r | |
5806 | writes the result back to the bit field in the 64-bit MSR.\r | |
5807 | \r | |
5808 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
5809 | between the read result and the value specified by OrData, and writes the\r | |
5810 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5811 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
5812 | guarantee that Index and the data written is valid, or the caller must set up\r | |
5813 | exception handlers to catch the exceptions. This function is only available\r | |
5814 | on IA-32 and X64.\r | |
5815 | \r | |
5816 | If StartBit is greater than 63, then ASSERT().\r | |
5817 | If EndBit is greater than 63, then ASSERT().\r | |
5818 | If EndBit is less than StartBit, then ASSERT().\r | |
5819 | \r | |
5820 | @param Index The 32-bit MSR index to write.\r | |
5821 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5822 | Range 0..63.\r | |
5823 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5824 | Range 0..63.\r | |
5825 | @param OrData The value to OR with the read value from the bit field.\r | |
5826 | \r | |
5827 | @return The value written back to the MSR.\r | |
5828 | \r | |
5829 | **/\r | |
5830 | UINT64\r | |
5831 | EFIAPI\r | |
5832 | AsmMsrBitFieldOr64 (\r | |
5833 | IN UINT32 Index,\r | |
5834 | IN UINTN StartBit,\r | |
5835 | IN UINTN EndBit,\r | |
5836 | IN UINT64 OrData\r | |
5837 | );\r | |
5838 | \r | |
5839 | \r | |
5840 | /**\r | |
5841 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5842 | result back to the bit field in the 64-bit MSR.\r | |
5843 | \r | |
5844 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5845 | read result and the value specified by AndData, and writes the result to the\r | |
5846 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
5847 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
5848 | that Index and the data written is valid, or the caller must set up exception\r | |
5849 | handlers to catch the exceptions. This function is only available on IA-32\r | |
5850 | and X64.\r | |
5851 | \r | |
5852 | If StartBit is greater than 63, then ASSERT().\r | |
5853 | If EndBit is greater than 63, then ASSERT().\r | |
5854 | If EndBit is less than StartBit, then ASSERT().\r | |
5855 | \r | |
5856 | @param Index The 32-bit MSR index to write.\r | |
5857 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5858 | Range 0..63.\r | |
5859 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5860 | Range 0..63.\r | |
5861 | @param AndData The value to AND with the read value from the bit field.\r | |
5862 | \r | |
5863 | @return The value written back to the MSR.\r | |
5864 | \r | |
5865 | **/\r | |
5866 | UINT64\r | |
5867 | EFIAPI\r | |
5868 | AsmMsrBitFieldAnd64 (\r | |
5869 | IN UINT32 Index,\r | |
5870 | IN UINTN StartBit,\r | |
5871 | IN UINTN EndBit,\r | |
5872 | IN UINT64 AndData\r | |
5873 | );\r | |
5874 | \r | |
5875 | \r | |
5876 | /**\r | |
5877 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
5878 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
5879 | 64-bit MSR.\r | |
5880 | \r | |
5881 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
5882 | a bitwise inclusive OR between the read result and the value specified by\r | |
5883 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r | |
5884 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
5885 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
5886 | written is valid, or the caller must set up exception handlers to catch the\r | |
5887 | exceptions. This function is only available on IA-32 and X64.\r | |
5888 | \r | |
5889 | If StartBit is greater than 63, then ASSERT().\r | |
5890 | If EndBit is greater than 63, then ASSERT().\r | |
5891 | If EndBit is less than StartBit, then ASSERT().\r | |
5892 | \r | |
5893 | @param Index The 32-bit MSR index to write.\r | |
5894 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5895 | Range 0..63.\r | |
5896 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5897 | Range 0..63.\r | |
5898 | @param AndData The value to AND with the read value from the bit field.\r | |
5899 | @param OrData The value to OR with the result of the AND operation.\r | |
5900 | \r | |
5901 | @return The value written back to the MSR.\r | |
5902 | \r | |
5903 | **/\r | |
5904 | UINT64\r | |
5905 | EFIAPI\r | |
5906 | AsmMsrBitFieldAndThenOr64 (\r | |
5907 | IN UINT32 Index,\r | |
5908 | IN UINTN StartBit,\r | |
5909 | IN UINTN EndBit,\r | |
5910 | IN UINT64 AndData,\r | |
5911 | IN UINT64 OrData\r | |
5912 | );\r | |
5913 | \r | |
5914 | \r | |
5915 | /**\r | |
5916 | Reads the current value of the EFLAGS register.\r | |
5917 | \r | |
5918 | Reads and returns the current value of the EFLAGS register. This function is\r | |
5919 | only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a\r | |
5920 | 64-bit value on X64.\r | |
5921 | \r | |
5922 | @return EFLAGS on IA-32 or RFLAGS on X64.\r | |
5923 | \r | |
5924 | **/\r | |
5925 | UINTN\r | |
5926 | EFIAPI\r | |
5927 | AsmReadEflags (\r | |
5928 | VOID\r | |
5929 | );\r | |
5930 | \r | |
5931 | \r | |
5932 | /**\r | |
5933 | Reads the current value of the Control Register 0 (CR0).\r | |
5934 | \r | |
5935 | Reads and returns the current value of CR0. This function is only available\r | |
5936 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
5937 | X64.\r | |
5938 | \r | |
5939 | @return The value of the Control Register 0 (CR0).\r | |
5940 | \r | |
5941 | **/\r | |
5942 | UINTN\r | |
5943 | EFIAPI\r | |
5944 | AsmReadCr0 (\r | |
5945 | VOID\r | |
5946 | );\r | |
5947 | \r | |
5948 | \r | |
5949 | /**\r | |
5950 | Reads the current value of the Control Register 2 (CR2).\r | |
5951 | \r | |
5952 | Reads and returns the current value of CR2. This function is only available\r | |
5953 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
5954 | X64.\r | |
5955 | \r | |
5956 | @return The value of the Control Register 2 (CR2).\r | |
5957 | \r | |
5958 | **/\r | |
5959 | UINTN\r | |
5960 | EFIAPI\r | |
5961 | AsmReadCr2 (\r | |
5962 | VOID\r | |
5963 | );\r | |
5964 | \r | |
5965 | \r | |
5966 | /**\r | |
5967 | Reads the current value of the Control Register 3 (CR3).\r | |
5968 | \r | |
5969 | Reads and returns the current value of CR3. This function is only available\r | |
5970 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
5971 | X64.\r | |
5972 | \r | |
5973 | @return The value of the Control Register 3 (CR3).\r | |
5974 | \r | |
5975 | **/\r | |
5976 | UINTN\r | |
5977 | EFIAPI\r | |
5978 | AsmReadCr3 (\r | |
5979 | VOID\r | |
5980 | );\r | |
5981 | \r | |
5982 | \r | |
5983 | /**\r | |
5984 | Reads the current value of the Control Register 4 (CR4).\r | |
5985 | \r | |
5986 | Reads and returns the current value of CR4. This function is only available\r | |
5987 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
5988 | X64.\r | |
5989 | \r | |
5990 | @return The value of the Control Register 4 (CR4).\r | |
5991 | \r | |
5992 | **/\r | |
5993 | UINTN\r | |
5994 | EFIAPI\r | |
5995 | AsmReadCr4 (\r | |
5996 | VOID\r | |
5997 | );\r | |
5998 | \r | |
5999 | \r | |
6000 | /**\r | |
6001 | Writes a value to Control Register 0 (CR0).\r | |
6002 | \r | |
6003 | Writes and returns a new value to CR0. This function is only available on\r | |
6004 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6005 | \r | |
6006 | @param Cr0 The value to write to CR0.\r | |
6007 | \r | |
6008 | @return The value written to CR0.\r | |
6009 | \r | |
6010 | **/\r | |
6011 | UINTN\r | |
6012 | EFIAPI\r | |
6013 | AsmWriteCr0 (\r | |
6014 | UINTN Cr0\r | |
6015 | );\r | |
6016 | \r | |
6017 | \r | |
6018 | /**\r | |
6019 | Writes a value to Control Register 2 (CR2).\r | |
6020 | \r | |
6021 | Writes and returns a new value to CR2. This function is only available on\r | |
6022 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6023 | \r | |
6024 | @param Cr2 The value to write to CR2.\r | |
6025 | \r | |
6026 | @return The value written to CR2.\r | |
6027 | \r | |
6028 | **/\r | |
6029 | UINTN\r | |
6030 | EFIAPI\r | |
6031 | AsmWriteCr2 (\r | |
6032 | UINTN Cr2\r | |
6033 | );\r | |
6034 | \r | |
6035 | \r | |
6036 | /**\r | |
6037 | Writes a value to Control Register 3 (CR3).\r | |
6038 | \r | |
6039 | Writes and returns a new value to CR3. This function is only available on\r | |
6040 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6041 | \r | |
6042 | @param Cr3 The value to write to CR3.\r | |
6043 | \r | |
6044 | @return The value written to CR3.\r | |
6045 | \r | |
6046 | **/\r | |
6047 | UINTN\r | |
6048 | EFIAPI\r | |
6049 | AsmWriteCr3 (\r | |
6050 | UINTN Cr3\r | |
6051 | );\r | |
6052 | \r | |
6053 | \r | |
6054 | /**\r | |
6055 | Writes a value to Control Register 4 (CR4).\r | |
6056 | \r | |
6057 | Writes and returns a new value to CR4. This function is only available on\r | |
6058 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6059 | \r | |
6060 | @param Cr4 The value to write to CR4.\r | |
6061 | \r | |
6062 | @return The value written to CR4.\r | |
6063 | \r | |
6064 | **/\r | |
6065 | UINTN\r | |
6066 | EFIAPI\r | |
6067 | AsmWriteCr4 (\r | |
6068 | UINTN Cr4\r | |
6069 | );\r | |
6070 | \r | |
6071 | \r | |
6072 | /**\r | |
6073 | Reads the current value of Debug Register 0 (DR0).\r | |
6074 | \r | |
6075 | Reads and returns the current value of DR0. This function is only available\r | |
6076 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6077 | X64.\r | |
6078 | \r | |
6079 | @return The value of Debug Register 0 (DR0).\r | |
6080 | \r | |
6081 | **/\r | |
6082 | UINTN\r | |
6083 | EFIAPI\r | |
6084 | AsmReadDr0 (\r | |
6085 | VOID\r | |
6086 | );\r | |
6087 | \r | |
6088 | \r | |
6089 | /**\r | |
6090 | Reads the current value of Debug Register 1 (DR1).\r | |
6091 | \r | |
6092 | Reads and returns the current value of DR1. This function is only available\r | |
6093 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6094 | X64.\r | |
6095 | \r | |
6096 | @return The value of Debug Register 1 (DR1).\r | |
6097 | \r | |
6098 | **/\r | |
6099 | UINTN\r | |
6100 | EFIAPI\r | |
6101 | AsmReadDr1 (\r | |
6102 | VOID\r | |
6103 | );\r | |
6104 | \r | |
6105 | \r | |
6106 | /**\r | |
6107 | Reads the current value of Debug Register 2 (DR2).\r | |
6108 | \r | |
6109 | Reads and returns the current value of DR2. This function is only available\r | |
6110 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6111 | X64.\r | |
6112 | \r | |
6113 | @return The value of Debug Register 2 (DR2).\r | |
6114 | \r | |
6115 | **/\r | |
6116 | UINTN\r | |
6117 | EFIAPI\r | |
6118 | AsmReadDr2 (\r | |
6119 | VOID\r | |
6120 | );\r | |
6121 | \r | |
6122 | \r | |
6123 | /**\r | |
6124 | Reads the current value of Debug Register 3 (DR3).\r | |
6125 | \r | |
6126 | Reads and returns the current value of DR3. This function is only available\r | |
6127 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6128 | X64.\r | |
6129 | \r | |
6130 | @return The value of Debug Register 3 (DR3).\r | |
6131 | \r | |
6132 | **/\r | |
6133 | UINTN\r | |
6134 | EFIAPI\r | |
6135 | AsmReadDr3 (\r | |
6136 | VOID\r | |
6137 | );\r | |
6138 | \r | |
6139 | \r | |
6140 | /**\r | |
6141 | Reads the current value of Debug Register 4 (DR4).\r | |
6142 | \r | |
6143 | Reads and returns the current value of DR4. This function is only available\r | |
6144 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6145 | X64.\r | |
6146 | \r | |
6147 | @return The value of Debug Register 4 (DR4).\r | |
6148 | \r | |
6149 | **/\r | |
6150 | UINTN\r | |
6151 | EFIAPI\r | |
6152 | AsmReadDr4 (\r | |
6153 | VOID\r | |
6154 | );\r | |
6155 | \r | |
6156 | \r | |
6157 | /**\r | |
6158 | Reads the current value of Debug Register 5 (DR5).\r | |
6159 | \r | |
6160 | Reads and returns the current value of DR5. This function is only available\r | |
6161 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6162 | X64.\r | |
6163 | \r | |
6164 | @return The value of Debug Register 5 (DR5).\r | |
6165 | \r | |
6166 | **/\r | |
6167 | UINTN\r | |
6168 | EFIAPI\r | |
6169 | AsmReadDr5 (\r | |
6170 | VOID\r | |
6171 | );\r | |
6172 | \r | |
6173 | \r | |
6174 | /**\r | |
6175 | Reads the current value of Debug Register 6 (DR6).\r | |
6176 | \r | |
6177 | Reads and returns the current value of DR6. This function is only available\r | |
6178 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6179 | X64.\r | |
6180 | \r | |
6181 | @return The value of Debug Register 6 (DR6).\r | |
6182 | \r | |
6183 | **/\r | |
6184 | UINTN\r | |
6185 | EFIAPI\r | |
6186 | AsmReadDr6 (\r | |
6187 | VOID\r | |
6188 | );\r | |
6189 | \r | |
6190 | \r | |
6191 | /**\r | |
6192 | Reads the current value of Debug Register 7 (DR7).\r | |
6193 | \r | |
6194 | Reads and returns the current value of DR7. This function is only available\r | |
6195 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
6196 | X64.\r | |
6197 | \r | |
6198 | @return The value of Debug Register 7 (DR7).\r | |
6199 | \r | |
6200 | **/\r | |
6201 | UINTN\r | |
6202 | EFIAPI\r | |
6203 | AsmReadDr7 (\r | |
6204 | VOID\r | |
6205 | );\r | |
6206 | \r | |
6207 | \r | |
6208 | /**\r | |
6209 | Writes a value to Debug Register 0 (DR0).\r | |
6210 | \r | |
6211 | Writes and returns a new value to DR0. This function is only available on\r | |
6212 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6213 | \r | |
6214 | @param Dr0 The value to write to Dr0.\r | |
6215 | \r | |
6216 | @return The value written to Debug Register 0 (DR0).\r | |
6217 | \r | |
6218 | **/\r | |
6219 | UINTN\r | |
6220 | EFIAPI\r | |
6221 | AsmWriteDr0 (\r | |
6222 | UINTN Dr0\r | |
6223 | );\r | |
6224 | \r | |
6225 | \r | |
6226 | /**\r | |
6227 | Writes a value to Debug Register 1 (DR1).\r | |
6228 | \r | |
6229 | Writes and returns a new value to DR1. This function is only available on\r | |
6230 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6231 | \r | |
6232 | @param Dr1 The value to write to Dr1.\r | |
6233 | \r | |
6234 | @return The value written to Debug Register 1 (DR1).\r | |
6235 | \r | |
6236 | **/\r | |
6237 | UINTN\r | |
6238 | EFIAPI\r | |
6239 | AsmWriteDr1 (\r | |
6240 | UINTN Dr1\r | |
6241 | );\r | |
6242 | \r | |
6243 | \r | |
6244 | /**\r | |
6245 | Writes a value to Debug Register 2 (DR2).\r | |
6246 | \r | |
6247 | Writes and returns a new value to DR2. This function is only available on\r | |
6248 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6249 | \r | |
6250 | @param Dr2 The value to write to Dr2.\r | |
6251 | \r | |
6252 | @return The value written to Debug Register 2 (DR2).\r | |
6253 | \r | |
6254 | **/\r | |
6255 | UINTN\r | |
6256 | EFIAPI\r | |
6257 | AsmWriteDr2 (\r | |
6258 | UINTN Dr2\r | |
6259 | );\r | |
6260 | \r | |
6261 | \r | |
6262 | /**\r | |
6263 | Writes a value to Debug Register 3 (DR3).\r | |
6264 | \r | |
6265 | Writes and returns a new value to DR3. This function is only available on\r | |
6266 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6267 | \r | |
6268 | @param Dr3 The value to write to Dr3.\r | |
6269 | \r | |
6270 | @return The value written to Debug Register 3 (DR3).\r | |
6271 | \r | |
6272 | **/\r | |
6273 | UINTN\r | |
6274 | EFIAPI\r | |
6275 | AsmWriteDr3 (\r | |
6276 | UINTN Dr3\r | |
6277 | );\r | |
6278 | \r | |
6279 | \r | |
6280 | /**\r | |
6281 | Writes a value to Debug Register 4 (DR4).\r | |
6282 | \r | |
6283 | Writes and returns a new value to DR4. This function is only available on\r | |
6284 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6285 | \r | |
6286 | @param Dr4 The value to write to Dr4.\r | |
6287 | \r | |
6288 | @return The value written to Debug Register 4 (DR4).\r | |
6289 | \r | |
6290 | **/\r | |
6291 | UINTN\r | |
6292 | EFIAPI\r | |
6293 | AsmWriteDr4 (\r | |
6294 | UINTN Dr4\r | |
6295 | );\r | |
6296 | \r | |
6297 | \r | |
6298 | /**\r | |
6299 | Writes a value to Debug Register 5 (DR5).\r | |
6300 | \r | |
6301 | Writes and returns a new value to DR5. This function is only available on\r | |
6302 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6303 | \r | |
6304 | @param Dr5 The value to write to Dr5.\r | |
6305 | \r | |
6306 | @return The value written to Debug Register 5 (DR5).\r | |
6307 | \r | |
6308 | **/\r | |
6309 | UINTN\r | |
6310 | EFIAPI\r | |
6311 | AsmWriteDr5 (\r | |
6312 | UINTN Dr5\r | |
6313 | );\r | |
6314 | \r | |
6315 | \r | |
6316 | /**\r | |
6317 | Writes a value to Debug Register 6 (DR6).\r | |
6318 | \r | |
6319 | Writes and returns a new value to DR6. This function is only available on\r | |
6320 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6321 | \r | |
6322 | @param Dr6 The value to write to Dr6.\r | |
6323 | \r | |
6324 | @return The value written to Debug Register 6 (DR6).\r | |
6325 | \r | |
6326 | **/\r | |
6327 | UINTN\r | |
6328 | EFIAPI\r | |
6329 | AsmWriteDr6 (\r | |
6330 | UINTN Dr6\r | |
6331 | );\r | |
6332 | \r | |
6333 | \r | |
6334 | /**\r | |
6335 | Writes a value to Debug Register 7 (DR7).\r | |
6336 | \r | |
6337 | Writes and returns a new value to DR7. This function is only available on\r | |
6338 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
6339 | \r | |
6340 | @param Dr7 The value to write to Dr7.\r | |
6341 | \r | |
6342 | @return The value written to Debug Register 7 (DR7).\r | |
6343 | \r | |
6344 | **/\r | |
6345 | UINTN\r | |
6346 | EFIAPI\r | |
6347 | AsmWriteDr7 (\r | |
6348 | UINTN Dr7\r | |
6349 | );\r | |
6350 | \r | |
6351 | \r | |
6352 | /**\r | |
6353 | Reads the current value of Code Segment Register (CS).\r | |
6354 | \r | |
6355 | Reads and returns the current value of CS. This function is only available on\r | |
6356 | IA-32 and X64.\r | |
6357 | \r | |
6358 | @return The current value of CS.\r | |
6359 | \r | |
6360 | **/\r | |
6361 | UINT16\r | |
6362 | EFIAPI\r | |
6363 | AsmReadCs (\r | |
6364 | VOID\r | |
6365 | );\r | |
6366 | \r | |
6367 | \r | |
6368 | /**\r | |
6369 | Reads the current value of Data Segment Register (DS).\r | |
6370 | \r | |
6371 | Reads and returns the current value of DS. This function is only available on\r | |
6372 | IA-32 and X64.\r | |
6373 | \r | |
6374 | @return The current value of DS.\r | |
6375 | \r | |
6376 | **/\r | |
6377 | UINT16\r | |
6378 | EFIAPI\r | |
6379 | AsmReadDs (\r | |
6380 | VOID\r | |
6381 | );\r | |
6382 | \r | |
6383 | \r | |
6384 | /**\r | |
6385 | Reads the current value of Extra Segment Register (ES).\r | |
6386 | \r | |
6387 | Reads and returns the current value of ES. This function is only available on\r | |
6388 | IA-32 and X64.\r | |
6389 | \r | |
6390 | @return The current value of ES.\r | |
6391 | \r | |
6392 | **/\r | |
6393 | UINT16\r | |
6394 | EFIAPI\r | |
6395 | AsmReadEs (\r | |
6396 | VOID\r | |
6397 | );\r | |
6398 | \r | |
6399 | \r | |
6400 | /**\r | |
6401 | Reads the current value of FS Data Segment Register (FS).\r | |
6402 | \r | |
6403 | Reads and returns the current value of FS. This function is only available on\r | |
6404 | IA-32 and X64.\r | |
6405 | \r | |
6406 | @return The current value of FS.\r | |
6407 | \r | |
6408 | **/\r | |
6409 | UINT16\r | |
6410 | EFIAPI\r | |
6411 | AsmReadFs (\r | |
6412 | VOID\r | |
6413 | );\r | |
6414 | \r | |
6415 | \r | |
6416 | /**\r | |
6417 | Reads the current value of GS Data Segment Register (GS).\r | |
6418 | \r | |
6419 | Reads and returns the current value of GS. This function is only available on\r | |
6420 | IA-32 and X64.\r | |
6421 | \r | |
6422 | @return The current value of GS.\r | |
6423 | \r | |
6424 | **/\r | |
6425 | UINT16\r | |
6426 | EFIAPI\r | |
6427 | AsmReadGs (\r | |
6428 | VOID\r | |
6429 | );\r | |
6430 | \r | |
6431 | \r | |
6432 | /**\r | |
6433 | Reads the current value of Stack Segment Register (SS).\r | |
6434 | \r | |
6435 | Reads and returns the current value of SS. This function is only available on\r | |
6436 | IA-32 and X64.\r | |
6437 | \r | |
6438 | @return The current value of SS.\r | |
6439 | \r | |
6440 | **/\r | |
6441 | UINT16\r | |
6442 | EFIAPI\r | |
6443 | AsmReadSs (\r | |
6444 | VOID\r | |
6445 | );\r | |
6446 | \r | |
6447 | \r | |
6448 | /**\r | |
6449 | Reads the current value of Task Register (TR).\r | |
6450 | \r | |
6451 | Reads and returns the current value of TR. This function is only available on\r | |
6452 | IA-32 and X64.\r | |
6453 | \r | |
6454 | @return The current value of TR.\r | |
6455 | \r | |
6456 | **/\r | |
6457 | UINT16\r | |
6458 | EFIAPI\r | |
6459 | AsmReadTr (\r | |
6460 | VOID\r | |
6461 | );\r | |
6462 | \r | |
6463 | \r | |
6464 | /**\r | |
6465 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r | |
6466 | \r | |
6467 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r | |
6468 | function is only available on IA-32 and X64.\r | |
6469 | \r | |
6470 | If Gdtr is NULL, then ASSERT().\r | |
6471 | \r | |
6472 | @param Gdtr Pointer to a GDTR descriptor.\r | |
6473 | \r | |
6474 | **/\r | |
6475 | VOID\r | |
6476 | EFIAPI\r | |
6477 | AsmReadGdtr (\r | |
6478 | OUT IA32_DESCRIPTOR *Gdtr\r | |
6479 | );\r | |
6480 | \r | |
6481 | \r | |
6482 | /**\r | |
6483 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r | |
6484 | \r | |
6485 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r | |
6486 | only available on IA-32 and X64.\r | |
6487 | \r | |
6488 | If Gdtr is NULL, then ASSERT().\r | |
6489 | \r | |
6490 | @param Gdtr Pointer to a GDTR descriptor.\r | |
6491 | \r | |
6492 | **/\r | |
6493 | VOID\r | |
6494 | EFIAPI\r | |
6495 | AsmWriteGdtr (\r | |
6496 | IN CONST IA32_DESCRIPTOR *Gdtr\r | |
6497 | );\r | |
6498 | \r | |
6499 | \r | |
6500 | /**\r | |
17f695ed | 6501 | Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6502 | \r |
6503 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r | |
6504 | function is only available on IA-32 and X64.\r | |
6505 | \r | |
6506 | If Idtr is NULL, then ASSERT().\r | |
6507 | \r | |
6508 | @param Idtr Pointer to a IDTR descriptor.\r | |
6509 | \r | |
6510 | **/\r | |
6511 | VOID\r | |
6512 | EFIAPI\r | |
6513 | AsmReadIdtr (\r | |
6514 | OUT IA32_DESCRIPTOR *Idtr\r | |
6515 | );\r | |
6516 | \r | |
6517 | \r | |
6518 | /**\r | |
17f695ed | 6519 | Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6520 | \r |
6521 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r | |
6522 | only available on IA-32 and X64.\r | |
6523 | \r | |
6524 | If Idtr is NULL, then ASSERT().\r | |
6525 | \r | |
6526 | @param Idtr Pointer to a IDTR descriptor.\r | |
6527 | \r | |
6528 | **/\r | |
6529 | VOID\r | |
6530 | EFIAPI\r | |
6531 | AsmWriteIdtr (\r | |
6532 | IN CONST IA32_DESCRIPTOR *Idtr\r | |
6533 | );\r | |
6534 | \r | |
6535 | \r | |
6536 | /**\r | |
6537 | Reads the current Local Descriptor Table Register(LDTR) selector.\r | |
6538 | \r | |
6539 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r | |
6540 | only available on IA-32 and X64.\r | |
6541 | \r | |
6542 | @return The current selector of LDT.\r | |
6543 | \r | |
6544 | **/\r | |
6545 | UINT16\r | |
6546 | EFIAPI\r | |
6547 | AsmReadLdtr (\r | |
6548 | VOID\r | |
6549 | );\r | |
6550 | \r | |
6551 | \r | |
6552 | /**\r | |
17f695ed | 6553 | Writes the current Local Descriptor Table Register (LDTR) selector.\r |
ac644614 | 6554 | \r |
6555 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r | |
6556 | only available on IA-32 and X64.\r | |
6557 | \r | |
6558 | @param Ldtr 16-bit LDTR selector value.\r | |
6559 | \r | |
6560 | **/\r | |
6561 | VOID\r | |
6562 | EFIAPI\r | |
6563 | AsmWriteLdtr (\r | |
6564 | IN UINT16 Ldtr\r | |
6565 | );\r | |
6566 | \r | |
6567 | \r | |
6568 | /**\r | |
6569 | Save the current floating point/SSE/SSE2 context to a buffer.\r | |
6570 | \r | |
6571 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r | |
6572 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r | |
6573 | available on IA-32 and X64.\r | |
6574 | \r | |
6575 | If Buffer is NULL, then ASSERT().\r | |
6576 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6577 | \r | |
6578 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r | |
6579 | \r | |
6580 | **/\r | |
6581 | VOID\r | |
6582 | EFIAPI\r | |
6583 | AsmFxSave (\r | |
6584 | OUT IA32_FX_BUFFER *Buffer\r | |
6585 | );\r | |
6586 | \r | |
6587 | \r | |
6588 | /**\r | |
6589 | Restores the current floating point/SSE/SSE2 context from a buffer.\r | |
6590 | \r | |
6591 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r | |
6592 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r | |
6593 | only available on IA-32 and X64.\r | |
6594 | \r | |
6595 | If Buffer is NULL, then ASSERT().\r | |
6596 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6597 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r | |
6598 | \r | |
6599 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r | |
6600 | \r | |
6601 | **/\r | |
6602 | VOID\r | |
6603 | EFIAPI\r | |
6604 | AsmFxRestore (\r | |
6605 | IN CONST IA32_FX_BUFFER *Buffer\r | |
6606 | );\r | |
6607 | \r | |
6608 | \r | |
6609 | /**\r | |
6610 | Reads the current value of 64-bit MMX Register #0 (MM0).\r | |
6611 | \r | |
6612 | Reads and returns the current value of MM0. This function is only available\r | |
6613 | on IA-32 and X64.\r | |
6614 | \r | |
6615 | @return The current value of MM0.\r | |
6616 | \r | |
6617 | **/\r | |
6618 | UINT64\r | |
6619 | EFIAPI\r | |
6620 | AsmReadMm0 (\r | |
6621 | VOID\r | |
6622 | );\r | |
6623 | \r | |
6624 | \r | |
6625 | /**\r | |
6626 | Reads the current value of 64-bit MMX Register #1 (MM1).\r | |
6627 | \r | |
6628 | Reads and returns the current value of MM1. This function is only available\r | |
6629 | on IA-32 and X64.\r | |
6630 | \r | |
6631 | @return The current value of MM1.\r | |
6632 | \r | |
6633 | **/\r | |
6634 | UINT64\r | |
6635 | EFIAPI\r | |
6636 | AsmReadMm1 (\r | |
6637 | VOID\r | |
6638 | );\r | |
6639 | \r | |
6640 | \r | |
6641 | /**\r | |
6642 | Reads the current value of 64-bit MMX Register #2 (MM2).\r | |
6643 | \r | |
6644 | Reads and returns the current value of MM2. This function is only available\r | |
6645 | on IA-32 and X64.\r | |
6646 | \r | |
6647 | @return The current value of MM2.\r | |
6648 | \r | |
6649 | **/\r | |
6650 | UINT64\r | |
6651 | EFIAPI\r | |
6652 | AsmReadMm2 (\r | |
6653 | VOID\r | |
6654 | );\r | |
6655 | \r | |
6656 | \r | |
6657 | /**\r | |
6658 | Reads the current value of 64-bit MMX Register #3 (MM3).\r | |
6659 | \r | |
6660 | Reads and returns the current value of MM3. This function is only available\r | |
6661 | on IA-32 and X64.\r | |
6662 | \r | |
6663 | @return The current value of MM3.\r | |
6664 | \r | |
6665 | **/\r | |
6666 | UINT64\r | |
6667 | EFIAPI\r | |
6668 | AsmReadMm3 (\r | |
6669 | VOID\r | |
6670 | );\r | |
6671 | \r | |
6672 | \r | |
6673 | /**\r | |
6674 | Reads the current value of 64-bit MMX Register #4 (MM4).\r | |
6675 | \r | |
6676 | Reads and returns the current value of MM4. This function is only available\r | |
6677 | on IA-32 and X64.\r | |
6678 | \r | |
6679 | @return The current value of MM4.\r | |
6680 | \r | |
6681 | **/\r | |
6682 | UINT64\r | |
6683 | EFIAPI\r | |
6684 | AsmReadMm4 (\r | |
6685 | VOID\r | |
6686 | );\r | |
6687 | \r | |
6688 | \r | |
6689 | /**\r | |
6690 | Reads the current value of 64-bit MMX Register #5 (MM5).\r | |
6691 | \r | |
6692 | Reads and returns the current value of MM5. This function is only available\r | |
6693 | on IA-32 and X64.\r | |
6694 | \r | |
6695 | @return The current value of MM5.\r | |
6696 | \r | |
6697 | **/\r | |
6698 | UINT64\r | |
6699 | EFIAPI\r | |
6700 | AsmReadMm5 (\r | |
6701 | VOID\r | |
6702 | );\r | |
6703 | \r | |
6704 | \r | |
6705 | /**\r | |
6706 | Reads the current value of 64-bit MMX Register #6 (MM6).\r | |
6707 | \r | |
6708 | Reads and returns the current value of MM6. This function is only available\r | |
6709 | on IA-32 and X64.\r | |
6710 | \r | |
6711 | @return The current value of MM6.\r | |
6712 | \r | |
6713 | **/\r | |
6714 | UINT64\r | |
6715 | EFIAPI\r | |
6716 | AsmReadMm6 (\r | |
6717 | VOID\r | |
6718 | );\r | |
6719 | \r | |
6720 | \r | |
6721 | /**\r | |
6722 | Reads the current value of 64-bit MMX Register #7 (MM7).\r | |
6723 | \r | |
6724 | Reads and returns the current value of MM7. This function is only available\r | |
6725 | on IA-32 and X64.\r | |
6726 | \r | |
6727 | @return The current value of MM7.\r | |
6728 | \r | |
6729 | **/\r | |
6730 | UINT64\r | |
6731 | EFIAPI\r | |
6732 | AsmReadMm7 (\r | |
6733 | VOID\r | |
6734 | );\r | |
6735 | \r | |
6736 | \r | |
6737 | /**\r | |
6738 | Writes the current value of 64-bit MMX Register #0 (MM0).\r | |
6739 | \r | |
6740 | Writes the current value of MM0. This function is only available on IA32 and\r | |
6741 | X64.\r | |
6742 | \r | |
6743 | @param Value The 64-bit value to write to MM0.\r | |
6744 | \r | |
6745 | **/\r | |
6746 | VOID\r | |
6747 | EFIAPI\r | |
6748 | AsmWriteMm0 (\r | |
6749 | IN UINT64 Value\r | |
6750 | );\r | |
6751 | \r | |
6752 | \r | |
6753 | /**\r | |
6754 | Writes the current value of 64-bit MMX Register #1 (MM1).\r | |
6755 | \r | |
6756 | Writes the current value of MM1. This function is only available on IA32 and\r | |
6757 | X64.\r | |
6758 | \r | |
6759 | @param Value The 64-bit value to write to MM1.\r | |
6760 | \r | |
6761 | **/\r | |
6762 | VOID\r | |
6763 | EFIAPI\r | |
6764 | AsmWriteMm1 (\r | |
6765 | IN UINT64 Value\r | |
6766 | );\r | |
6767 | \r | |
6768 | \r | |
6769 | /**\r | |
6770 | Writes the current value of 64-bit MMX Register #2 (MM2).\r | |
6771 | \r | |
6772 | Writes the current value of MM2. This function is only available on IA32 and\r | |
6773 | X64.\r | |
6774 | \r | |
6775 | @param Value The 64-bit value to write to MM2.\r | |
6776 | \r | |
6777 | **/\r | |
6778 | VOID\r | |
6779 | EFIAPI\r | |
6780 | AsmWriteMm2 (\r | |
6781 | IN UINT64 Value\r | |
6782 | );\r | |
6783 | \r | |
6784 | \r | |
6785 | /**\r | |
6786 | Writes the current value of 64-bit MMX Register #3 (MM3).\r | |
6787 | \r | |
6788 | Writes the current value of MM3. This function is only available on IA32 and\r | |
6789 | X64.\r | |
6790 | \r | |
6791 | @param Value The 64-bit value to write to MM3.\r | |
6792 | \r | |
6793 | **/\r | |
6794 | VOID\r | |
6795 | EFIAPI\r | |
6796 | AsmWriteMm3 (\r | |
6797 | IN UINT64 Value\r | |
6798 | );\r | |
6799 | \r | |
6800 | \r | |
6801 | /**\r | |
6802 | Writes the current value of 64-bit MMX Register #4 (MM4).\r | |
6803 | \r | |
6804 | Writes the current value of MM4. This function is only available on IA32 and\r | |
6805 | X64.\r | |
6806 | \r | |
6807 | @param Value The 64-bit value to write to MM4.\r | |
6808 | \r | |
6809 | **/\r | |
6810 | VOID\r | |
6811 | EFIAPI\r | |
6812 | AsmWriteMm4 (\r | |
6813 | IN UINT64 Value\r | |
6814 | );\r | |
6815 | \r | |
6816 | \r | |
6817 | /**\r | |
6818 | Writes the current value of 64-bit MMX Register #5 (MM5).\r | |
6819 | \r | |
6820 | Writes the current value of MM5. This function is only available on IA32 and\r | |
6821 | X64.\r | |
6822 | \r | |
6823 | @param Value The 64-bit value to write to MM5.\r | |
6824 | \r | |
6825 | **/\r | |
6826 | VOID\r | |
6827 | EFIAPI\r | |
6828 | AsmWriteMm5 (\r | |
6829 | IN UINT64 Value\r | |
6830 | );\r | |
6831 | \r | |
6832 | \r | |
6833 | /**\r | |
6834 | Writes the current value of 64-bit MMX Register #6 (MM6).\r | |
6835 | \r | |
6836 | Writes the current value of MM6. This function is only available on IA32 and\r | |
6837 | X64.\r | |
6838 | \r | |
6839 | @param Value The 64-bit value to write to MM6.\r | |
6840 | \r | |
6841 | **/\r | |
6842 | VOID\r | |
6843 | EFIAPI\r | |
6844 | AsmWriteMm6 (\r | |
6845 | IN UINT64 Value\r | |
6846 | );\r | |
6847 | \r | |
6848 | \r | |
6849 | /**\r | |
6850 | Writes the current value of 64-bit MMX Register #7 (MM7).\r | |
6851 | \r | |
6852 | Writes the current value of MM7. This function is only available on IA32 and\r | |
6853 | X64.\r | |
6854 | \r | |
6855 | @param Value The 64-bit value to write to MM7.\r | |
6856 | \r | |
6857 | **/\r | |
6858 | VOID\r | |
6859 | EFIAPI\r | |
6860 | AsmWriteMm7 (\r | |
6861 | IN UINT64 Value\r | |
6862 | );\r | |
6863 | \r | |
6864 | \r | |
6865 | /**\r | |
6866 | Reads the current value of Time Stamp Counter (TSC).\r | |
6867 | \r | |
6868 | Reads and returns the current value of TSC. This function is only available\r | |
6869 | on IA-32 and X64.\r | |
6870 | \r | |
6871 | @return The current value of TSC\r | |
6872 | \r | |
6873 | **/\r | |
6874 | UINT64\r | |
6875 | EFIAPI\r | |
6876 | AsmReadTsc (\r | |
6877 | VOID\r | |
6878 | );\r | |
6879 | \r | |
6880 | \r | |
6881 | /**\r | |
6882 | Reads the current value of a Performance Counter (PMC).\r | |
6883 | \r | |
6884 | Reads and returns the current value of performance counter specified by\r | |
6885 | Index. This function is only available on IA-32 and X64.\r | |
6886 | \r | |
6887 | @param Index The 32-bit Performance Counter index to read.\r | |
6888 | \r | |
6889 | @return The value of the PMC specified by Index.\r | |
6890 | \r | |
6891 | **/\r | |
6892 | UINT64\r | |
6893 | EFIAPI\r | |
6894 | AsmReadPmc (\r | |
6895 | IN UINT32 Index\r | |
6896 | );\r | |
6897 | \r | |
6898 | \r | |
6899 | /**\r | |
6900 | Sets up a monitor buffer that is used by AsmMwait().\r | |
6901 | \r | |
6902 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r | |
6903 | and Edx. Returns Eax. This function is only available on IA-32 and X64.\r | |
6904 | \r | |
6905 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
6906 | instruction.\r | |
6907 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
6908 | instruction.\r | |
6909 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r | |
6910 | instruction.\r | |
6911 | \r | |
6912 | @return Eax\r | |
6913 | \r | |
6914 | **/\r | |
6915 | UINTN\r | |
6916 | EFIAPI\r | |
6917 | AsmMonitor (\r | |
6918 | IN UINTN Eax,\r | |
6919 | IN UINTN Ecx,\r | |
6920 | IN UINTN Edx\r | |
6921 | );\r | |
6922 | \r | |
6923 | \r | |
6924 | /**\r | |
6925 | Executes an MWAIT instruction.\r | |
6926 | \r | |
6927 | Executes an MWAIT instruction with the register state specified by Eax and\r | |
6928 | Ecx. Returns Eax. This function is only available on IA-32 and X64.\r | |
6929 | \r | |
6930 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
6931 | instruction.\r | |
6932 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
6933 | instruction.\r | |
6934 | \r | |
6935 | @return Eax\r | |
6936 | \r | |
6937 | **/\r | |
6938 | UINTN\r | |
6939 | EFIAPI\r | |
6940 | AsmMwait (\r | |
6941 | IN UINTN Eax,\r | |
6942 | IN UINTN Ecx\r | |
6943 | );\r | |
6944 | \r | |
6945 | \r | |
6946 | /**\r | |
6947 | Executes a WBINVD instruction.\r | |
6948 | \r | |
6949 | Executes a WBINVD instruction. This function is only available on IA-32 and\r | |
6950 | X64.\r | |
6951 | \r | |
6952 | **/\r | |
6953 | VOID\r | |
6954 | EFIAPI\r | |
6955 | AsmWbinvd (\r | |
6956 | VOID\r | |
6957 | );\r | |
6958 | \r | |
6959 | \r | |
6960 | /**\r | |
6961 | Executes a INVD instruction.\r | |
6962 | \r | |
6963 | Executes a INVD instruction. This function is only available on IA-32 and\r | |
6964 | X64.\r | |
6965 | \r | |
6966 | **/\r | |
6967 | VOID\r | |
6968 | EFIAPI\r | |
6969 | AsmInvd (\r | |
6970 | VOID\r | |
6971 | );\r | |
6972 | \r | |
6973 | \r | |
6974 | /**\r | |
6975 | Flushes a cache line from all the instruction and data caches within the\r | |
6976 | coherency domain of the CPU.\r | |
6977 | \r | |
6978 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r | |
6979 | This function is only available on IA-32 and X64.\r | |
6980 | \r | |
6981 | @param LinearAddress The address of the cache line to flush. If the CPU is\r | |
6982 | in a physical addressing mode, then LinearAddress is a\r | |
6983 | physical address. If the CPU is in a virtual\r | |
6984 | addressing mode, then LinearAddress is a virtual\r | |
6985 | address.\r | |
6986 | \r | |
6987 | @return LinearAddress\r | |
6988 | **/\r | |
6989 | VOID *\r | |
6990 | EFIAPI\r | |
6991 | AsmFlushCacheLine (\r | |
6992 | IN VOID *LinearAddress\r | |
6993 | );\r | |
6994 | \r | |
6995 | \r | |
6996 | /**\r | |
6997 | Enables the 32-bit paging mode on the CPU.\r | |
6998 | \r | |
6999 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
7000 | must be properly initialized prior to calling this service. This function\r | |
7001 | assumes the current execution mode is 32-bit protected mode. This function is\r | |
7002 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r | |
7003 | transferred to the function specified by EntryPoint using the new stack\r | |
7004 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
7005 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
7006 | EntryPoint must never return.\r | |
7007 | \r | |
7008 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r | |
7009 | If EntryPoint is NULL, then ASSERT().\r | |
7010 | If NewStack is NULL, then ASSERT().\r | |
7011 | \r | |
7012 | There are a number of constraints that must be followed before calling this\r | |
7013 | function:\r | |
7014 | 1) Interrupts must be disabled.\r | |
7015 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r | |
7016 | means all descriptors must have a base of 0 and a limit of 4GB.\r | |
7017 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r | |
7018 | descriptors.\r | |
7019 | 4) CR3 must point to valid page tables that will be used once the transition\r | |
7020 | is complete, and those page tables must guarantee that the pages for this\r | |
7021 | function and the stack are identity mapped.\r | |
7022 | \r | |
7023 | @param EntryPoint A pointer to function to call with the new stack after\r | |
7024 | paging is enabled.\r | |
7025 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
7026 | function as the first parameter after paging is enabled.\r | |
7027 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
7028 | function as the second parameter after paging is enabled.\r | |
7029 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
7030 | function after paging is enabled.\r | |
7031 | \r | |
7032 | **/\r | |
7033 | VOID\r | |
7034 | EFIAPI\r | |
7035 | AsmEnablePaging32 (\r | |
7036 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
7037 | IN VOID *Context1, OPTIONAL\r | |
7038 | IN VOID *Context2, OPTIONAL\r | |
7039 | IN VOID *NewStack\r | |
7040 | );\r | |
7041 | \r | |
7042 | \r | |
7043 | /**\r | |
7044 | Disables the 32-bit paging mode on the CPU.\r | |
7045 | \r | |
7046 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r | |
7047 | mode. This function assumes the current execution mode is 32-paged protected\r | |
7048 | mode. This function is only available on IA-32. After the 32-bit paging mode\r | |
7049 | is disabled, control is transferred to the function specified by EntryPoint\r | |
7050 | using the new stack specified by NewStack and passing in the parameters\r | |
7051 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
7052 | may be NULL. The function EntryPoint must never return.\r | |
7053 | \r | |
7054 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r | |
7055 | If EntryPoint is NULL, then ASSERT().\r | |
7056 | If NewStack is NULL, then ASSERT().\r | |
7057 | \r | |
7058 | There are a number of constraints that must be followed before calling this\r | |
7059 | function:\r | |
7060 | 1) Interrupts must be disabled.\r | |
7061 | 2) The caller must be in 32-bit paged mode.\r | |
7062 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r | |
7063 | 4) CR3 must point to valid page tables that guarantee that the pages for\r | |
7064 | this function and the stack are identity mapped.\r | |
7065 | \r | |
7066 | @param EntryPoint A pointer to function to call with the new stack after\r | |
7067 | paging is disabled.\r | |
7068 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
7069 | function as the first parameter after paging is disabled.\r | |
7070 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
7071 | function as the second parameter after paging is\r | |
7072 | disabled.\r | |
7073 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
7074 | function after paging is disabled.\r | |
7075 | \r | |
7076 | **/\r | |
7077 | VOID\r | |
7078 | EFIAPI\r | |
7079 | AsmDisablePaging32 (\r | |
7080 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
7081 | IN VOID *Context1, OPTIONAL\r | |
7082 | IN VOID *Context2, OPTIONAL\r | |
7083 | IN VOID *NewStack\r | |
7084 | );\r | |
7085 | \r | |
7086 | \r | |
7087 | /**\r | |
7088 | Enables the 64-bit paging mode on the CPU.\r | |
7089 | \r | |
7090 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
7091 | must be properly initialized prior to calling this service. This function\r | |
7092 | assumes the current execution mode is 32-bit protected mode with flat\r | |
7093 | descriptors. This function is only available on IA-32. After the 64-bit\r | |
7094 | paging mode is enabled, control is transferred to the function specified by\r | |
7095 | EntryPoint using the new stack specified by NewStack and passing in the\r | |
7096 | parameters specified by Context1 and Context2. Context1 and Context2 are\r | |
7097 | optional and may be 0. The function EntryPoint must never return.\r | |
7098 | \r | |
7099 | If the current execution mode is not 32-bit protected mode with flat\r | |
7100 | descriptors, then ASSERT().\r | |
7101 | If EntryPoint is 0, then ASSERT().\r | |
7102 | If NewStack is 0, then ASSERT().\r | |
7103 | \r | |
17f695ed | 7104 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 7105 | is called. The descriptor in the GDT that this selector\r |
7106 | references must be setup for long mode.\r | |
7107 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
7108 | the new stack after paging is enabled.\r | |
7109 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
7110 | the EntryPoint function as the first parameter after\r | |
7111 | paging is enabled.\r | |
7112 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
7113 | the EntryPoint function as the second parameter after\r | |
7114 | paging is enabled.\r | |
7115 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
7116 | the EntryPoint function after paging is enabled.\r | |
7117 | \r | |
7118 | **/\r | |
7119 | VOID\r | |
7120 | EFIAPI\r | |
7121 | AsmEnablePaging64 (\r | |
17f695ed | 7122 | IN UINT16 Cs,\r |
ac644614 | 7123 | IN UINT64 EntryPoint,\r |
7124 | IN UINT64 Context1, OPTIONAL\r | |
7125 | IN UINT64 Context2, OPTIONAL\r | |
7126 | IN UINT64 NewStack\r | |
7127 | );\r | |
7128 | \r | |
7129 | \r | |
7130 | /**\r | |
7131 | Disables the 64-bit paging mode on the CPU.\r | |
7132 | \r | |
7133 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r | |
7134 | mode. This function assumes the current execution mode is 64-paging mode.\r | |
7135 | This function is only available on X64. After the 64-bit paging mode is\r | |
7136 | disabled, control is transferred to the function specified by EntryPoint\r | |
7137 | using the new stack specified by NewStack and passing in the parameters\r | |
7138 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
7139 | may be 0. The function EntryPoint must never return.\r | |
7140 | \r | |
7141 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r | |
7142 | If EntryPoint is 0, then ASSERT().\r | |
7143 | If NewStack is 0, then ASSERT().\r | |
7144 | \r | |
17f695ed | 7145 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 7146 | is called. The descriptor in the GDT that this selector\r |
7147 | references must be setup for 32-bit protected mode.\r | |
7148 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
7149 | the new stack after paging is disabled.\r | |
7150 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
7151 | the EntryPoint function as the first parameter after\r | |
7152 | paging is disabled.\r | |
7153 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
7154 | the EntryPoint function as the second parameter after\r | |
7155 | paging is disabled.\r | |
7156 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
7157 | the EntryPoint function after paging is disabled.\r | |
7158 | \r | |
7159 | **/\r | |
7160 | VOID\r | |
7161 | EFIAPI\r | |
7162 | AsmDisablePaging64 (\r | |
17f695ed | 7163 | IN UINT16 Cs,\r |
ac644614 | 7164 | IN UINT32 EntryPoint,\r |
7165 | IN UINT32 Context1, OPTIONAL\r | |
7166 | IN UINT32 Context2, OPTIONAL\r | |
7167 | IN UINT32 NewStack\r | |
7168 | );\r | |
7169 | \r | |
7170 | \r | |
7171 | //\r | |
7172 | // 16-bit thunking services\r | |
7173 | //\r | |
7174 | \r | |
7175 | /**\r | |
7176 | Retrieves the properties for 16-bit thunk functions.\r | |
7177 | \r | |
7178 | Computes the size of the buffer and stack below 1MB required to use the\r | |
7179 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r | |
7180 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r | |
7181 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r | |
7182 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r | |
7183 | of bytes that need to be passed to the 16-bit real mode code.\r | |
7184 | \r | |
7185 | If RealModeBufferSize is NULL, then ASSERT().\r | |
7186 | If ExtraStackSize is NULL, then ASSERT().\r | |
7187 | \r | |
7188 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r | |
7189 | required to use the 16-bit thunk functions.\r | |
7190 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r | |
7191 | that the 16-bit thunk functions require for\r | |
7192 | temporary storage in the transition to and from\r | |
7193 | 16-bit real mode.\r | |
7194 | \r | |
7195 | **/\r | |
7196 | VOID\r | |
7197 | EFIAPI\r | |
7198 | AsmGetThunk16Properties (\r | |
7199 | OUT UINT32 *RealModeBufferSize,\r | |
7200 | OUT UINT32 *ExtraStackSize\r | |
7201 | );\r | |
7202 | \r | |
7203 | \r | |
7204 | /**\r | |
7205 | Prepares all structures a code required to use AsmThunk16().\r | |
7206 | \r | |
7207 | Prepares all structures and code required to use AsmThunk16().\r | |
7208 | \r | |
7209 | If ThunkContext is NULL, then ASSERT().\r | |
7210 | \r | |
7211 | @param ThunkContext A pointer to the context structure that describes the\r | |
7212 | 16-bit real mode code to call.\r | |
7213 | \r | |
7214 | **/\r | |
7215 | VOID\r | |
7216 | EFIAPI\r | |
7217 | AsmPrepareThunk16 (\r | |
7218 | OUT THUNK_CONTEXT *ThunkContext\r | |
7219 | );\r | |
7220 | \r | |
7221 | \r | |
7222 | /**\r | |
7223 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
7224 | \r | |
7225 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
17f695ed | 7226 | AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r |
7227 | This function must be called with interrupts disabled.\r | |
7228 | \r | |
7229 | The register state from the RealModeState field of ThunkContext is restored just prior \r | |
7230 | to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r | |
7231 | which is used to set the interrupt state when a 16-bit real mode entry point is called.\r | |
7232 | Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r | |
7233 | The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r | |
7234 | the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r | |
7235 | The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r | |
7236 | so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r | |
7237 | and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r | |
7238 | point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r | |
7239 | after the RETF instruction is executed.\r | |
7240 | \r | |
7241 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7242 | or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r | |
7243 | the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r | |
7244 | \r | |
7245 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7246 | then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r | |
7247 | This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r | |
7248 | \r | |
7249 | If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r | |
7250 | is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r | |
7251 | \r | |
7252 | If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r | |
7253 | ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r | |
7254 | disable the A20 mask.\r | |
7255 | \r | |
7256 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r | |
7257 | ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r | |
7258 | then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7259 | \r | |
7260 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r | |
7261 | ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7262 | \r | |
ac644614 | 7263 | If ThunkContext is NULL, then ASSERT().\r |
7264 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r | |
17f695ed | 7265 | If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r |
7266 | ThunkAttributes, then ASSERT().\r | |
ac644614 | 7267 | \r |
7268 | @param ThunkContext A pointer to the context structure that describes the\r | |
7269 | 16-bit real mode code to call.\r | |
7270 | \r | |
7271 | **/\r | |
7272 | VOID\r | |
7273 | EFIAPI\r | |
7274 | AsmThunk16 (\r | |
7275 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7276 | );\r | |
7277 | \r | |
7278 | \r | |
7279 | /**\r | |
7280 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7281 | control to a 16-bit real mode entry point, and returns the results.\r | |
7282 | \r | |
7283 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7284 | control to a 16-bit real mode entry point, and returns the results. If the\r | |
7285 | caller only need to perform a single 16-bit real mode thunk, then this\r | |
7286 | service should be used. If the caller intends to make more than one 16-bit\r | |
7287 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r | |
7288 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r | |
7289 | \r | |
17f695ed | 7290 | See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.\r |
ac644614 | 7291 | \r |
7292 | @param ThunkContext A pointer to the context structure that describes the\r | |
7293 | 16-bit real mode code to call.\r | |
7294 | \r | |
7295 | **/\r | |
7296 | VOID\r | |
7297 | EFIAPI\r | |
7298 | AsmPrepareAndThunk16 (\r | |
7299 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7300 | );\r | |
7301 | \r | |
ac644614 | 7302 | #endif\r |
e3a7917f | 7303 | #endif\r |
ac644614 | 7304 | \r |
7305 | \r |