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5879b875 | 1 | /** @file\r |
2 | This file declares Sec Platform Information PPI.\r | |
3 | \r | |
d7132512 LG |
4 | This service is the primary handoff state into the PEI Foundation. \r |
5 | The Security (SEC) component creates the early, transitory memory \r | |
6 | environment and also encapsulates knowledge of at least the \r | |
7 | location of the Boot Firmware Volume (BFV).\r | |
8 | \r | |
9df063a0 | 9 | Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r |
af2dc6a7 | 10 | This program and the accompanying materials are licensed and made available under \r |
11 | the terms and conditions of the BSD License that accompanies this distribution. \r | |
12 | The full text of the license may be found at\r | |
13 | http://opensource.org/licenses/bsd-license.php. \r | |
5879b875 | 14 | \r |
af2dc6a7 | 15 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r |
16 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
5879b875 | 17 | \r |
5879b875 | 18 | @par Revision Reference:\r |
0047820e | 19 | This PPI is introduced in PI Version 1.0.\r |
5879b875 | 20 | \r |
21 | **/\r | |
22 | \r | |
23 | #ifndef __SEC_PLATFORM_INFORMATION_PPI_H__\r | |
24 | #define __SEC_PLATFORM_INFORMATION_PPI_H__\r | |
25 | \r | |
26 | #define EFI_SEC_PLATFORM_INFORMATION_GUID \\r | |
27 | { \\r | |
28 | 0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \\r | |
29 | }\r | |
30 | \r | |
31 | typedef struct _EFI_SEC_PLATFORM_INFORMATION_PPI EFI_SEC_PLATFORM_INFORMATION_PPI;\r | |
32 | \r | |
33 | \r | |
06889842 | 34 | ///\r |
35 | /// EFI_HEALTH_FLAGS\r | |
36 | /// Contains information generated by microcode, hardware, and/or the Itanium\r | |
37 | /// processor PAL code about the state of the processor upon reset.\r | |
38 | ///\r | |
5879b875 | 39 | typedef union {\r |
40 | struct {\r | |
13c38031 | 41 | ///\r |
42 | /// A 2-bit field indicating self-test state after reset.\r | |
43 | ///\r | |
5879b875 | 44 | UINT32 Status : 2;\r |
13c38031 | 45 | ///\r |
46 | /// A 1-bit field indicating whether testing has occurred.\r | |
47 | /// If this field is zero, the processor has not been tested,\r | |
48 | /// and no further fields in the self-test State parameter are valid.\r | |
49 | ///\r | |
5879b875 | 50 | UINT32 Tested : 1;\r |
13c38031 | 51 | ///\r |
52 | /// Reserved 13 bits.\r | |
53 | ///\r | |
5879b875 | 54 | UINT32 Reserved1 :13;\r |
13c38031 | 55 | ///\r |
af2dc6a7 | 56 | /// A 1-bit field. If set to 1, this indicates that virtual\r |
13c38031 | 57 | /// memory features are not available.\r |
58 | ///\r | |
5879b875 | 59 | UINT32 VirtualMemoryUnavailable : 1;\r |
13c38031 | 60 | ///\r |
af2dc6a7 | 61 | /// A 1-bit field. If set to 1, this indicates that IA-32 execution\r |
13c38031 | 62 | /// is not available.\r |
63 | ///\r | |
5879b875 | 64 | UINT32 Ia32ExecutionUnavailable : 1;\r |
13c38031 | 65 | ///\r |
af2dc6a7 | 66 | /// A 1-bit field. If set to 1, this indicates that the floating\r |
13c38031 | 67 | /// point unit is not available.\r |
68 | ///\r | |
5879b875 | 69 | UINT32 FloatingPointUnavailable : 1;\r |
13c38031 | 70 | ///\r |
af2dc6a7 | 71 | /// A 1-bit field. If set to 1, this indicates miscellaneous\r |
13c38031 | 72 | /// functional failure other than vm, ia, or fp.\r |
73 | /// The test status field provides additional information on\r | |
74 | /// test failures when the State field returns a value of\r | |
75 | /// performance restricted or functionally restricted.\r | |
76 | /// The value returned is implementation dependent.\r | |
77 | ///\r | |
5879b875 | 78 | UINT32 MiscFeaturesUnavailable : 1;\r |
13c38031 | 79 | ///\r |
80 | /// Reserved 12 bits.\r | |
81 | ///\r | |
5879b875 | 82 | UINT32 Reserved2 :12;\r |
83 | } Bits;\r | |
84 | UINT32 Uint32;\r | |
85 | } EFI_HEALTH_FLAGS;\r | |
86 | \r | |
d936a70c | 87 | #define NORMAL_BOOT_CALL 0x0\r |
88 | #define RECOVERY_CHECK_CALL 0x3\r | |
89 | \r | |
53f32495 | 90 | typedef EFI_HEALTH_FLAGS X64_HANDOFF_STATUS;\r |
91 | typedef EFI_HEALTH_FLAGS IA32_HANDOFF_STATUS;\r | |
92 | ///\r | |
93 | /// The hand-off status structure for Itanium architecture.\r | |
94 | ///\r | |
d936a70c | 95 | typedef struct {\r |
53f32495 | 96 | ///\r |
97 | /// SALE_ENTRY state : 3 = Recovery_Check\r | |
98 | /// and 0 = RESET or Normal_Boot phase.\r | |
99 | ///\r | |
d936a70c | 100 | UINT8 BootPhase;\r |
53f32495 | 101 | ///\r |
102 | /// Firmware status on entry to SALE.\r | |
103 | ///\r | |
d936a70c | 104 | UINT8 FWStatus;\r |
105 | UINT16 Reserved1;\r | |
106 | UINT32 Reserved2;\r | |
53f32495 | 107 | ///\r |
108 | /// Geographically significant unique processor ID assigned by PAL.\r | |
109 | ///\r | |
d936a70c | 110 | UINT16 ProcId;\r |
111 | UINT16 Reserved3;\r | |
112 | UINT8 IdMask;\r | |
113 | UINT8 EidMask;\r | |
114 | UINT16 Reserved4;\r | |
53f32495 | 115 | ///\r |
af2dc6a7 | 116 | /// Address to make PAL calls.\r |
53f32495 | 117 | ///\r |
d936a70c | 118 | UINT64 PalCallAddress;\r |
53f32495 | 119 | ///\r |
120 | /// If the entry state is RECOVERY_CHECK, this contains the PAL_RESET\r | |
121 | /// return address, and if entry state is RESET, this contains\r | |
122 | /// address for PAL_authentication call.\r | |
123 | ///\r | |
d936a70c | 124 | UINT64 PalSpecialAddress;\r |
53f32495 | 125 | ///\r |
af2dc6a7 | 126 | /// GR35 from PALE_EXIT state.\r |
53f32495 | 127 | ///\r |
d936a70c | 128 | UINT64 SelfTestStatus;\r |
53f32495 | 129 | ///\r |
130 | /// GR37 from PALE_EXIT state.\r | |
131 | ///\r | |
d936a70c | 132 | UINT64 SelfTestControl;\r |
133 | UINT64 MemoryBufferRequired;\r | |
53f32495 | 134 | } ITANIUM_HANDOFF_STATUS;\r |
d936a70c | 135 | \r |
13c38031 | 136 | ///\r |
af2dc6a7 | 137 | /// EFI_SEC_PLATFORM_INFORMATION_RECORD.\r |
13c38031 | 138 | ///\r |
53f32495 | 139 | typedef union {\r |
140 | IA32_HANDOFF_STATUS IA32HealthFlags;\r | |
141 | X64_HANDOFF_STATUS x64HealthFlags;\r | |
142 | ITANIUM_HANDOFF_STATUS ItaniumHealthFlags;\r | |
5879b875 | 143 | } EFI_SEC_PLATFORM_INFORMATION_RECORD;\r |
144 | \r | |
5879b875 | 145 | /**\r |
146 | This interface conveys state information out of the Security (SEC) phase into PEI.\r | |
147 | \r | |
13c38031 | 148 | This service is published by the SEC phase. The SEC phase handoff has an optional\r |
149 | EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the\r | |
150 | PEI Foundation. As such, if the platform supports the built-in self test (BIST) on IA-32 Intel\r | |
151 | architecture or the PAL-A handoff state for Itanium architecture, this information is encapsulated\r | |
152 | into the data structure abstracted by this service. This information is collected for the boot-strap\r | |
af2dc6a7 | 153 | processor (BSP) on IA-32. For Itanium architecture, it is available on all processors that execute\r |
13c38031 | 154 | the PEI Foundation.\r |
155 | \r | |
af2dc6a7 | 156 | @param PeiServices The pointer to the PEI Services Table.\r |
157 | @param StructureSize The pointer to the variable describing size of the input buffer.\r | |
158 | @param PlatformInformationRecord The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.\r | |
5879b875 | 159 | \r |
13c38031 | 160 | @retval EFI_SUCCESS The data was successfully returned.\r |
53f32495 | 161 | @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to\r |
162 | hold the record is returned in StructureSize.\r | |
5879b875 | 163 | \r |
164 | **/\r | |
165 | typedef\r | |
166 | EFI_STATUS\r | |
8b13229b | 167 | (EFIAPI *EFI_SEC_PLATFORM_INFORMATION)(\r |
00edb218 A |
168 | IN CONST EFI_PEI_SERVICES **PeiServices,\r |
169 | IN OUT UINT64 *StructureSize,\r | |
170 | OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord\r | |
5879b875 | 171 | );\r |
172 | \r | |
173 | \r | |
13c38031 | 174 | ///\r |
175 | /// This service abstracts platform-specific information. It is necessary \r | |
176 | /// to convey this information to the PEI Foundation so that it can \r | |
177 | /// discover where to begin dispatching PEIMs.\r | |
178 | ///\r | |
5879b875 | 179 | struct _EFI_SEC_PLATFORM_INFORMATION_PPI {\r |
180 | EFI_SEC_PLATFORM_INFORMATION PlatformInformation;\r | |
181 | };\r | |
182 | \r | |
183 | \r | |
184 | extern EFI_GUID gEfiSecPlatformInformationPpiGuid;\r | |
185 | \r | |
186 | #endif\r |