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5879b875 1/** @file\r
2 This file declares Sec Platform Information PPI.\r
3\r
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4 This service is the primary handoff state into the PEI Foundation.\r
5 The Security (SEC) component creates the early, transitory memory\r
6 environment and also encapsulates knowledge of at least the\r
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7 location of the Boot Firmware Volume (BFV).\r
8\r
1c8e0459 9Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
9344f092 10SPDX-License-Identifier: BSD-2-Clause-Patent\r
5879b875 11\r
5879b875 12 @par Revision Reference:\r
0047820e 13 This PPI is introduced in PI Version 1.0.\r
5879b875 14\r
15**/\r
16\r
17#ifndef __SEC_PLATFORM_INFORMATION_PPI_H__\r
18#define __SEC_PLATFORM_INFORMATION_PPI_H__\r
19\r
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20#include <Pi/PiPeiCis.h>\r
21\r
5879b875 22#define EFI_SEC_PLATFORM_INFORMATION_GUID \\r
23 { \\r
24 0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \\r
25 }\r
26\r
27typedef struct _EFI_SEC_PLATFORM_INFORMATION_PPI EFI_SEC_PLATFORM_INFORMATION_PPI;\r
28\r
06889842 29///\r
30/// EFI_HEALTH_FLAGS\r
31/// Contains information generated by microcode, hardware, and/or the Itanium\r
32/// processor PAL code about the state of the processor upon reset.\r
33///\r
5879b875 34typedef union {\r
35 struct {\r
13c38031 36 ///\r
37 /// A 2-bit field indicating self-test state after reset.\r
38 ///\r
2f88bd3a 39 UINT32 Status : 2;\r
13c38031 40 ///\r
41 /// A 1-bit field indicating whether testing has occurred.\r
42 /// If this field is zero, the processor has not been tested,\r
43 /// and no further fields in the self-test State parameter are valid.\r
44 ///\r
2f88bd3a 45 UINT32 Tested : 1;\r
13c38031 46 ///\r
47 /// Reserved 13 bits.\r
48 ///\r
2f88bd3a 49 UINT32 Reserved1 : 13;\r
13c38031 50 ///\r
af2dc6a7 51 /// A 1-bit field. If set to 1, this indicates that virtual\r
13c38031 52 /// memory features are not available.\r
53 ///\r
2f88bd3a 54 UINT32 VirtualMemoryUnavailable : 1;\r
13c38031 55 ///\r
af2dc6a7 56 /// A 1-bit field. If set to 1, this indicates that IA-32 execution\r
13c38031 57 /// is not available.\r
58 ///\r
2f88bd3a 59 UINT32 Ia32ExecutionUnavailable : 1;\r
13c38031 60 ///\r
af2dc6a7 61 /// A 1-bit field. If set to 1, this indicates that the floating\r
13c38031 62 /// point unit is not available.\r
63 ///\r
2f88bd3a 64 UINT32 FloatingPointUnavailable : 1;\r
13c38031 65 ///\r
af2dc6a7 66 /// A 1-bit field. If set to 1, this indicates miscellaneous\r
13c38031 67 /// functional failure other than vm, ia, or fp.\r
68 /// The test status field provides additional information on\r
69 /// test failures when the State field returns a value of\r
70 /// performance restricted or functionally restricted.\r
71 /// The value returned is implementation dependent.\r
72 ///\r
2f88bd3a 73 UINT32 MiscFeaturesUnavailable : 1;\r
13c38031 74 ///\r
75 /// Reserved 12 bits.\r
76 ///\r
2f88bd3a 77 UINT32 Reserved2 : 12;\r
5879b875 78 } Bits;\r
2f88bd3a 79 UINT32 Uint32;\r
5879b875 80} EFI_HEALTH_FLAGS;\r
81\r
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82#define NORMAL_BOOT_CALL 0x0\r
83#define RECOVERY_CHECK_CALL 0x3\r
d936a70c 84\r
53f32495 85typedef EFI_HEALTH_FLAGS X64_HANDOFF_STATUS;\r
86typedef EFI_HEALTH_FLAGS IA32_HANDOFF_STATUS;\r
87///\r
88/// The hand-off status structure for Itanium architecture.\r
89///\r
d936a70c 90typedef struct {\r
53f32495 91 ///\r
92 /// SALE_ENTRY state : 3 = Recovery_Check\r
93 /// and 0 = RESET or Normal_Boot phase.\r
94 ///\r
2f88bd3a 95 UINT8 BootPhase;\r
53f32495 96 ///\r
97 /// Firmware status on entry to SALE.\r
98 ///\r
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99 UINT8 FWStatus;\r
100 UINT16 Reserved1;\r
101 UINT32 Reserved2;\r
53f32495 102 ///\r
103 /// Geographically significant unique processor ID assigned by PAL.\r
104 ///\r
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105 UINT16 ProcId;\r
106 UINT16 Reserved3;\r
107 UINT8 IdMask;\r
108 UINT8 EidMask;\r
109 UINT16 Reserved4;\r
53f32495 110 ///\r
af2dc6a7 111 /// Address to make PAL calls.\r
53f32495 112 ///\r
2f88bd3a 113 UINT64 PalCallAddress;\r
53f32495 114 ///\r
115 /// If the entry state is RECOVERY_CHECK, this contains the PAL_RESET\r
116 /// return address, and if entry state is RESET, this contains\r
117 /// address for PAL_authentication call.\r
118 ///\r
2f88bd3a 119 UINT64 PalSpecialAddress;\r
53f32495 120 ///\r
af2dc6a7 121 /// GR35 from PALE_EXIT state.\r
53f32495 122 ///\r
2f88bd3a 123 UINT64 SelfTestStatus;\r
53f32495 124 ///\r
125 /// GR37 from PALE_EXIT state.\r
126 ///\r
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127 UINT64 SelfTestControl;\r
128 UINT64 MemoryBufferRequired;\r
53f32495 129} ITANIUM_HANDOFF_STATUS;\r
d936a70c 130\r
13c38031 131///\r
af2dc6a7 132/// EFI_SEC_PLATFORM_INFORMATION_RECORD.\r
13c38031 133///\r
53f32495 134typedef union {\r
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135 IA32_HANDOFF_STATUS IA32HealthFlags;\r
136 X64_HANDOFF_STATUS x64HealthFlags;\r
137 ITANIUM_HANDOFF_STATUS ItaniumHealthFlags;\r
5879b875 138} EFI_SEC_PLATFORM_INFORMATION_RECORD;\r
139\r
5879b875 140/**\r
141 This interface conveys state information out of the Security (SEC) phase into PEI.\r
142\r
13c38031 143 This service is published by the SEC phase. The SEC phase handoff has an optional\r
144 EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the\r
145 PEI Foundation. As such, if the platform supports the built-in self test (BIST) on IA-32 Intel\r
146 architecture or the PAL-A handoff state for Itanium architecture, this information is encapsulated\r
147 into the data structure abstracted by this service. This information is collected for the boot-strap\r
af2dc6a7 148 processor (BSP) on IA-32. For Itanium architecture, it is available on all processors that execute\r
13c38031 149 the PEI Foundation.\r
150\r
af2dc6a7 151 @param PeiServices The pointer to the PEI Services Table.\r
152 @param StructureSize The pointer to the variable describing size of the input buffer.\r
153 @param PlatformInformationRecord The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.\r
5879b875 154\r
13c38031 155 @retval EFI_SUCCESS The data was successfully returned.\r
53f32495 156 @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to\r
157 hold the record is returned in StructureSize.\r
5879b875 158\r
159**/\r
160typedef\r
161EFI_STATUS\r
8b13229b 162(EFIAPI *EFI_SEC_PLATFORM_INFORMATION)(\r
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163 IN CONST EFI_PEI_SERVICES **PeiServices,\r
164 IN OUT UINT64 *StructureSize,\r
165 OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord\r
2f88bd3a 166 );\r
5879b875 167\r
13c38031 168///\r
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169/// This service abstracts platform-specific information. It is necessary\r
170/// to convey this information to the PEI Foundation so that it can\r
13c38031 171/// discover where to begin dispatching PEIMs.\r
172///\r
5879b875 173struct _EFI_SEC_PLATFORM_INFORMATION_PPI {\r
2f88bd3a 174 EFI_SEC_PLATFORM_INFORMATION PlatformInformation;\r
5879b875 175};\r
176\r
2f88bd3a 177extern EFI_GUID gEfiSecPlatformInformationPpiGuid;\r
5879b875 178\r
179#endif\r