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f1baef62 | 1 | /** @file\r |
2 | CpuBreakpoint function.\r | |
3 | \r | |
dc4d4230 | 4 | Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>\r |
9344f092 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
f1baef62 | 6 | \r |
7 | **/\r | |
8 | \r | |
42eedea9 | 9 | /**\r |
10 | Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.\r | |
11 | **/\r | |
7e43ed89 | 12 | \r |
dc4d4230 DB |
13 | #include <Library/RegisterFilterLib.h>\r |
14 | \r | |
2f88bd3a MK |
15 | void\r |
16 | __writemsr (\r | |
17 | unsigned long Register,\r | |
18 | unsigned __int64 Value\r | |
19 | );\r | |
f1baef62 | 20 | \r |
21 | #pragma intrinsic(__writemsr)\r | |
22 | \r | |
42eedea9 | 23 | /**\r |
24 | Write data to MSR.\r | |
25 | \r | |
127010dd | 26 | @param Index The register index of MSR.\r |
42eedea9 | 27 | @param Value Data wants to be written.\r |
28 | \r | |
29 | @return Value written to MSR.\r | |
30 | \r | |
31 | **/\r | |
f1baef62 | 32 | UINT64\r |
33 | EFIAPI\r | |
34 | AsmWriteMsr64 (\r | |
35 | IN UINT32 Index,\r | |
36 | IN UINT64 Value\r | |
37 | )\r | |
38 | {\r | |
2f88bd3a | 39 | BOOLEAN Flag;\r |
dc4d4230 DB |
40 | \r |
41 | Flag = FilterBeforeMsrWrite (Index, &Value);\r | |
42 | if (Flag) {\r | |
43 | __writemsr (Index, Value);\r | |
44 | }\r | |
2f88bd3a | 45 | \r |
dc4d4230 DB |
46 | FilterAfterMsrWrite (Index, &Value);\r |
47 | \r | |
f1baef62 | 48 | return Value;\r |
49 | }\r |