OvmfPkg/LockBoxLib: use PcdAcpiS3Enable to detect S3 support

[mirror_edk2.git] / OvmfPkg / Library / PciHostBridgeLib / PciHostBridgeLib.c

/** @file\r
  OVMF's instance of the PCI Host Bridge Library.\r
\r
  Copyright (C) 2016, Red Hat, Inc.\r
  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
#include <IndustryStandard/Pci.h>                     // PCI_MAX_BUS\r
#include <IndustryStandard/Q35MchIch9.h>              // INTEL_Q35_MCH_DEVIC...\r
#include <Library/BaseMemoryLib.h>                    // ZeroMem()\r
#include <Library/PcdLib.h>                           // PcdGet64()\r
#include <Library/PciHostBridgeLib.h>                 // PCI_ROOT_BRIDGE_APE...\r
#include <Library/PciHostBridgeUtilityLib.h>          // PciHostBridgeUtilit...\r
#include <Protocol/PciHostBridgeResourceAllocation.h> // EFI_PCI_HOST_BRIDGE...\r
#include <Protocol/PciRootBridgeIo.h>                 // EFI_PCI_ATTRIBUTE_I...\r
\r
STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 };\r
\r
\r
/**\r
  Return all the root bridge instances in an array.\r
\r
  @param Count  Return the count of root bridge instances.\r
\r
  @return All the root bridge instances in an array.\r
          The array should be passed into PciHostBridgeFreeRootBridges()\r
          when it's not used.\r
**/\r
PCI_ROOT_BRIDGE *\r
EFIAPI\r
PciHostBridgeGetRootBridges (\r
  UINTN *Count\r
  )\r
{\r
  UINT64               Attributes;\r
  UINT64               AllocationAttributes;\r
  PCI_ROOT_BRIDGE_APERTURE Io;\r
  PCI_ROOT_BRIDGE_APERTURE Mem;\r
  PCI_ROOT_BRIDGE_APERTURE MemAbove4G;\r
\r
  ZeroMem (&Io, sizeof (Io));\r
  ZeroMem (&Mem, sizeof (Mem));\r
  ZeroMem (&MemAbove4G, sizeof (MemAbove4G));\r
\r
  Attributes = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |\r
    EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |\r
    EFI_PCI_ATTRIBUTE_ISA_IO_16 |\r
    EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |\r
    EFI_PCI_ATTRIBUTE_VGA_MEMORY |\r
    EFI_PCI_ATTRIBUTE_VGA_IO_16 |\r
    EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
\r
  AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;\r
  if (PcdGet64 (PcdPciMmio64Size) > 0) {\r
    AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;\r
    MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);\r
    MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +\r
                       PcdGet64 (PcdPciMmio64Size) - 1;\r
  } else {\r
    CopyMem (&MemAbove4G, &mNonExistAperture, sizeof (mNonExistAperture));\r
  }\r
\r
  Io.Base = PcdGet64 (PcdPciIoBase);\r
  Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);\r
  Mem.Base = PcdGet64 (PcdPciMmio32Base);\r
  Mem.Limit = PcdGet64 (PcdPciMmio32Base) + (PcdGet64 (PcdPciMmio32Size) - 1);\r
\r
  return PciHostBridgeUtilityGetRootBridges (\r
    Count,\r
    Attributes,\r
    AllocationAttributes,\r
    FALSE,\r
    PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,\r
    0,\r
    PCI_MAX_BUS,\r
    &Io,\r
    &Mem,\r
    &MemAbove4G,\r
    &mNonExistAperture,\r
    &mNonExistAperture\r
    );\r
}\r
\r
\r
/**\r
  Free the root bridge instances array returned from\r
  PciHostBridgeGetRootBridges().\r
\r
  @param  The root bridge instances array.\r
  @param  The count of the array.\r
**/\r
VOID\r
EFIAPI\r
PciHostBridgeFreeRootBridges (\r
  PCI_ROOT_BRIDGE *Bridges,\r
  UINTN           Count\r
  )\r
{\r
  PciHostBridgeUtilityFreeRootBridges (Bridges, Count);\r
}\r
\r
\r
/**\r
  Inform the platform that the resource conflict happens.\r
\r
  @param HostBridgeHandle Handle of the Host Bridge.\r
  @param Configuration    Pointer to PCI I/O and PCI memory resource\r
                          descriptors. The Configuration contains the resources\r
                          for all the root bridges. The resource for each root\r
                          bridge is terminated with END descriptor and an\r
                          additional END is appended indicating the end of the\r
                          entire resources. The resource descriptor field\r
                          values follow the description in\r
                          EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
                          .SubmitResources().\r
**/\r
VOID\r
EFIAPI\r
PciHostBridgeResourceConflict (\r
  EFI_HANDLE                        HostBridgeHandle,\r
  VOID                              *Configuration\r
  )\r
{\r
  PciHostBridgeUtilityResourceConflict (Configuration);\r
}\r