]>
Commit | Line | Data |
---|---|---|
7b202cb0 | 1 | ## @file\r |
49ba9447 | 2 | # Open Virtual Machine Firmware: FDF\r |
3 | #\r | |
56d7640a | 4 | # Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r |
49ba9447 | 5 | #\r |
56d7640a | 6 | # This program and the accompanying materials\r |
49ba9447 | 7 | # are licensed and made available under the terms and conditions of the BSD License\r |
8 | # which accompanies this distribution. The full text of the license may be found at\r | |
9 | # http://opensource.org/licenses/bsd-license.php\r | |
10 | #\r | |
11 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | #\r | |
7b202cb0 | 14 | ##\r |
49ba9447 | 15 | \r |
16 | ################################################################################\r | |
c1c2669c | 17 | [FD.SEC]\r |
18 | BaseAddress = 0xFFFEE000\r | |
19 | Size = 0x00012000\r | |
20 | ErasePolarity = 1\r | |
21 | BlockSize = 0x1000\r | |
22 | NumBlocks = 0x12\r | |
23 | \r | |
24 | 0x0|0x12000\r | |
25 | FV = SECFV\r | |
26 | \r | |
49ba9447 | 27 | ################################################################################\r |
c1c2669c | 28 | \r |
29 | [FD.MEMFD]\r | |
30 | BaseAddress = 0x800000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase\r | |
31 | Size = 0x400000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize\r | |
49ba9447 | 32 | ErasePolarity = 1\r |
33 | BlockSize = 0x10000\r | |
c1c2669c | 34 | NumBlocks = 0x40\r |
49ba9447 | 35 | \r |
c1c2669c | 36 | 0x0|0x400000\r |
49ba9447 | 37 | FV = MAINFV\r |
38 | \r | |
39 | ################################################################################\r | |
c1c2669c | 40 | \r |
41 | [FV.SECFV]\r | |
42 | BlockSize = 0x1000\r | |
43 | FvAlignment = 16\r | |
44 | ERASE_POLARITY = 1\r | |
45 | MEMORY_MAPPED = TRUE\r | |
46 | STICKY_WRITE = TRUE\r | |
47 | LOCK_CAP = TRUE\r | |
48 | LOCK_STATUS = TRUE\r | |
49 | WRITE_DISABLED_CAP = TRUE\r | |
50 | WRITE_ENABLED_CAP = TRUE\r | |
51 | WRITE_STATUS = TRUE\r | |
52 | WRITE_LOCK_CAP = TRUE\r | |
53 | WRITE_LOCK_STATUS = TRUE\r | |
54 | READ_DISABLED_CAP = TRUE\r | |
55 | READ_ENABLED_CAP = TRUE\r | |
56 | READ_STATUS = TRUE\r | |
57 | READ_LOCK_CAP = TRUE\r | |
58 | READ_LOCK_STATUS = TRUE\r | |
59 | \r | |
49ba9447 | 60 | #\r |
c1c2669c | 61 | # SEC Phase modules\r |
49ba9447 | 62 | #\r |
c1c2669c | 63 | # The code in this FV handles the initial firmware startup, and\r |
64 | # decompresses the MAINFV which handles the majority of the boot sequence.\r | |
49ba9447 | 65 | #\r |
c1c2669c | 66 | INF OvmfPkg/Sec/SecMain.inf\r |
67 | \r | |
d79d2cd2 | 68 | INF RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf\r |
c1c2669c | 69 | \r |
49ba9447 | 70 | ################################################################################\r |
c1c2669c | 71 | [FV.MAINFV]\r |
72 | BlockSize = 0x10000\r | |
73 | FvAlignment = 16\r | |
49ba9447 | 74 | ERASE_POLARITY = 1\r |
75 | MEMORY_MAPPED = TRUE\r | |
76 | STICKY_WRITE = TRUE\r | |
77 | LOCK_CAP = TRUE\r | |
78 | LOCK_STATUS = TRUE\r | |
79 | WRITE_DISABLED_CAP = TRUE\r | |
80 | WRITE_ENABLED_CAP = TRUE\r | |
81 | WRITE_STATUS = TRUE\r | |
82 | WRITE_LOCK_CAP = TRUE\r | |
83 | WRITE_LOCK_STATUS = TRUE\r | |
84 | READ_DISABLED_CAP = TRUE\r | |
85 | READ_ENABLED_CAP = TRUE\r | |
86 | READ_STATUS = TRUE\r | |
87 | READ_LOCK_CAP = TRUE\r | |
88 | READ_LOCK_STATUS = TRUE\r | |
89 | \r | |
90 | #\r | |
c1c2669c | 91 | # Files to be placed in MAIN FV\r |
49ba9447 | 92 | #\r |
93 | # This firmware volume will have files placed in it uncompressed,\r | |
94 | # and then then entire firmware volume will be compressed in a\r | |
95 | # single compression operation in order to achieve better\r | |
96 | # overall compression.\r | |
97 | #\r | |
98 | \r | |
c1c2669c | 99 | APRIORI PEI {\r |
100 | INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r | |
101 | }\r | |
102 | \r | |
c1c2669c | 103 | #\r |
104 | # PEI Phase modules\r | |
105 | #\r | |
106 | INF MdeModulePkg/Core/Pei/PeiMain.inf\r | |
107 | INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r | |
108 | INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r | |
109 | INF OvmfPkg/PlatformPei/PlatformPei.inf\r | |
110 | INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r | |
111 | \r | |
2ec2dee3 LG |
112 | FILE FV_IMAGE = A4EF5A93-3F1B-4232-A1C4-F0910E6D1D9C {\r |
113 | SECTION COMPRESS PI_NONE {\r | |
114 | SECTION FV_IMAGE = DXEFV\r | |
115 | }\r | |
c29f6c05 | 116 | }\r |
117 | \r | |
118 | ################################################################################\r | |
119 | \r | |
120 | [FV.DXEFV]\r | |
121 | BlockSize = 0x10000\r | |
122 | FvAlignment = 16\r | |
123 | ERASE_POLARITY = 1\r | |
124 | MEMORY_MAPPED = TRUE\r | |
125 | STICKY_WRITE = TRUE\r | |
126 | LOCK_CAP = TRUE\r | |
127 | LOCK_STATUS = TRUE\r | |
128 | WRITE_DISABLED_CAP = TRUE\r | |
129 | WRITE_ENABLED_CAP = TRUE\r | |
130 | WRITE_STATUS = TRUE\r | |
131 | WRITE_LOCK_CAP = TRUE\r | |
132 | WRITE_LOCK_STATUS = TRUE\r | |
133 | READ_DISABLED_CAP = TRUE\r | |
134 | READ_ENABLED_CAP = TRUE\r | |
135 | READ_STATUS = TRUE\r | |
136 | READ_LOCK_CAP = TRUE\r | |
137 | READ_LOCK_STATUS = TRUE\r | |
138 | \r | |
139 | APRIORI DXE {\r | |
140 | INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r | |
c29f6c05 | 141 | }\r |
142 | \r | |
49ba9447 | 143 | #\r |
144 | # DXE Phase modules\r | |
145 | #\r | |
146 | INF MdeModulePkg/Core/Dxe/DxeMain.inf\r | |
147 | \r | |
148 | INF IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf\r | |
149 | INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r | |
150 | \r | |
151 | INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r | |
152 | INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r | |
c1c2669c | 153 | INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf\r |
e471bf1f | 154 | INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r |
49ba9447 | 155 | INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r |
afbb91aa | 156 | INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r |
49ba9447 | 157 | INF UefiCpuPkg/CpuDxe/CpuDxe.inf\r |
158 | INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf\r | |
159 | INF PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf\r | |
4ad90a84 | 160 | INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r |
49ba9447 | 161 | INF PcAtChipsetPkg/KbcResetDxe/Reset.inf\r |
162 | INF MdeModulePkg/Universal/Metronome/Metronome.inf\r | |
71095b27 | 163 | INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r |
49ba9447 | 164 | \r |
efd82c57 | 165 | INF OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf\r |
27f58ea1 | 166 | INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf\r |
167 | INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r | |
168 | INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r | |
49ba9447 | 169 | INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r |
170 | INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r | |
171 | INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r | |
172 | INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r | |
173 | INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r | |
174 | INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r | |
175 | INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r | |
176 | INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r | |
177 | INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r | |
86fef5b4 | 178 | INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf\r |
49ba9447 | 179 | INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r |
180 | INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r | |
181 | INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r | |
182 | INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r | |
183 | INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r | |
184 | INF IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf\r | |
185 | INF PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf\r | |
186 | INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r | |
187 | INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r | |
188 | \r | |
49ba9447 | 189 | INF PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf\r |
190 | INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r | |
191 | INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r | |
192 | INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r | |
193 | INF IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf\r | |
194 | \r | |
195 | INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf\r | |
196 | INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf\r | |
197 | INF RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf\r | |
198 | \r | |
d989c453 | 199 | INF RuleOverride=BINARY FatBinPkg/EnhancedFatDxe/Fat.inf\r |
49ba9447 | 200 | \r |
d989c453 | 201 | INF RuleOverride=BINARY EdkShellBinPkg/FullShell/FullShell.inf\r |
49ba9447 | 202 | \r |
d46f3632 | 203 | FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {\r |
49ba9447 | 204 | SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress\r |
205 | SECTION RAW = MdeModulePkg/Logo/Logo.bmp\r | |
206 | }\r | |
207 | }\r | |
208 | \r | |
209 | ################################################################################\r | |
210 | \r | |
c1c2669c | 211 | [FV.OVMF]\r |
212 | BlockSize = 0x10000\r | |
49ba9447 | 213 | FvAlignment = 16\r |
214 | ERASE_POLARITY = 1\r | |
215 | MEMORY_MAPPED = TRUE\r | |
216 | STICKY_WRITE = TRUE\r | |
217 | LOCK_CAP = TRUE\r | |
218 | LOCK_STATUS = TRUE\r | |
219 | WRITE_DISABLED_CAP = TRUE\r | |
220 | WRITE_ENABLED_CAP = TRUE\r | |
221 | WRITE_STATUS = TRUE\r | |
222 | WRITE_LOCK_CAP = TRUE\r | |
223 | WRITE_LOCK_STATUS = TRUE\r | |
224 | READ_DISABLED_CAP = TRUE\r | |
225 | READ_ENABLED_CAP = TRUE\r | |
226 | READ_STATUS = TRUE\r | |
227 | READ_LOCK_CAP = TRUE\r | |
228 | READ_LOCK_STATUS = TRUE\r | |
229 | \r | |
230 | #\r | |
c1c2669c | 231 | # This file contains the compressed MAINFV, which is compressed\r |
49ba9447 | 232 | # in a single compression operation in order to achieve better\r |
233 | # overall compression.\r | |
234 | #\r | |
235 | FILE FV_IMAGE = 20bc8ac9-94d1-4208-ab28-5d673fd73486 {\r | |
236 | SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress\r | |
c1c2669c | 237 | SECTION FV_IMAGE = MAINFV\r |
49ba9447 | 238 | }\r |
239 | }\r | |
240 | \r | |
49ba9447 | 241 | #\r |
c1c2669c | 242 | # This file contains the uncompressed SECFV, which contains the initial\r |
243 | # boot code. The code in this FV decompresses the MAINFV.\r | |
244 | #\r | |
245 | # It uses the Volume Top File (VTF) GUID so it will be placed at the\r | |
246 | # end of the FV.\r | |
49ba9447 | 247 | #\r |
c1c2669c | 248 | FILE FREEFORM = 1BA0062E-C779-4582-8566-336AE8F78F09 {\r |
249 | SECTION Align=16 FV_IMAGE = SECFV\r | |
250 | }\r | |
251 | \r | |
49ba9447 | 252 | ################################################################################\r |
253 | \r | |
254 | [Rule.Common.PEI_CORE]\r | |
255 | FILE PEI_CORE = $(NAMED_GUID) {\r | |
2014a81a | 256 | PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
49ba9447 | 257 | UI STRING ="$(MODULE_NAME)" Optional\r |
258 | VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
259 | }\r | |
260 | \r | |
261 | [Rule.Common.SEC]\r | |
262 | FILE SEC = $(NAMED_GUID) {\r | |
2014a81a | 263 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
49ba9447 | 264 | UI STRING ="$(MODULE_NAME)" Optional\r |
265 | VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
266 | }\r | |
267 | \r | |
d40d3ba4 | 268 | [Rule.Common.PEIM.NORELOC]\r |
269 | FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED {\r | |
2014a81a LG |
270 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
271 | TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
d40d3ba4 | 272 | UI STRING="$(MODULE_NAME)" Optional\r |
273 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
274 | }\r | |
275 | \r | |
49ba9447 | 276 | [Rule.Common.PEIM]\r |
277 | FILE PEIM = $(NAMED_GUID) {\r | |
2014a81a LG |
278 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
279 | PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
49ba9447 | 280 | UI STRING="$(MODULE_NAME)" Optional\r |
281 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
282 | }\r | |
283 | \r | |
284 | [Rule.Common.PEIM.TIANOCOMPRESSED]\r | |
285 | FILE PEIM = $(NAMED_GUID) {\r | |
2014a81a | 286 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
49ba9447 | 287 | GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r |
2014a81a | 288 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
49ba9447 | 289 | UI STRING="$(MODULE_NAME)" Optional\r |
290 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
291 | }\r | |
292 | }\r | |
293 | \r | |
294 | [Rule.Common.DXE_CORE]\r | |
295 | FILE DXE_CORE = $(NAMED_GUID) {\r | |
2014a81a | 296 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
49ba9447 | 297 | UI STRING="$(MODULE_NAME)" Optional\r |
298 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
299 | }\r | |
300 | \r | |
301 | [Rule.Common.UEFI_DRIVER]\r | |
302 | FILE DRIVER = $(NAMED_GUID) {\r | |
2014a81a LG |
303 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
304 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
49ba9447 | 305 | UI STRING="$(MODULE_NAME)" Optional\r |
306 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
307 | }\r | |
308 | \r | |
309 | [Rule.Common.DXE_DRIVER]\r | |
310 | FILE DRIVER = $(NAMED_GUID) {\r | |
2014a81a LG |
311 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
312 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
49ba9447 | 313 | UI STRING="$(MODULE_NAME)" Optional\r |
314 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
315 | }\r | |
316 | \r | |
317 | [Rule.Common.DXE_RUNTIME_DRIVER]\r | |
318 | FILE DRIVER = $(NAMED_GUID) {\r | |
2014a81a LG |
319 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
320 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
49ba9447 | 321 | UI STRING="$(MODULE_NAME)" Optional\r |
322 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
323 | }\r | |
324 | \r | |
325 | [Rule.Common.UEFI_APPLICATION]\r | |
326 | FILE APPLICATION = $(NAMED_GUID) {\r | |
2014a81a | 327 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
49ba9447 | 328 | UI STRING="$(MODULE_NAME)" Optional\r |
329 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
330 | }\r | |
331 | \r | |
d989c453 LG |
332 | [Rule.Common.UEFI_DRIVER.BINARY]\r |
333 | FILE DRIVER = $(NAMED_GUID) {\r | |
334 | DXE_DEPEX DXE_DEPEX Optional |.depex\r | |
335 | PE32 PE32 |.efi\r | |
336 | UI STRING="$(MODULE_NAME)" Optional\r | |
337 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
338 | }\r | |
339 | \r | |
340 | [Rule.Common.UEFI_APPLICATION.BINARY]\r | |
341 | FILE APPLICATION = $(NAMED_GUID) {\r | |
342 | PE32 PE32 |.efi\r | |
343 | UI STRING="$(MODULE_NAME)" Optional\r | |
344 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
345 | }\r | |
346 | \r | |
48889990 | 347 | [Rule.Common.USER_DEFINED.ACPITABLE]\r |
49ba9447 | 348 | FILE FREEFORM = $(NAMED_GUID) {\r |
349 | RAW ACPI |.acpi\r | |
350 | RAW ASL |.aml\r | |
351 | }\r | |
352 | \r | |
353 | [Rule.Common.SEC.RESET_VECTOR]\r | |
354 | FILE RAW = $(NAMED_GUID) {\r | |
355 | RAW RAW |.raw\r | |
356 | }\r | |
357 | \r | |
712bd83b | 358 | [OptionRom.CirrusLogic5446]\r |
359 | INF OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf {\r | |
360 | PCI_DEVICE_ID = 0x00B8\r | |
361 | }\r | |
362 | \r |