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Commit | Line | Data |
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f079e9b4 MX |
1 | ;------------------------------------------------------------------------------\r |
2 | ; @file\r | |
3 | ; Main routine of the pre-SEC code up through the jump into SEC\r | |
4 | ;\r | |
5 | ; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>\r | |
6 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
7 | ;\r | |
8 | ;------------------------------------------------------------------------------\r | |
9 | \r | |
10 | \r | |
11 | BITS 16\r | |
12 | \r | |
13 | ;\r | |
14 | ; Modified: EBX, ECX, EDX, EBP\r | |
15 | ;\r | |
16 | ; @param[in,out] RAX/EAX Initial value of the EAX register\r | |
17 | ; (BIST: Built-in Self Test)\r | |
18 | ; @param[in,out] DI 'BP': boot-strap processor, or\r | |
19 | ; 'AP': application processor\r | |
20 | ; @param[out] RBP/EBP Address of Boot Firmware Volume (BFV)\r | |
21 | ; @param[out] DS Selector allowing flat access to all addresses\r | |
22 | ; @param[out] ES Selector allowing flat access to all addresses\r | |
23 | ; @param[out] FS Selector allowing flat access to all addresses\r | |
24 | ; @param[out] GS Selector allowing flat access to all addresses\r | |
25 | ; @param[out] SS Selector allowing flat access to all addresses\r | |
26 | ;\r | |
27 | ; @return None This routine jumps to SEC and does not return\r | |
28 | ;\r | |
29 | Main16:\r | |
30 | OneTimeCall EarlyInit16\r | |
31 | \r | |
32 | ;\r | |
33 | ; Transition the processor from 16-bit real mode to 32-bit flat mode\r | |
34 | ;\r | |
35 | OneTimeCall TransitionFromReal16To32BitFlat\r | |
36 | \r | |
37 | BITS 32\r | |
38 | \r | |
5a241178 MX |
39 | ; Clear the WorkArea header. The SEV probe routines will populate the\r |
40 | ; work area when detected.\r | |
41 | mov byte[WORK_AREA_GUEST_TYPE], 0\r | |
42 | \r | |
8b76f235 MX |
43 | %ifdef ARCH_X64\r |
44 | \r | |
45 | jmp SearchBfv\r | |
46 | \r | |
47 | ;\r | |
48 | ; Entry point of Main32\r | |
49 | ;\r | |
50 | Main32:\r | |
51 | OneTimeCall InitTdx\r | |
52 | \r | |
53 | SearchBfv:\r | |
54 | \r | |
55 | %endif\r | |
56 | \r | |
f079e9b4 MX |
57 | ;\r |
58 | ; Search for the Boot Firmware Volume (BFV)\r | |
59 | ;\r | |
60 | OneTimeCall Flat32SearchForBfvBase\r | |
61 | \r | |
62 | ;\r | |
63 | ; EBP - Start of BFV\r | |
64 | ;\r | |
65 | \r | |
66 | ;\r | |
67 | ; Search for the SEC entry point\r | |
68 | ;\r | |
69 | OneTimeCall Flat32SearchForSecEntryPoint\r | |
70 | \r | |
71 | ;\r | |
72 | ; ESI - SEC Core entry point\r | |
73 | ; EBP - Start of BFV\r | |
74 | ;\r | |
75 | \r | |
76 | %ifdef ARCH_IA32\r | |
77 | \r | |
a21a3438 TL |
78 | ;\r |
79 | ; SEV support can be built and run using the Ia32/X64 split environment.\r | |
80 | ; Set the OVMF/SEV work area as appropriate.\r | |
81 | ;\r | |
82 | OneTimeCall CheckSevFeatures\r | |
83 | \r | |
f079e9b4 MX |
84 | ;\r |
85 | ; Restore initial EAX value into the EAX register\r | |
86 | ;\r | |
87 | mov eax, esp\r | |
88 | \r | |
89 | ;\r | |
90 | ; Jump to the 32-bit SEC entry point\r | |
91 | ;\r | |
92 | jmp esi\r | |
93 | \r | |
94 | %else\r | |
95 | \r | |
96 | ;\r | |
97 | ; Transition the processor from 32-bit flat mode to 64-bit flat mode\r | |
98 | ;\r | |
99 | OneTimeCall Transition32FlatTo64Flat\r | |
100 | \r | |
101 | BITS 64\r | |
102 | \r | |
103 | ;\r | |
104 | ; Some values were calculated in 32-bit mode. Make sure the upper\r | |
105 | ; 32-bits of 64-bit registers are zero for these values.\r | |
106 | ;\r | |
107 | mov rax, 0x00000000ffffffff\r | |
108 | and rsi, rax\r | |
109 | and rbp, rax\r | |
110 | and rsp, rax\r | |
111 | \r | |
112 | ;\r | |
113 | ; RSI - SEC Core entry point\r | |
114 | ; RBP - Start of BFV\r | |
115 | ;\r | |
116 | \r | |
117 | ;\r | |
118 | ; Restore initial EAX value into the RAX register\r | |
119 | ;\r | |
120 | mov rax, rsp\r | |
121 | \r | |
122 | ;\r | |
123 | ; Jump to the 64-bit SEC entry point\r | |
124 | ;\r | |
125 | jmp rsi\r | |
126 | \r | |
127 | %endif\r |