OvmfPkg/PlatformInitLib: Add PlatformGetLowMemoryCB

Add PlatformGetLowMemoryCB() callback function for use with
PlatformScanE820().  It stores the low memory size in
PlatformInfoHob->LowMemory.  This replaces calls to
PlatformScanOrAdd64BitE820Ram() with non-NULL LowMemory.

Write any actions done (setting LowMemory) to the firmware log
with INFO loglevel.

Also change PlatformGetSystemMemorySizeBelow4gb() to likewise set
PlatformInfoHob->LowMemory instead of returning the value.  Update
all Callers to the new convention.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>

diff --git a/OvmfPkg/Include/Library/PlatformInitLib.h b/OvmfPkg/Include/Library/PlatformInitLib.h
index bf6f90a5761cac6e47bccb3a9fb5cf243cf8ea7a..051b3119119493d620386346adcaa84d38a98162 100644 (file)
--- a/OvmfPkg/Include/Library/PlatformInitLib.h
+++ b/OvmfPkg/Include/Library/PlatformInitLib.h
@@ -26,6 +26,7 @@ typedef struct {
   BOOLEAN              Q35SmramAtDefaultSmbase;\r
   UINT16               Q35TsegMbytes;\r
 \r
+  UINT32               LowMemory;\r
   UINT64               FirstNonAddress;\r
   UINT8                PhysMemAddressWidth;\r
   UINT32               Uc32Base;\r
@@ -144,7 +145,7 @@ PlatformQemuUc32BaseInitialization (
   IN OUT EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
   );\r
 \r
-UINT32\r
+VOID\r
 EFIAPI\r
 PlatformGetSystemMemorySizeBelow4gb (\r
   IN EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r

diff --git a/OvmfPkg/Library/PeilessStartupLib/Hob.c b/OvmfPkg/Library/PeilessStartupLib/Hob.c
index 630ce445ebec024e022a091f8daae9ed636cf562..318b74c95d8e9938e5717491fbb5752dbc692760 100644 (file)
--- a/OvmfPkg/Library/PeilessStartupLib/Hob.c
+++ b/OvmfPkg/Library/PeilessStartupLib/Hob.c
@@ -42,7 +42,8 @@ ConstructSecHobList (
 \r
   ZeroMem (&PlatformInfoHob, sizeof (PlatformInfoHob));\r
   PlatformInfoHob.HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);\r
-  LowMemorySize                   = PlatformGetSystemMemorySizeBelow4gb (&PlatformInfoHob);\r
+  PlatformGetSystemMemorySizeBelow4gb (&PlatformInfoHob);\r
+  LowMemorySize = PlatformInfoHob.LowMemory;\r
   ASSERT (LowMemorySize != 0);\r
   LowMemoryStart = FixedPcdGet32 (PcdOvmfDxeMemFvBase) + FixedPcdGet32 (PcdOvmfDxeMemFvSize);\r
   LowMemorySize -= LowMemoryStart;\r

diff --git a/OvmfPkg/Library/PeilessStartupLib/PeilessStartup.c b/OvmfPkg/Library/PeilessStartupLib/PeilessStartup.c
index 380e71597206fe0a5281cd75c8df5323083e8e20..928120d183ba56d1175bf34625234041df4ea47e 100644 (file)
--- a/OvmfPkg/Library/PeilessStartupLib/PeilessStartup.c
+++ b/OvmfPkg/Library/PeilessStartupLib/PeilessStartup.c
@@ -41,8 +41,7 @@ InitializePlatform (
   EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
   )\r
 {\r
-  UINT32  LowerMemorySize;\r
-  VOID    *VariableStore;\r
+  VOID  *VariableStore;\r
 \r
   DEBUG ((DEBUG_INFO, "InitializePlatform in Pei-less boot\n"));\r
   PlatformDebugDumpCmos ();\r
@@ -70,14 +69,14 @@ InitializePlatform (
     PlatformInfoHob->PcdCpuBootLogicalProcessorNumber\r
     ));\r
 \r
-  LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+  PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
   PlatformQemuUc32BaseInitialization (PlatformInfoHob);\r
   DEBUG ((\r
     DEBUG_INFO,\r
     "Uc32Base = 0x%x, Uc32Size = 0x%x, LowerMemorySize = 0x%x\n",\r
     PlatformInfoHob->Uc32Base,\r
     PlatformInfoHob->Uc32Size,\r
-    LowerMemorySize\r
+    PlatformInfoHob->LowMemory\r
     ));\r
 \r
   VariableStore                                  = PlatformReserveEmuVariableNvStore ();\r

diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index fdfe134247bf6f9e237c9392a854ffa16bf3c39d..57feeb6dab25d75f6a877fb3d3fca159bfcc39c8 100644 (file)
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -51,18 +51,16 @@ PlatformQemuUc32BaseInitialization (
   IN OUT EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
   )\r
 {\r
-  UINT32  LowerMemorySize;\r
-\r
   if (PlatformInfoHob->HostBridgeDevId == 0xffff /* microvm */) {\r
     return;\r
   }\r
 \r
   if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {\r
-    LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+    PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
     ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);\r
-    ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >= LowerMemorySize);\r
+    ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >= PlatformInfoHob->LowMemory);\r
 \r
-    if (LowerMemorySize <= BASE_2GB) {\r
+    if (PlatformInfoHob->LowMemory <= BASE_2GB) {\r
       // Newer qemu with gigabyte aligned memory,\r
       // 32-bit pci mmio window is 2G -> 4G then.\r
       PlatformInfoHob->Uc32Base = BASE_2GB;\r
@@ -92,8 +90,8 @@ PlatformQemuUc32BaseInitialization (
   // variable MTRR suffices by truncating the size to a whole power of two,\r
   // while keeping the end affixed to 4GB. This will round the base up.\r
   //\r
-  LowerMemorySize           = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
-  PlatformInfoHob->Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - LowerMemorySize));\r
+  PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+  PlatformInfoHob->Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - PlatformInfoHob->LowMemory));\r
   PlatformInfoHob->Uc32Base = (UINT32)(SIZE_4GB - PlatformInfoHob->Uc32Size);\r
   //\r
   // Assuming that LowerMemorySize is at least 1 byte, Uc32Size is at most 2GB.\r
@@ -101,13 +99,13 @@ PlatformQemuUc32BaseInitialization (
   //\r
   ASSERT (PlatformInfoHob->Uc32Base >= BASE_2GB);\r
 \r
-  if (PlatformInfoHob->Uc32Base != LowerMemorySize) {\r
+  if (PlatformInfoHob->Uc32Base != PlatformInfoHob->LowMemory) {\r
     DEBUG ((\r
       DEBUG_VERBOSE,\r
       "%a: rounded UC32 base from 0x%x up to 0x%x, for "\r
       "an UC32 size of 0x%x\n",\r
       __FUNCTION__,\r
-      LowerMemorySize,\r
+      PlatformInfoHob->LowMemory,\r
       PlatformInfoHob->Uc32Base,\r
       PlatformInfoHob->Uc32Size\r
       ));\r
@@ -280,6 +278,34 @@ PlatformGetFirstNonAddressCB (
   }\r
 }\r
 \r
+/**\r
+  Store the low (below 4G) memory size in\r
+  PlatformInfoHob->LowMemory\r
+**/\r
+STATIC\r
+VOID\r
+PlatformGetLowMemoryCB (\r
+  IN     EFI_E820_ENTRY64       *E820Entry,\r
+  IN OUT EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
+  )\r
+{\r
+  UINT64  Candidate;\r
+\r
+  if (E820Entry->Type != EfiAcpiAddressRangeMemory) {\r
+    return;\r
+  }\r
+\r
+  Candidate = E820Entry->BaseAddr + E820Entry->Length;\r
+  if (Candidate >= BASE_4GB) {\r
+    return;\r
+  }\r
+\r
+  if (PlatformInfoHob->LowMemory < Candidate) {\r
+    DEBUG ((DEBUG_INFO, "%a: LowMemory=0x%Lx\n", __FUNCTION__, Candidate));\r
+    PlatformInfoHob->LowMemory = (UINT32)Candidate;\r
+  }\r
+}\r
+\r
 /**\r
   Iterate over the entries in QEMU's fw_cfg E820 RAM map, call the\r
   passed callback for each entry.\r
@@ -396,14 +422,13 @@ GetHighestSystemMemoryAddressFromPvhMemmap (
   return HighestAddress;\r
 }\r
 \r
-UINT32\r
+VOID\r
 EFIAPI\r
 PlatformGetSystemMemorySizeBelow4gb (\r
   IN EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
   )\r
 {\r
   EFI_STATUS  Status;\r
-  UINT64      LowerMemorySize = 0;\r
   UINT8       Cmos0x34;\r
   UINT8       Cmos0x35;\r
 \r
@@ -411,12 +436,13 @@ PlatformGetSystemMemorySizeBelow4gb (
       (CcProbe () != CcGuestTypeIntelTdx))\r
   {\r
     // Get the information from PVH memmap\r
-    return (UINT32)GetHighestSystemMemoryAddressFromPvhMemmap (TRUE);\r
+    PlatformInfoHob->LowMemory = (UINT32)GetHighestSystemMemoryAddressFromPvhMemmap (TRUE);\r
+    return;\r
   }\r
 \r
-  Status = PlatformScanOrAdd64BitE820Ram (FALSE, &LowerMemorySize, NULL);\r
-  if ((Status == EFI_SUCCESS) && (LowerMemorySize > 0)) {\r
-    return (UINT32)LowerMemorySize;\r
+  Status = PlatformScanE820 (PlatformGetLowMemoryCB, PlatformInfoHob);\r
+  if (!EFI_ERROR (Status) && (PlatformInfoHob->LowMemory > 0)) {\r
+    return;\r
   }\r
 \r
   //\r
@@ -431,7 +457,7 @@ PlatformGetSystemMemorySizeBelow4gb (
   Cmos0x34 = (UINT8)PlatformCmosRead8 (0x34);\r
   Cmos0x35 = (UINT8)PlatformCmosRead8 (0x35);\r
 \r
-  return (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);\r
+  PlatformInfoHob->LowMemory = (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);\r
 }\r
 \r
 STATIC\r
@@ -967,7 +993,6 @@ PlatformQemuInitializeRam (
   IN EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
   )\r
 {\r
-  UINT64         LowerMemorySize;\r
   UINT64         UpperMemorySize;\r
   MTRR_SETTINGS  MtrrSettings;\r
   EFI_STATUS     Status;\r
@@ -977,7 +1002,7 @@ PlatformQemuInitializeRam (
   //\r
   // Determine total memory size available\r
   //\r
-  LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+  PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
 \r
   if (PlatformInfoHob->BootMode == BOOT_ON_S3_RESUME) {\r
     //\r
@@ -1011,14 +1036,14 @@ PlatformQemuInitializeRam (
       UINT32  TsegSize;\r
 \r
       TsegSize = PlatformInfoHob->Q35TsegMbytes * SIZE_1MB;\r
-      PlatformAddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);\r
+      PlatformAddMemoryRangeHob (BASE_1MB, PlatformInfoHob->LowMemory - TsegSize);\r
       PlatformAddReservedMemoryBaseSizeHob (\r
-        LowerMemorySize - TsegSize,\r
+        PlatformInfoHob->LowMemory - TsegSize,\r
         TsegSize,\r
         TRUE\r
         );\r
     } else {\r
-      PlatformAddMemoryRangeHob (BASE_1MB, LowerMemorySize);\r
+      PlatformAddMemoryRangeHob (BASE_1MB, PlatformInfoHob->LowMemory);\r
     }\r
 \r
     //\r
@@ -1196,9 +1221,10 @@ PlatformQemuInitializeRamForS3 (
       // Make sure the TSEG area that we reported as a reserved memory resource\r
       // cannot be used for reserved memory allocations.\r
       //\r
+      PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
       TsegSize = PlatformInfoHob->Q35TsegMbytes * SIZE_1MB;\r
       BuildMemoryAllocationHob (\r
-        PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob) - TsegSize,\r
+        PlatformInfoHob->LowMemory - TsegSize,\r
         TsegSize,\r
         EfiReservedMemoryType\r
         );\r

diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/PlatformInitLib/Platform.c
index 3e13c5d4b34febac873e4e2cf2f05aa4aef78c73..9ab0342fd8c0e81162c345dcc9482467082b3e0e 100644 (file)
--- a/OvmfPkg/Library/PlatformInitLib/Platform.c
+++ b/OvmfPkg/Library/PlatformInitLib/Platform.c
@@ -128,7 +128,6 @@ PlatformMemMapInitialization (
 {\r
   UINT64  PciIoBase;\r
   UINT64  PciIoSize;\r
-  UINT32  TopOfLowRam;\r
   UINT64  PciExBarBase;\r
   UINT32  PciBase;\r
   UINT32  PciSize;\r
@@ -150,7 +149,7 @@ PlatformMemMapInitialization (
     return;\r
   }\r
 \r
-  TopOfLowRam  = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+  PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
   PciExBarBase = 0;\r
   if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {\r
     //\r
@@ -158,11 +157,11 @@ PlatformMemMapInitialization (
     // the base of the 32-bit PCI host aperture.\r
     //\r
     PciExBarBase = PcdGet64 (PcdPciExpressBaseAddress);\r
-    ASSERT (TopOfLowRam <= PciExBarBase);\r
+    ASSERT (PlatformInfoHob->LowMemory <= PciExBarBase);\r
     ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);\r
     PciBase = (UINT32)(PciExBarBase + SIZE_256MB);\r
   } else {\r
-    ASSERT (TopOfLowRam <= PlatformInfoHob->Uc32Base);\r
+    ASSERT (PlatformInfoHob->LowMemory <= PlatformInfoHob->Uc32Base);\r
     PciBase = PlatformInfoHob->Uc32Base;\r
   }\r
 \r

diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 3d8375320dcb3beda2caa5893bcb6aad8471d045..41d186986ba81ad1dcbba06da099e16b03f4353f 100644 (file)
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -271,7 +271,8 @@ PublishPeiMemory (
   UINT32                S3AcpiReservedMemoryBase;\r
   UINT32                S3AcpiReservedMemorySize;\r
 \r
-  LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+  PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);\r
+  LowerMemorySize = PlatformInfoHob->LowMemory;\r
   if (PlatformInfoHob->SmmSmramRequire) {\r
     //\r
     // TSEG is chipped from the end of low RAM\r