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1/** @file\r
2 PlatformInitLib header file.\r
3\r
4 Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>\r
5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
6\r
7**/\r
8\r
9#ifndef PLATFORM_INIT_LIB_H_\r
10#define PLATFORM_INIT_LIB_H_\r
11\r
12#include <PiPei.h>\r
13\r
14#pragma pack(1)\r
15typedef struct {\r
16 EFI_HOB_GUID_TYPE GuidHeader;\r
17 UINT16 HostBridgeDevId;\r
18\r
19 UINT64 PcdConfidentialComputingGuestAttr;\r
20 BOOLEAN SevEsIsEnabled;\r
21\r
22 UINT32 BootMode;\r
23 BOOLEAN S3Supported;\r
24\r
25 BOOLEAN SmmSmramRequire;\r
26 BOOLEAN Q35SmramAtDefaultSmbase;\r
27 UINT16 Q35TsegMbytes;\r
28\r
124b7650 29 UINT32 LowMemory;\r
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30 UINT64 FirstNonAddress;\r
31 UINT8 PhysMemAddressWidth;\r
32 UINT32 Uc32Base;\r
33 UINT32 Uc32Size;\r
34\r
35 BOOLEAN PcdSetNxForStack;\r
36 UINT64 PcdTdxSharedBitMask;\r
37\r
38 UINT64 PcdPciMmio64Base;\r
39 UINT64 PcdPciMmio64Size;\r
40 UINT32 PcdPciMmio32Base;\r
41 UINT32 PcdPciMmio32Size;\r
42 UINT64 PcdPciIoBase;\r
43 UINT64 PcdPciIoSize;\r
44\r
45 UINT64 PcdEmuVariableNvStoreReserved;\r
46 UINT32 PcdCpuBootLogicalProcessorNumber;\r
47 UINT32 PcdCpuMaxLogicalProcessorNumber;\r
48 UINT32 DefaultMaxCpuNumber;\r
49\r
50 UINT32 S3AcpiReservedMemoryBase;\r
51 UINT32 S3AcpiReservedMemorySize;\r
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52\r
53 UINT64 FeatureControlValue;\r
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54\r
55 BOOLEAN QemuFwCfgChecked;\r
56 BOOLEAN QemuFwCfgSupported;\r
57 BOOLEAN QemuFwCfgDmaSupported;\r
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58} EFI_HOB_PLATFORM_INFO;\r
59#pragma pack()\r
60\r
61/**\r
62 Reads 8-bits of CMOS data.\r
63\r
64 Reads the 8-bits of CMOS data at the location specified by Index.\r
65 The 8-bit read value is returned.\r
66\r
67 @param Index The CMOS location to read.\r
68\r
69 @return The value read.\r
70\r
71**/\r
72UINT8\r
73EFIAPI\r
74PlatformCmosRead8 (\r
75 IN UINTN Index\r
76 );\r
77\r
78/**\r
79 Writes 8-bits of CMOS data.\r
80\r
81 Writes 8-bits of CMOS data to the location specified by Index\r
82 with the value specified by Value and returns Value.\r
83\r
84 @param Index The CMOS location to write.\r
85 @param Value The value to write to CMOS.\r
86\r
87 @return The value written to CMOS.\r
88\r
89**/\r
90UINT8\r
91EFIAPI\r
92PlatformCmosWrite8 (\r
93 IN UINTN Index,\r
94 IN UINT8 Value\r
95 );\r
96\r
97/**\r
98 Dump the CMOS content\r
99 */\r
100VOID\r
101EFIAPI\r
102PlatformDebugDumpCmos (\r
103 VOID\r
104 );\r
105\r
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106VOID\r
107EFIAPI\r
108PlatformAddIoMemoryBaseSizeHob (\r
109 IN EFI_PHYSICAL_ADDRESS MemoryBase,\r
110 IN UINT64 MemorySize\r
111 );\r
112\r
113VOID\r
114EFIAPI\r
115PlatformAddIoMemoryRangeHob (\r
116 IN EFI_PHYSICAL_ADDRESS MemoryBase,\r
117 IN EFI_PHYSICAL_ADDRESS MemoryLimit\r
118 );\r
119\r
120VOID\r
121EFIAPI\r
122PlatformAddMemoryBaseSizeHob (\r
123 IN EFI_PHYSICAL_ADDRESS MemoryBase,\r
124 IN UINT64 MemorySize\r
125 );\r
126\r
127VOID\r
128EFIAPI\r
129PlatformAddMemoryRangeHob (\r
130 IN EFI_PHYSICAL_ADDRESS MemoryBase,\r
131 IN EFI_PHYSICAL_ADDRESS MemoryLimit\r
132 );\r
133\r
134VOID\r
135EFIAPI\r
136PlatformAddReservedMemoryBaseSizeHob (\r
137 IN EFI_PHYSICAL_ADDRESS MemoryBase,\r
138 IN UINT64 MemorySize,\r
139 IN BOOLEAN Cacheable\r
140 );\r
141\r
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142VOID\r
143EFIAPI\r
144PlatformQemuUc32BaseInitialization (\r
145 IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
146 );\r
147\r
124b7650 148VOID\r
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149EFIAPI\r
150PlatformGetSystemMemorySizeBelow4gb (\r
151 IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
152 );\r
153\r
154/**\r
155 Initialize the PhysMemAddressWidth field in PlatformInfoHob based on guest RAM size.\r
156**/\r
157VOID\r
158EFIAPI\r
159PlatformAddressWidthInitialization (\r
160 IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
161 );\r
162\r
163/**\r
164 Peform Memory Detection for QEMU / KVM\r
165\r
166**/\r
167VOID\r
168EFIAPI\r
169PlatformQemuInitializeRam (\r
170 IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
171 );\r
172\r
173VOID\r
174EFIAPI\r
175PlatformQemuInitializeRamForS3 (\r
176 IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
177 );\r
178\r
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179VOID\r
180EFIAPI\r
181PlatformMemMapInitialization (\r
182 IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
183 );\r
184\r
185/**\r
186 * Fetch "opt/ovmf/PcdSetNxForStack" from QEMU\r
187 *\r
188 * @param Setting The pointer to the setting of "/opt/ovmf/PcdSetNxForStack".\r
189 * @return EFI_SUCCESS Successfully fetch the settings.\r
190 */\r
191EFI_STATUS\r
192EFIAPI\r
193PlatformNoexecDxeInitialization (\r
194 IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
195 );\r
196\r
197VOID\r
198EFIAPI\r
199PlatformMiscInitialization (\r
200 IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
201 );\r
202\r
203/**\r
204 Fetch the boot CPU count and the possible CPU count from QEMU, and expose\r
205 them to UefiCpuPkg modules.\r
206**/\r
207VOID\r
208EFIAPI\r
209PlatformMaxCpuCountInitialization (\r
210 IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r
211 );\r
212\r
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213/**\r
214 In Tdx guest, some information need to be passed from host VMM to guest\r
215 firmware. For example, the memory resource, etc. These information are\r
216 prepared by host VMM and put in HobList which is described in TdxMetadata.\r
217\r
218 Information in HobList is treated as external input. From the security\r
219 perspective before it is consumed, it should be validated.\r
220\r
221 @retval EFI_SUCCESS Successfully process the hoblist\r
222 @retval Others Other error as indicated\r
223**/\r
224EFI_STATUS\r
225EFIAPI\r
226ProcessTdxHobList (\r
227 VOID\r
228 );\r
229\r
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230/**\r
231 In Tdx guest, the system memory is passed in TdHob by host VMM. So\r
232 the major task of PlatformTdxPublishRamRegions is to walk thru the\r
233 TdHob list and transfer the ResourceDescriptorHob and MemoryAllocationHob\r
234 to the hobs in DXE phase.\r
235\r
236 MemoryAllocationHob should also be created for Mailbox and Ovmf work area.\r
237**/\r
238VOID\r
239EFIAPI\r
240PlatformTdxPublishRamRegions (\r
241 VOID\r
242 );\r
243\r
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244/**\r
245 Check the integrity of NvVarStore.\r
246\r
247 @param[in] NvVarStoreBase - A pointer to NvVarStore header\r
248 @param[in] NvVarStoreSize - NvVarStore size\r
249\r
250 @retval TRUE - The NvVarStore is valid.\r
251 @retval FALSE - The NvVarStore is invalid.\r
252\r
253**/\r
254BOOLEAN\r
255EFIAPI\r
256PlatformValidateNvVarStore (\r
257 IN UINT8 *NvVarStoreBase,\r
258 IN UINT32 NvVarStoreSize\r
259 );\r
260\r
261/**\r
262 Allocate storage for NV variables early on so it will be\r
263 at a consistent address. Since VM memory is preserved\r
264 across reboots, this allows the NV variable storage to survive\r
265 a VM reboot.\r
266\r
267 *\r
268 * @retval VOID* The pointer to the storage for NV Variables\r
269 */\r
270VOID *\r
271EFIAPI\r
272PlatformReserveEmuVariableNvStore (\r
273 VOID\r
274 );\r
275\r
276/**\r
277 When OVMF is lauched with -bios parameter, UEFI variables will be\r
278 partially emulated, and non-volatile variables may lose their contents\r
279 after a reboot. This makes the secure boot feature not working.\r
280\r
281 This function is used to initialize the EmuVariableNvStore\r
282 with the conent in PcdOvmfFlashNvStorageVariableBase.\r
283\r
284 @param[in] EmuVariableNvStore - A pointer to EmuVariableNvStore\r
285\r
286 @retval EFI_SUCCESS - Successfully init the EmuVariableNvStore\r
287 @retval Others - As the error code indicates\r
288 */\r
289EFI_STATUS\r
290EFIAPI\r
291PlatformInitEmuVariableNvStore (\r
292 IN VOID *EmuVariableNvStore\r
293 );\r
294\r
57bcfc3b 295#endif // PLATFORM_INIT_LIB_H_\r