projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| b303605e MK |
1 | /** @file\r |
| 2 | Principle source module for Clanton Peak platform config PEIM driver.\r | |
| 3 | \r | |
| 4 | Copyright (c) 2013 Intel Corporation.\r | |
| 5 | \r | |
| 6 | This program and the accompanying materials\r | |
| 7 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 8 | which accompanies this distribution. The full text of the license may be found at\r | |
| 9 | http://opensource.org/licenses/bsd-license.php\r | |
| 10 | \r | |
| 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 13 | \r | |
| 14 | **/\r | |
| 15 | \r | |
| 16 | #include <PiPei.h>\r | |
| 17 | #include <Library/IntelQNCLib.h>\r | |
| 18 | #include <Library/PlatformHelperLib.h>\r | |
| 19 | #include <Library/QNCAccessLib.h>\r | |
| 20 | \r | |
| 21 | VOID\r | |
| 22 | EFIAPI\r | |
| 23 | LegacySpiProtect (\r | |
| 24 | VOID\r | |
| 25 | )\r | |
| 26 | {\r | |
| 27 | UINT32 RegVal;\r | |
| 28 | \r | |
| 29 | RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange0Pei);\r | |
| 30 | if (RegVal != 0) {\r | |
| 31 | PlatformWriteFirstFreeSpiProtect (\r | |
| 32 | RegVal,\r | |
| 33 | 0,\r | |
| 34 | 0\r | |
| 35 | );\r | |
| 36 | }\r | |
| 37 | RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange1Pei);\r | |
| 38 | if (RegVal != 0) {\r | |
| 39 | PlatformWriteFirstFreeSpiProtect (\r | |
| 40 | RegVal,\r | |
| 41 | 0,\r | |
| 42 | 0\r | |
| 43 | );\r | |
| 44 | }\r | |
| 45 | RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange2Pei);\r | |
| 46 | if (RegVal != 0) {\r | |
| 47 | PlatformWriteFirstFreeSpiProtect (\r | |
| 48 | RegVal,\r | |
| 49 | 0,\r | |
| 50 | 0\r | |
| 51 | );\r | |
| 52 | }\r | |
| 53 | \r | |
| 54 | //\r | |
| 55 | // Make legacy SPI READ/WRITE enabled if not a secure build\r | |
| 56 | //\r | |
| 57 | LpcPciCfg32And (R_QNC_LPC_BIOS_CNTL, ~B_QNC_LPC_BIOS_CNTL_BIOSWE);\r | |
| 58 | }\r | |
| 59 | \r | |
| 60 | /** PlatformConfigPei driver entry point.\r | |
| 61 | \r | |
| 62 | Platform config in PEI stage.\r | |
| 63 | \r | |
| 64 | @param[in] FfsHeader Pointer to Firmware File System file header.\r | |
| 65 | @param[in] PeiServices General purpose services available to every PEIM.\r | |
| 66 | \r | |
| 67 | @retval EFI_SUCCESS Platform config success.\r | |
| 68 | */\r | |
| 69 | EFI_STATUS\r | |
| 70 | EFIAPI\r | |
| 71 | PlatformConfigPeiInit (\r | |
| 72 | IN EFI_PEI_FILE_HANDLE FileHandle,\r | |
| 73 | IN CONST EFI_PEI_SERVICES **PeiServices\r | |
| 74 | )\r | |
| 75 | {\r | |
| 76 | //\r | |
| 77 | // Do SOC Init Pre memory init.\r | |
| 78 | //\r | |
| 79 | PeiQNCPreMemInit ();\r | |
| 80 | \r | |
| 81 | //\r | |
| 82 | // Protect areas specified by PCDs.\r | |
| 83 | //\r | |
| 84 | LegacySpiProtect ();\r | |
| 85 | \r | |
| 86 | return EFI_SUCCESS;\r | |
| 87 | }\r |