[mirror_edk2.git] / QuarkSocPkg / QuarkNorthCluster / Spi / Common / SpiCommon.h

/** @file\r
Header file for the PCH SPI Common Driver.\r
\r
Copyright (c) 2013-2015 Intel Corporation.\r
\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
#ifndef _SPI_COMMON_H_\r
#define _SPI_COMMON_H_\r
\r
#include "Protocol/Spi.h"\r
#include <Library/PciLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/IntelQNCLib.h>\r
#include <Library/QNCAccessLib.h>\r
#include <Uefi/UefiBaseType.h>\r
\r
//\r
// Maximum time allowed while waiting the SPI cycle to complete\r
//  Wait Time = 6 seconds = 6000000 microseconds\r
//  Wait Period = 10 microseconds\r
//\r
#define WAIT_TIME   6000000\r
#define WAIT_PERIOD 10\r
//\r
// PCH Required SPI Commands -------- COMMAND SET I ------------\r
// SPI flash device must support in order to be compatible with PCH\r
//\r
#define PCH_SPI_COMMAND_PROGRAM_BYTE          0x02\r
#define PCH_SPI_COMMAND_READ_DATA             0x03\r
#define PCH_SPI_COMMAND_WRITE_DISABLE         0x04\r
#define PCH_SPI_COMMAND_READ_STATUS           0x05\r
#define PCH_SPI_COMMAND_WRITE_ENABLE          0x06\r
#define PCH_SPI_COMMAND_FAST_READ             0x0B\r
#define PCH_SPI_COMMAND_READ_ID               0x9F\r
#define PCH_SPI_COMMAND_DUAL_FAST_READ        0x3B  // Dual Output Fast Read\r
\r
//\r
// Need to support at least one of the following two kinds of size of sector for erasing\r
//\r
#define PCH_SPI_COMMAND_4KB_ERASE   0x20\r
#define PCH_SPI_COMMAND_64KB_ERASE  0xD8\r
//\r
// Recommended SPI Commands -------- COMMAND SET II ------------\r
// SPI flash device best to support\r
//\r
#define PCH_SPI_COMMAND_WRITE_STATUS    0x01\r
#define PCH_SPI_COMMAND_FULL_CHIP_ERASE 0xC7\r
\r
//\r
// Private data structure definitions for the driver\r
//\r
#define PCH_SPI_PRIVATE_DATA_SIGNATURE  SIGNATURE_32 ('P', 'S', 'P', 'I')\r
\r
typedef struct {\r
  UINTN             Signature;\r
  EFI_HANDLE        Handle;\r
  EFI_SPI_PROTOCOL  SpiProtocol;\r
  SPI_INIT_TABLE    SpiInitTable;\r
  UINTN             PchRootComplexBar;\r
  BOOLEAN           InitDone; // Set to TRUE on SpiProtocolInit SUCCESS.\r
  SPI_INIT_INFO     InitInfo;\r
} SPI_INSTANCE;\r
\r
#define SPI_INSTANCE_FROM_SPIPROTOCOL(a)  CR (a, SPI_INSTANCE, SpiProtocol, PCH_SPI_PRIVATE_DATA_SIGNATURE)\r
\r
//\r
// Function prototypes used by the SPI protocol.\r
//\r
EFI_STATUS\r
SpiProtocolConstructor (\r
  SPI_INSTANCE          *SpiInstance\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Initialize an SPI protocol instance.\r
  The function will assert in debug if PCH RCBA has not been initialized\r
\r
Arguments:\r
\r
  SpiInstance   - Pointer to SpiInstance to initialize\r
\r
Returns:\r
\r
  EFI_SUCCESS     The protocol instance was properly initialized\r
  EFI_UNSUPPORTED The PCH is not supported by this module\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
EFIAPI\r
SpiProtocolInit (\r
  IN EFI_SPI_PROTOCOL       *This,\r
  IN SPI_INIT_TABLE         *InitTable\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Initialize the host controller to execute SPI command.\r
\r
Arguments:\r
\r
  This                    Pointer to the EFI_SPI_PROTOCOL instance.\r
  InitTable               Initialization data to be programmed into the SPI host controller.\r
\r
Returns:\r
\r
  EFI_SUCCESS             Initialization completed.\r
  EFI_ACCESS_DENIED       The SPI static configuration interface has been locked-down.\r
  EFI_INVALID_PARAMETER   Bad input parameters.\r
--*/\r
;\r
\r
EFI_STATUS\r
EFIAPI\r
SpiProtocolLock (\r
  IN EFI_SPI_PROTOCOL       *This\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Lock the SPI Static Configuration Interface.\r
  Once locked, the interface can not be changed and can only be clear by system reset.\r
\r
Arguments:\r
\r
  This      Pointer to the EFI_SPI_PROTOCOL instance.\r
\r
Returns:\r
\r
  EFI_SUCCESS             Lock operation succeed.\r
  EFI_DEVICE_ERROR        Device error, operation failed.\r
  EFI_ACCESS_DENIED       The interface has already been locked.\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
EFIAPI\r
SpiProtocolExecute (\r
  IN     EFI_SPI_PROTOCOL   *This,\r
  IN     UINT8              OpcodeIndex,\r
  IN     UINT8              PrefixOpcodeIndex,\r
  IN     BOOLEAN            DataCycle,\r
  IN     BOOLEAN            Atomic,\r
  IN     BOOLEAN            ShiftOut,\r
  IN     UINTN              Address,\r
  IN     UINT32             DataByteCount,\r
  IN OUT UINT8              *Buffer,\r
  IN     SPI_REGION_TYPE    SpiRegionType\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Execute SPI commands from the host controller.\r
\r
Arguments:\r
\r
  This                    Pointer to the EFI_SPI_PROTOCOL instance.\r
  OpcodeIndex             Index of the command in the OpCode Menu.\r
  PrefixOpcodeIndex       Index of the first command to run when in an atomic cycle sequence.\r
  DataCycle               TRUE if the SPI cycle contains data\r
  Atomic                  TRUE if the SPI cycle is atomic and interleave cycles are not allowed.\r
  ShiftOut                If DataByteCount is not zero, TRUE to shift data out and FALSE to shift data in.\r
  Address                 In Descriptor Mode, for Descriptor Region, GbE Region, ME Region and Platform\r
                          Region, this value specifies the offset from the Region Base; for BIOS Region,\r
                          this value specifies the offset from the start of the BIOS Image. In Non\r
                          Descriptor Mode, this value specifies the offset from the start of the BIOS Image.\r
                          Please note BIOS Image size may be smaller than BIOS Region size (in Descriptor\r
                          Mode) or the flash size (in Non Descriptor Mode), and in this case, BIOS Image is\r
                          supposed to be placed at the top end of the BIOS Region (in Descriptor Mode) or\r
                          the flash (in Non Descriptor Mode)\r
  DataByteCount           Number of bytes in the data portion of the SPI cycle.\r
  Buffer                  Pointer to caller-allocated buffer containing the dada received or sent during the SPI cycle.\r
  SpiRegionType           SPI Region type. Values EnumSpiRegionBios, EnumSpiRegionGbE, EnumSpiRegionMe,\r
                          EnumSpiRegionDescriptor, and EnumSpiRegionPlatformData are only applicable in\r
                          Descriptor mode. Value EnumSpiRegionAll is applicable to both Descriptor Mode\r
                          and Non Descriptor Mode, which indicates "SpiRegionOffset" is actually relative\r
                          to base of the 1st flash device (i.e., it is a Flash Linear Address).\r
\r
Returns:\r
\r
  EFI_SUCCESS             Command succeed.\r
  EFI_INVALID_PARAMETER   The parameters specified are not valid.\r
  EFI_UNSUPPORTED         Command not supported.\r
  EFI_DEVICE_ERROR        Device error, command aborts abnormally.\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
SendSpiCmd (\r
  IN     EFI_SPI_PROTOCOL   *This,\r
  IN     UINT8              OpcodeIndex,\r
  IN     UINT8              PrefixOpcodeIndex,\r
  IN     BOOLEAN            DataCycle,\r
  IN     BOOLEAN            Atomic,\r
  IN     BOOLEAN            ShiftOut,\r
  IN     UINTN              Address,\r
  IN     UINT32             DataByteCount,\r
  IN OUT UINT8              *Buffer,\r
  IN     SPI_REGION_TYPE    SpiRegionType\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  This function sends the programmed SPI command to the slave device.\r
\r
Arguments:\r
\r
  OpcodeIndex       Index of the command in the OpCode Menu.\r
  PrefixOpcodeIndex Index of the first command to run when in an atomic cycle sequence.\r
  DataCycle         TRUE if the SPI cycle contains data\r
  Atomic            TRUE if the SPI cycle is atomic and interleave cycles are not allowed.\r
  ShiftOut          If DataByteCount is not zero, TRUE to shift data out and FALSE to shift data in.\r
  Address           In Descriptor Mode, for Descriptor Region, GbE Region, ME Region and Platform\r
                    Region, this value specifies the offset from the Region Base; for BIOS Region,\r
                    this value specifies the offset from the start of the BIOS Image. In Non\r
                    Descriptor Mode, this value specifies the offset from the start of the BIOS Image.\r
                    Please note BIOS Image size may be smaller than BIOS Region size (in Descriptor\r
                    Mode) or the flash size (in Non Descriptor Mode), and in this case, BIOS Image is\r
                    supposed to be placed at the top end of the BIOS Region (in Descriptor Mode) or\r
                    the flash (in Non Descriptor Mode)\r
  DataByteCount     Number of bytes in the data portion of the SPI cycle. This function may break the\r
                    data transfer into multiple operations. This function ensures each operation does\r
                    not cross 256 byte flash address boundary.\r
                    *NOTE: if there is some SPI chip that has a stricter address boundary requirement\r
                    (e.g., its write page size is < 256 byte), then the caller cannot rely on this\r
                    function to cut the data transfer at proper address boundaries, and it's the\r
                    caller's reponsibility to pass in a properly cut DataByteCount parameter.\r
  Buffer            Data received or sent during the SPI cycle.\r
  SpiRegionType     SPI Region type. Values EnumSpiRegionBios, EnumSpiRegionGbE, EnumSpiRegionMe,\r
                    EnumSpiRegionDescriptor, and EnumSpiRegionPlatformData are only applicable in\r
                    Descriptor mode. Value EnumSpiRegionAll is applicable to both Descriptor Mode\r
                    and Non Descriptor Mode, which indicates "SpiRegionOffset" is actually relative\r
                    to base of the 1st flash device (i.e., it is a Flash Linear Address).\r
\r
Returns:\r
\r
  EFI_SUCCESS             SPI command completes successfully.\r
  EFI_DEVICE_ERROR        Device error, the command aborts abnormally.\r
  EFI_ACCESS_DENIED       Some unrecognized command encountered in hardware sequencing mode\r
  EFI_INVALID_PARAMETER   The parameters specified are not valid.\r
\r
--*/\r
;\r
\r
BOOLEAN\r
WaitForSpiCycleComplete (\r
  IN     EFI_SPI_PROTOCOL   *This,\r
  IN     BOOLEAN            ErrorCheck\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Wait execution cycle to complete on the SPI interface. Check both Hardware\r
  and Software Sequencing status registers\r
\r
Arguments:\r
\r
  This                - The SPI protocol instance\r
  UseSoftwareSequence - TRUE if this is a Hardware Sequencing operation\r
  ErrorCheck          - TRUE if the SpiCycle needs to do the error check\r
\r
Returns:\r
\r
  TRUE       SPI cycle completed on the interface.\r
  FALSE      Time out while waiting the SPI cycle to complete.\r
             It's not safe to program the next command on the SPI interface.\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
EFIAPI\r
SpiProtocolInfo (\r
  IN EFI_SPI_PROTOCOL     *This,\r
  OUT SPI_INIT_INFO      **InitInfoPtr\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Return info about SPI host controller, to help callers usage of Execute\r
  service.\r
\r
  If 0xff is returned as an opcode index in init info struct\r
  then device does not support the operation.\r
\r
Arguments:\r
\r
  This                    Pointer to the EFI_SPI_PROTOCOL instance.\r
  InitInfoPtr             Pointer to init info written to this memory location.\r
\r
Returns:\r
\r
  EFI_SUCCESS             Information returned.\r
  EFI_INVALID_PARAMETER   Invalid parameter.\r
  EFI_NOT_READY           Required resources not setup.\r
  Others                  Unexpected error happened.\r
\r
--*/\r
;\r
\r
#endif\r
Commit	Line	Data
9b6bbcdb MK	1	/** @file\r
	2	Header file for the PCH SPI Common Driver.\r
	3	\r
	4	Copyright (c) 2013-2015 Intel Corporation.\r
	5	\r
c9f231d0	6	SPDX-License-Identifier: BSD-2-Clause-Patent\r
9b6bbcdb MK	7	\r
	8	**/\r
	9	#ifndef _SPI_COMMON_H_\r
	10	#define _SPI_COMMON_H_\r
	11	\r
	12	#include "Protocol/Spi.h"\r
	13	#include <Library/PciLib.h>\r
	14	#include <Library/IoLib.h>\r
	15	#include <Library/DebugLib.h>\r
	16	#include <Library/PcdLib.h>\r
	17	#include <Library/BaseMemoryLib.h>\r
	18	#include <Library/IntelQNCLib.h>\r
	19	#include <Library/QNCAccessLib.h>\r
	20	#include <Uefi/UefiBaseType.h>\r
	21	\r
	22	//\r
	23	// Maximum time allowed while waiting the SPI cycle to complete\r
	24	// Wait Time = 6 seconds = 6000000 microseconds\r
	25	// Wait Period = 10 microseconds\r
	26	//\r
	27	#define WAIT_TIME 6000000\r
	28	#define WAIT_PERIOD 10\r
	29	//\r
	30	// PCH Required SPI Commands -------- COMMAND SET I ------------\r
	31	// SPI flash device must support in order to be compatible with PCH\r
	32	//\r
	33	#define PCH_SPI_COMMAND_PROGRAM_BYTE 0x02\r
	34	#define PCH_SPI_COMMAND_READ_DATA 0x03\r
	35	#define PCH_SPI_COMMAND_WRITE_DISABLE 0x04\r
	36	#define PCH_SPI_COMMAND_READ_STATUS 0x05\r
	37	#define PCH_SPI_COMMAND_WRITE_ENABLE 0x06\r
	38	#define PCH_SPI_COMMAND_FAST_READ 0x0B\r
	39	#define PCH_SPI_COMMAND_READ_ID 0x9F\r
	40	#define PCH_SPI_COMMAND_DUAL_FAST_READ 0x3B // Dual Output Fast Read\r
	41	\r
	42	//\r
	43	// Need to support at least one of the following two kinds of size of sector for erasing\r
	44	//\r
	45	#define PCH_SPI_COMMAND_4KB_ERASE 0x20\r
	46	#define PCH_SPI_COMMAND_64KB_ERASE 0xD8\r
	47	//\r
	48	// Recommended SPI Commands -------- COMMAND SET II ------------\r
	49	// SPI flash device best to support\r
	50	//\r
	51	#define PCH_SPI_COMMAND_WRITE_STATUS 0x01\r
	52	#define PCH_SPI_COMMAND_FULL_CHIP_ERASE 0xC7\r
	53	\r
	54	//\r
	55	// Private data structure definitions for the driver\r
	56	//\r
	57	#define PCH_SPI_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('P', 'S', 'P', 'I')\r
	58	\r
	59	typedef struct {\r
	60	UINTN Signature;\r
	61	EFI_HANDLE Handle;\r
	62	EFI_SPI_PROTOCOL SpiProtocol;\r
	63	SPI_INIT_TABLE SpiInitTable;\r
	64	UINTN PchRootComplexBar;\r
	65	BOOLEAN InitDone; // Set to TRUE on SpiProtocolInit SUCCESS.\r
	66	SPI_INIT_INFO InitInfo;\r
	67	} SPI_INSTANCE;\r
	68	\r
	69	#define SPI_INSTANCE_FROM_SPIPROTOCOL(a) CR (a, SPI_INSTANCE, SpiProtocol, PCH_SPI_PRIVATE_DATA_SIGNATURE)\r
	70	\r
71	//\r
72	// Function prototypes used by the SPI protocol.\r
73	//\r
74	EFI_STATUS\r
75	SpiProtocolConstructor (\r
76	SPI_INSTANCE *SpiInstance\r
77	)\r
78	/*++\r
79	\r
80	Routine Description:\r
81	\r
82	Initialize an SPI protocol instance.\r
83	The function will assert in debug if PCH RCBA has not been initialized\r
84	\r
85	Arguments:\r
86	\r
87	SpiInstance - Pointer to SpiInstance to initialize\r
88	\r
89	Returns:\r
90	\r
91	EFI_SUCCESS The protocol instance was properly initialized\r
92	EFI_UNSUPPORTED The PCH is not supported by this module\r
93	\r
94	--*/\r
95	;\r
96	\r
97	EFI_STATUS\r
98	EFIAPI\r
99	SpiProtocolInit (\r
100	IN EFI_SPI_PROTOCOL *This,\r
101	IN SPI_INIT_TABLE *InitTable\r
102	)\r
103	/*++\r
104	\r
105	Routine Description:\r
106	\r
107	Initialize the host controller to execute SPI command.\r
108	\r
109	Arguments:\r
110	\r
111	This Pointer to the EFI_SPI_PROTOCOL instance.\r
112	InitTable Initialization data to be programmed into the SPI host controller.\r
113	\r
114	Returns:\r
115	\r
116	EFI_SUCCESS Initialization completed.\r
117	EFI_ACCESS_DENIED The SPI static configuration interface has been locked-down.\r
118	EFI_INVALID_PARAMETER Bad input parameters.\r
119	--*/\r
120	;\r
121	\r
122	EFI_STATUS\r
123	EFIAPI\r
124	SpiProtocolLock (\r
125	IN EFI_SPI_PROTOCOL *This\r
126	)\r
127	/*++\r
128	\r
129	Routine Description:\r
130	\r
131	Lock the SPI Static Configuration Interface.\r
132	Once locked, the interface can not be changed and can only be clear by system reset.\r
133	\r
134	Arguments:\r
135	\r
136	This Pointer to the EFI_SPI_PROTOCOL instance.\r
137	\r
138	Returns:\r
139	\r
140	EFI_SUCCESS Lock operation succeed.\r
141	EFI_DEVICE_ERROR Device error, operation failed.\r
142	EFI_ACCESS_DENIED The interface has already been locked.\r
143	\r
144	--*/\r
145	;\r
146	\r
147	EFI_STATUS\r
148	EFIAPI\r
149	SpiProtocolExecute (\r
150	IN EFI_SPI_PROTOCOL *This,\r
151	IN UINT8 OpcodeIndex,\r
152	IN UINT8 PrefixOpcodeIndex,\r
153	IN BOOLEAN DataCycle,\r
154	IN BOOLEAN Atomic,\r
155	IN BOOLEAN ShiftOut,\r
156	IN UINTN Address,\r
157	IN UINT32 DataByteCount,\r
158	IN OUT UINT8 *Buffer,\r
159	IN SPI_REGION_TYPE SpiRegionType\r
160	)\r
161	/*++\r
162	\r
163	Routine Description:\r
164	\r
165	Execute SPI commands from the host controller.\r
166	\r
167	Arguments:\r
168	\r
169	This Pointer to the EFI_SPI_PROTOCOL instance.\r
170	OpcodeIndex Index of the command in the OpCode Menu.\r
171	PrefixOpcodeIndex Index of the first command to run when in an atomic cycle sequence.\r
172	DataCycle TRUE if the SPI cycle contains data\r
173	Atomic TRUE if the SPI cycle is atomic and interleave cycles are not allowed.\r
174	ShiftOut If DataByteCount is not zero, TRUE to shift data out and FALSE to shift data in.\r
175	Address In Descriptor Mode, for Descriptor Region, GbE Region, ME Region and Platform\r
176	Region, this value specifies the offset from the Region Base; for BIOS Region,\r
177	this value specifies the offset from the start of the BIOS Image. In Non\r
178	Descriptor Mode, this value specifies the offset from the start of the BIOS Image.\r
179	Please note BIOS Image size may be smaller than BIOS Region size (in Descriptor\r
180	Mode) or the flash size (in Non Descriptor Mode), and in this case, BIOS Image is\r
181	supposed to be placed at the top end of the BIOS Region (in Descriptor Mode) or\r
182	the flash (in Non Descriptor Mode)\r
183	DataByteCount Number of bytes in the data portion of the SPI cycle.\r
184	Buffer Pointer to caller-allocated buffer containing the dada received or sent during the SPI cycle.\r
185	SpiRegionType SPI Region type. Values EnumSpiRegionBios, EnumSpiRegionGbE, EnumSpiRegionMe,\r
186	EnumSpiRegionDescriptor, and EnumSpiRegionPlatformData are only applicable in\r
187	Descriptor mode. Value EnumSpiRegionAll is applicable to both Descriptor Mode\r
188	and Non Descriptor Mode, which indicates "SpiRegionOffset" is actually relative\r
189	to base of the 1st flash device (i.e., it is a Flash Linear Address).\r
190	\r
191	Returns:\r
192	\r
193	EFI_SUCCESS Command succeed.\r
194	EFI_INVALID_PARAMETER The parameters specified are not valid.\r
195	EFI_UNSUPPORTED Command not supported.\r
196	EFI_DEVICE_ERROR Device error, command aborts abnormally.\r
197	\r
198	--*/\r
199	;\r
200	\r
201	EFI_STATUS\r
202	SendSpiCmd (\r
203	IN EFI_SPI_PROTOCOL *This,\r
204	IN UINT8 OpcodeIndex,\r
205	IN UINT8 PrefixOpcodeIndex,\r
206	IN BOOLEAN DataCycle,\r
207	IN BOOLEAN Atomic,\r
208	IN BOOLEAN ShiftOut,\r
209	IN UINTN Address,\r
210	IN UINT32 DataByteCount,\r
211	IN OUT UINT8 *Buffer,\r
212	IN SPI_REGION_TYPE SpiRegionType\r
213	)\r
214	/*++\r
215	\r
216	Routine Description:\r
217	\r
218	This function sends the programmed SPI command to the slave device.\r
219	\r
220	Arguments:\r
221	\r
222	OpcodeIndex Index of the command in the OpCode Menu.\r
223	PrefixOpcodeIndex Index of the first command to run when in an atomic cycle sequence.\r
224	DataCycle TRUE if the SPI cycle contains data\r
225	Atomic TRUE if the SPI cycle is atomic and interleave cycles are not allowed.\r
226	ShiftOut If DataByteCount is not zero, TRUE to shift data out and FALSE to shift data in.\r
227	Address In Descriptor Mode, for Descriptor Region, GbE Region, ME Region and Platform\r
228	Region, this value specifies the offset from the Region Base; for BIOS Region,\r
229	this value specifies the offset from the start of the BIOS Image. In Non\r
230	Descriptor Mode, this value specifies the offset from the start of the BIOS Image.\r
231	Please note BIOS Image size may be smaller than BIOS Region size (in Descriptor\r
232	Mode) or the flash size (in Non Descriptor Mode), and in this case, BIOS Image is\r
233	supposed to be placed at the top end of the BIOS Region (in Descriptor Mode) or\r
234	the flash (in Non Descriptor Mode)\r
235	DataByteCount Number of bytes in the data portion of the SPI cycle. This function may break the\r
236	data transfer into multiple operations. This function ensures each operation does\r
237	not cross 256 byte flash address boundary.\r
238	*NOTE: if there is some SPI chip that has a stricter address boundary requirement\r
239	(e.g., its write page size is < 256 byte), then the caller cannot rely on this\r
240	function to cut the data transfer at proper address boundaries, and it's the\r
241	caller's reponsibility to pass in a properly cut DataByteCount parameter.\r
242	Buffer Data received or sent during the SPI cycle.\r
243	SpiRegionType SPI Region type. Values EnumSpiRegionBios, EnumSpiRegionGbE, EnumSpiRegionMe,\r
244	EnumSpiRegionDescriptor, and EnumSpiRegionPlatformData are only applicable in\r
245	Descriptor mode. Value EnumSpiRegionAll is applicable to both Descriptor Mode\r
246	and Non Descriptor Mode, which indicates "SpiRegionOffset" is actually relative\r
247	to base of the 1st flash device (i.e., it is a Flash Linear Address).\r
248	\r
249	Returns:\r
250	\r
251	EFI_SUCCESS SPI command completes successfully.\r
252	EFI_DEVICE_ERROR Device error, the command aborts abnormally.\r
253	EFI_ACCESS_DENIED Some unrecognized command encountered in hardware sequencing mode\r
254	EFI_INVALID_PARAMETER The parameters specified are not valid.\r
255	\r
256	--*/\r
257	;\r
258	\r
259	BOOLEAN\r
260	WaitForSpiCycleComplete (\r
261	IN EFI_SPI_PROTOCOL *This,\r
262	IN BOOLEAN ErrorCheck\r
263	)\r
264	/*++\r
265	\r
266	Routine Description:\r
267	\r
268	Wait execution cycle to complete on the SPI interface. Check both Hardware\r
269	and Software Sequencing status registers\r
270	\r
271	Arguments:\r
272	\r
273	This - The SPI protocol instance\r
274	UseSoftwareSequence - TRUE if this is a Hardware Sequencing operation\r
275	ErrorCheck - TRUE if the SpiCycle needs to do the error check\r
276	\r
277	Returns:\r
278	\r
279	TRUE SPI cycle completed on the interface.\r
280	FALSE Time out while waiting the SPI cycle to complete.\r
281	It's not safe to program the next command on the SPI interface.\r
282	\r
283	--*/\r
284	;\r
285	\r
286	EFI_STATUS\r
287	EFIAPI\r
288	SpiProtocolInfo (\r
289	IN EFI_SPI_PROTOCOL *This,\r
290	OUT SPI_INIT_INFO **InitInfoPtr\r
291	)\r
292	/*++\r
293	\r
294	Routine Description:\r
295	\r
296	Return info about SPI host controller, to help callers usage of Execute\r
297	service.\r
298	\r
299	If 0xff is returned as an opcode index in init info struct\r
300	then device does not support the operation.\r
301	\r
302	Arguments:\r
303	\r
304	This Pointer to the EFI_SPI_PROTOCOL instance.\r
305	InitInfoPtr Pointer to init info written to this memory location.\r
306	\r
307	Returns:\r
308	\r
309	EFI_SUCCESS Information returned.\r
310	EFI_INVALID_PARAMETER Invalid parameter.\r
311	EFI_NOT_READY Required resources not setup.\r
312	Others Unexpected error happened.\r
313	\r
314	--*/\r
315	;\r
316	\r
317	#endif\r